Merge branch 'feature/esp32h21_rom_sup' into 'master'

feat(core): bringup rom/newlib for esp32h21

Closes IDF-11555 and IDF-11558

See merge request espressif/esp-idf!38783

components/esp_rom/esp32h21/Kconfig.soc_caps.in

@@ -90,3 +90,7 @@ config ESP_ROM_HAS_VERSION
 config ESP_ROM_HAS_OUTPUT_PUTC_FUNC
     bool
     default y
+
+config ESP_ROM_HAS_SUBOPTIMAL_NEWLIB_ON_MISALIGNED_MEMORY
+    bool
+    default y

components/esp_rom/esp32h21/esp_rom_caps.h

@@ -29,3 +29,4 @@
 #define ESP_ROM_HAS_VERSION                 (1) // ROM has version/eco information
 // #define ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB  (1) // ROM supports the HP core to jump to the RTC memory to execute stub code after waking up from deepsleep. //TODO: [ESP32H21] IDF-11515
 #define ESP_ROM_HAS_OUTPUT_PUTC_FUNC        (1) // ROM has esp_rom_output_putc (or ets_write_char_uart)
+#define ESP_ROM_HAS_SUBOPTIMAL_NEWLIB_ON_MISALIGNED_MEMORY  (1) // ROM mem/str functions are not optimized well for misaligned memory access.

components/esp_rom/esp32h21/include/esp32h21/rom/ets_sys.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -9,7 +9,6 @@
 #include <stdint.h>
 #include <stdbool.h>
 
-//TODO: [ESP32H21] IDF-11555
 
 #ifdef __cplusplus
 extern "C" {
@@ -410,14 +409,16 @@ void intr_matrix_set(int cpu_no, uint32_t model_num, uint32_t intr_num);
 
 #define ETS_MEM_BAR() asm volatile ( "" : : : "memory" )
 
-//TODO: [ESP32H21] IDF-11555, need to check
+#ifdef ESP_PLATFORM
+// Remove in IDF v6.0 (IDF-7044)
 typedef enum {
     OK = 0,
     FAIL,
     PENDING,
     BUSY,
     CANCEL,
-} STATUS;
+} STATUS __attribute__((deprecated("Use ETS_STATUS instead")));
+#endif
 
 /**
   * @}

components/esp_rom/esp32h21/ld/esp32h21.rom.libc-suboptimal_for_misaligned_mem.ld

@@ -0,0 +1,15 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/* These functions are not well optimized for misaligned memory access.
+ * See details in the https://sourceware.org/pipermail/newlib/2025/021470.html
+ * patch series.  */
+memcpy = 0x4000049c;
+memmove = 0x400004a0;
+memcmp = 0x400004a4;
+strcpy = 0x400004a8;
+strncpy = 0x400004ac;
+strcmp = 0x400004b0;
+strncmp = 0x400004b4;

components/esp_rom/esp32h21/ld/esp32h21.rom.libc.ld

@@ -5,13 +5,6 @@
  */
 esp_rom_newlib_init_common_mutexes = 0x40000494;
 memset = 0x40000498;
-memcpy = 0x4000049c;
-memmove = 0x400004a0;
-memcmp = 0x400004a4;
-strcpy = 0x400004a8;
-strncpy = 0x400004ac;
-strcmp = 0x400004b0;
-strncmp = 0x400004b4;
 strlen = 0x400004b8;
 strstr = 0x400004bc;
 bzero = 0x400004c0;

components/esp_rom/test_apps/rom_tests/sdkconfig.defaults

@@ -1,2 +1,4 @@
 CONFIG_FREERTOS_HZ=1000
 CONFIG_ESP_TASK_WDT_EN=n
+# miniz test may overflow stack
+CONFIG_ESP_MAIN_TASK_STACK_SIZE=8192

components/newlib/test_apps/newlib/main/test_newlib.c

@@ -131,7 +131,7 @@ static bool fn_in_rom(void *fn)
 /* Older chips have newlib nano in rom as well, but this is not linked in due to us now using 64 bit time_t
    and the ROM code was compiled for 32 bit.
  */
-#define PRINTF_NANO_IN_ROM (CONFIG_NEWLIB_NANO_FORMAT && CONFIG_IDF_TARGET_ESP32C2)
+#define PRINTF_NANO_IN_ROM (CONFIG_NEWLIB_NANO_FORMAT && (CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H21))
 #define SSCANF_NANO_IN_ROM (CONFIG_NEWLIB_NANO_FORMAT && CONFIG_IDF_TARGET_ESP32C2)
 
 TEST_CASE("check if ROM or Flash is used for functions", "[newlib]")