diff --git a/components/esp_hw_support/include/esp_private/esp_pmu.h b/components/esp_hw_support/include/esp_private/esp_pmu.h index 47db5ab066..696415a795 100644 --- a/components/esp_hw_support/include/esp_private/esp_pmu.h +++ b/components/esp_hw_support/include/esp_private/esp_pmu.h @@ -161,12 +161,6 @@ typedef struct { pmu_context_t * PMU_instance(void); -typedef enum pmu_hp_sysclk_src { - PMU_HP_SYSCLK_XTAL = 0, - PMU_HP_SYSCLK_PLL, - PMU_HP_SYSCLK_FOSC -} pmu_hp_sysclk_src_t; - typedef enum pmu_sleep_protect_mode { PMU_SLEEP_PROTECT_HP_SLEEP = 0, PMU_SLEEP_PROTECT_XTAL, diff --git a/components/esp_hw_support/port/esp32c5/pmu_param.c b/components/esp_hw_support/port/esp32c5/pmu_param.c index ec443e16fe..755ffcae99 100644 --- a/components/esp_hw_support/port/esp32c5/pmu_param.c +++ b/components/esp_hw_support/port/esp32c5/pmu_param.c @@ -12,6 +12,7 @@ #include "pmu_param.h" #include "soc/pmu_icg_mapping.h" #include "esp_private/esp_pmu.h" +#include "soc/clk_tree_defs.h" #ifndef ARRAY_SIZE #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) @@ -94,48 +95,49 @@ const pmu_hp_system_power_param_t * pmu_hp_system_power_param_default(pmu_hp_mod return &hp_power[mode]; } -#define PMU_HP_ACTIVE_CLOCK_CONFIG_DEFAULT() { \ - .icg_func = 0xffffffff, \ - .icg_apb = 0xffffffff, \ - .icg_modem = { \ - .code = PMU_HP_ICG_MODEM_CODE_ACTIVE \ +#define PMU_HP_ACTIVE_CLOCK_CONFIG_DEFAULT() { \ + .icg_func = 0xffffffff, \ + .icg_apb = 0xffffffff, \ + .icg_modem = { \ + .code = PMU_HP_ICG_MODEM_CODE_ACTIVE \ }, \ - .sysclk = { \ - .dig_sysclk_nodiv = 0, \ - .icg_sysclk_en = 1, \ - .sysclk_slp_sel = 0, \ - .icg_slp_sel = 0, \ - .dig_sysclk_sel = PMU_HP_SYSCLK_XTAL \ + .sysclk = { \ + .dig_sysclk_nodiv = 0, \ + .icg_sysclk_en = 1, \ + .sysclk_slp_sel = 0, \ + .icg_slp_sel = 0, \ + .dig_sysclk_sel = SOC_CPU_CLK_SRC_XTAL \ } \ } -#define PMU_HP_MODEM_CLOCK_CONFIG_DEFAULT() { \ - .icg_func = 0, \ - .icg_apb = 0, \ - .icg_modem = { \ - .code = PMU_HP_ICG_MODEM_CODE_MODEM \ +// TODO： PM-208 +#define PMU_HP_MODEM_CLOCK_CONFIG_DEFAULT() { \ + .icg_func = 0, \ + .icg_apb = 0, \ + .icg_modem = { \ + .code = PMU_HP_ICG_MODEM_CODE_MODEM \ }, \ - .sysclk = { \ - .dig_sysclk_nodiv = 0, \ - .icg_sysclk_en = 1, \ - .sysclk_slp_sel = 1, \ - .icg_slp_sel = 1, \ - .dig_sysclk_sel = PMU_HP_SYSCLK_PLL \ + .sysclk = { \ + .dig_sysclk_nodiv = 0, \ + .icg_sysclk_en = 1, \ + .sysclk_slp_sel = 1, \ + .icg_slp_sel = 1, \ + .dig_sysclk_sel = SOC_CPU_CLK_SRC_PLL_F160M \ } \ } -#define PMU_HP_SLEEP_CLOCK_CONFIG_DEFAULT() { \ - .icg_func = 0, \ - .icg_apb = 0, \ - .icg_modem = { \ - .code = PMU_HP_ICG_MODEM_CODE_SLEEP \ +#define PMU_HP_SLEEP_CLOCK_CONFIG_DEFAULT() { \ + .icg_func = 0, \ + .icg_apb = 0, \ + .icg_modem = { \ + .code = PMU_HP_ICG_MODEM_CODE_SLEEP \ }, \ - .sysclk = { \ - .dig_sysclk_nodiv = 0, \ - .icg_sysclk_en = 0, \ - .sysclk_slp_sel = 1, \ - .icg_slp_sel = 1, \ - .dig_sysclk_sel = PMU_HP_SYSCLK_XTAL \ + .sysclk = { \ + .dig_sysclk_nodiv = 0, \ + .icg_sysclk_en = 0, \ + .sysclk_slp_sel = 1, \ + .icg_slp_sel = 1, \ + .dig_sysclk_sel = SOC_CPU_CLK_SRC_XTAL \ } \ } @@ -274,6 +276,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m #define PMU_HP_RETENTION_REGDMA_CONFIG(dir, entry) ((((dir)<<4) | (entry & 0xf)) & 0x1f) +// TODO： PM-208 #define PMU_HP_ACTIVE_RETENTION_CONFIG_DEFAULT() { \ .retention = { \ .hp_sleep2active_backup_modem_clk_code = 2, \ @@ -281,8 +284,8 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m .hp_active_retention_mode = 0, \ .hp_sleep2active_retention_en = 0, \ .hp_modem2active_retention_en = 0, \ - .hp_sleep2active_backup_clk_sel = 0, \ - .hp_modem2active_backup_clk_sel = 1, \ + .hp_sleep2active_backup_clk_sel = SOC_CPU_CLK_SRC_XTAL, \ + .hp_modem2active_backup_clk_sel = SOC_CPU_CLK_SRC_PLL_F160M, \ .hp_sleep2active_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 0), \ .hp_modem2active_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 2), \ .hp_sleep2active_backup_en = 0, \ @@ -306,7 +309,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m .hp_sleep2modem_backup_modem_clk_code = 1, \ .hp_modem_retention_mode = 0, \ .hp_sleep2modem_retention_en = 0, \ - .hp_sleep2modem_backup_clk_sel = 0, \ + .hp_sleep2modem_backup_clk_sel = SOC_CPU_CLK_SRC_XTAL, \ .hp_sleep2modem_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 1), \ .hp_sleep2modem_backup_en = 0, \ }, \ @@ -330,8 +333,8 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m .hp_sleep_retention_mode = 0, \ .hp_modem2sleep_retention_en = 0, \ .hp_active2sleep_retention_en = 0, \ - .hp_modem2sleep_backup_clk_sel = 0, \ - .hp_active2sleep_backup_clk_sel = 0, \ + .hp_modem2sleep_backup_clk_sel = SOC_CPU_CLK_SRC_XTAL, \ + .hp_active2sleep_backup_clk_sel = SOC_CPU_CLK_SRC_XTAL, \ .hp_modem2sleep_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(1, 1), \ .hp_active2sleep_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(1, 0), \ .hp_modem2sleep_backup_en = 0, \ diff --git a/components/esp_hw_support/port/esp32c6/pmu_param.c b/components/esp_hw_support/port/esp32c6/pmu_param.c index 5c5ce9596f..044c300688 100644 --- a/components/esp_hw_support/port/esp32c6/pmu_param.c +++ b/components/esp_hw_support/port/esp32c6/pmu_param.c @@ -15,6 +15,7 @@ #include "hal/efuse_ll.h" #include "hal/efuse_hal.h" #include "esp_hw_log.h" +#include "soc/clk_tree_defs.h" static __attribute__((unused)) const char *TAG = "pmu_param"; @@ -99,18 +100,18 @@ const pmu_hp_system_power_param_t * pmu_hp_system_power_param_default(pmu_hp_mod return &hp_power[mode]; } -#define PMU_HP_ACTIVE_CLOCK_CONFIG_DEFAULT() { \ - .icg_func = 0xffffffff, \ - .icg_apb = 0xffffffff, \ - .icg_modem = { \ - .code = PMU_HP_ICG_MODEM_CODE_ACTIVE \ +#define PMU_HP_ACTIVE_CLOCK_CONFIG_DEFAULT() { \ + .icg_func = 0xffffffff, \ + .icg_apb = 0xffffffff, \ + .icg_modem = { \ + .code = PMU_HP_ICG_MODEM_CODE_ACTIVE \ }, \ - .sysclk = { \ - .dig_sysclk_nodiv = 0, \ - .icg_sysclk_en = 1, \ - .sysclk_slp_sel = 0, \ - .icg_slp_sel = 0, \ - .dig_sysclk_sel = PMU_HP_SYSCLK_XTAL \ + .sysclk = { \ + .dig_sysclk_nodiv = 0, \ + .icg_sysclk_en = 1, \ + .sysclk_slp_sel = 0, \ + .icg_slp_sel = 0, \ + .dig_sysclk_sel = SOC_CPU_CLK_SRC_XTAL \ } \ } @@ -125,22 +126,22 @@ const pmu_hp_system_power_param_t * pmu_hp_system_power_param_default(pmu_hp_mod .icg_sysclk_en = 1, \ .sysclk_slp_sel = 1, \ .icg_slp_sel = 1, \ - .dig_sysclk_sel = PMU_HP_SYSCLK_PLL \ + .dig_sysclk_sel = SOC_CPU_CLK_SRC_PLL \ } \ } -#define PMU_HP_SLEEP_CLOCK_CONFIG_DEFAULT() { \ - .icg_func = 0, \ - .icg_apb = 0, \ - .icg_modem = { \ - .code = PMU_HP_ICG_MODEM_CODE_SLEEP \ +#define PMU_HP_SLEEP_CLOCK_CONFIG_DEFAULT() { \ + .icg_func = 0, \ + .icg_apb = 0, \ + .icg_modem = { \ + .code = PMU_HP_ICG_MODEM_CODE_SLEEP \ }, \ - .sysclk = { \ - .dig_sysclk_nodiv = 0, \ - .icg_sysclk_en = 0, \ - .sysclk_slp_sel = 1, \ - .icg_slp_sel = 1, \ - .dig_sysclk_sel = PMU_HP_SYSCLK_XTAL \ + .sysclk = { \ + .dig_sysclk_nodiv = 0, \ + .icg_sysclk_en = 0, \ + .sysclk_slp_sel = 1, \ + .icg_slp_sel = 1, \ + .dig_sysclk_sel = SOC_CPU_CLK_SRC_XTAL \ } \ } @@ -283,8 +284,8 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m .hp_active_retention_mode = 0, \ .hp_sleep2active_retention_en = 0, \ .hp_modem2active_retention_en = 0, \ - .hp_sleep2active_backup_clk_sel = 0, \ - .hp_modem2active_backup_clk_sel = 1, \ + .hp_sleep2active_backup_clk_sel = SOC_CPU_CLK_SRC_XTAL, \ + .hp_modem2active_backup_clk_sel = SOC_CPU_CLK_SRC_PLL, \ .hp_sleep2active_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 0), \ .hp_modem2active_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 2), \ .hp_sleep2active_backup_en = 0, \ @@ -309,7 +310,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m .hp_sleep2modem_backup_modem_clk_code = 1, \ .hp_modem_retention_mode = 0, \ .hp_sleep2modem_retention_en = 0, \ - .hp_sleep2modem_backup_clk_sel = 0, \ + .hp_sleep2modem_backup_clk_sel = SOC_CPU_CLK_SRC_XTAL, \ .hp_sleep2modem_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 1), \ .hp_sleep2modem_backup_en = 0, \ }, \ @@ -333,8 +334,8 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m .hp_sleep_retention_mode = 0, \ .hp_modem2sleep_retention_en = 0, \ .hp_active2sleep_retention_en = 0, \ - .hp_modem2sleep_backup_clk_sel = 0, \ - .hp_active2sleep_backup_clk_sel = 0, \ + .hp_modem2sleep_backup_clk_sel = SOC_CPU_CLK_SRC_XTAL, \ + .hp_active2sleep_backup_clk_sel = SOC_CPU_CLK_SRC_XTAL, \ .hp_modem2sleep_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(1, 1), \ .hp_active2sleep_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(1, 0), \ .hp_modem2sleep_backup_en = 0, \ diff --git a/components/esp_hw_support/port/esp32c61/pmu_param.c b/components/esp_hw_support/port/esp32c61/pmu_param.c index 19be87caa5..f824c44975 100644 --- a/components/esp_hw_support/port/esp32c61/pmu_param.c +++ b/components/esp_hw_support/port/esp32c61/pmu_param.c @@ -16,6 +16,7 @@ #include "hal/efuse_ll.h" #include "hal/efuse_hal.h" #include "esp_hw_log.h" +#include "soc/clk_tree_defs.h" #ifndef ARRAY_SIZE #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) @@ -98,48 +99,48 @@ const pmu_hp_system_power_param_t * pmu_hp_system_power_param_default(pmu_hp_mod return &hp_power[mode]; } -#define PMU_HP_ACTIVE_CLOCK_CONFIG_DEFAULT() { \ - .icg_func = 0xffffffff, \ - .icg_apb = 0xffffffff, \ - .icg_modem = { \ - .code = PMU_HP_ICG_MODEM_CODE_ACTIVE \ +#define PMU_HP_ACTIVE_CLOCK_CONFIG_DEFAULT() { \ + .icg_func = 0xffffffff, \ + .icg_apb = 0xffffffff, \ + .icg_modem = { \ + .code = PMU_HP_ICG_MODEM_CODE_ACTIVE \ }, \ - .sysclk = { \ - .dig_sysclk_nodiv = 0, \ - .icg_sysclk_en = 1, \ - .sysclk_slp_sel = 0, \ - .icg_slp_sel = 0, \ - .dig_sysclk_sel = PMU_HP_SYSCLK_XTAL \ + .sysclk = { \ + .dig_sysclk_nodiv = 0, \ + .icg_sysclk_en = 1, \ + .sysclk_slp_sel = 0, \ + .icg_slp_sel = 0, \ + .dig_sysclk_sel = SOC_CPU_CLK_SRC_XTAL \ } \ } -#define PMU_HP_MODEM_CLOCK_CONFIG_DEFAULT() { \ - .icg_func = 0, \ - .icg_apb = 0, \ - .icg_modem = { \ - .code = PMU_HP_ICG_MODEM_CODE_MODEM \ +#define PMU_HP_MODEM_CLOCK_CONFIG_DEFAULT() { \ + .icg_func = 0, \ + .icg_apb = 0, \ + .icg_modem = { \ + .code = PMU_HP_ICG_MODEM_CODE_MODEM \ }, \ - .sysclk = { \ - .dig_sysclk_nodiv = 0, \ - .icg_sysclk_en = 1, \ - .sysclk_slp_sel = 1, \ - .icg_slp_sel = 1, \ - .dig_sysclk_sel = PMU_HP_SYSCLK_PLL \ + .sysclk = { \ + .dig_sysclk_nodiv = 0, \ + .icg_sysclk_en = 1, \ + .sysclk_slp_sel = 1, \ + .icg_slp_sel = 1, \ + .dig_sysclk_sel = SOC_CPU_CLK_SRC_PLL_F160M \ } \ } -#define PMU_HP_SLEEP_CLOCK_CONFIG_DEFAULT() { \ - .icg_func = 0, \ - .icg_apb = 0, \ - .icg_modem = { \ - .code = PMU_HP_ICG_MODEM_CODE_SLEEP \ +#define PMU_HP_SLEEP_CLOCK_CONFIG_DEFAULT() { \ + .icg_func = 0, \ + .icg_apb = 0, \ + .icg_modem = { \ + .code = PMU_HP_ICG_MODEM_CODE_SLEEP \ }, \ - .sysclk = { \ - .dig_sysclk_nodiv = 0, \ - .icg_sysclk_en = 0, \ - .sysclk_slp_sel = 1, \ - .icg_slp_sel = 1, \ - .dig_sysclk_sel = PMU_HP_SYSCLK_XTAL \ + .sysclk = { \ + .dig_sysclk_nodiv = 0, \ + .icg_sysclk_en = 0, \ + .sysclk_slp_sel = 1, \ + .icg_slp_sel = 1, \ + .dig_sysclk_sel = SOC_CPU_CLK_SRC_XTAL \ } \ } diff --git a/components/esp_hw_support/port/esp32h2/pmu_param.c b/components/esp_hw_support/port/esp32h2/pmu_param.c index 995c02a243..036792a6fa 100644 --- a/components/esp_hw_support/port/esp32h2/pmu_param.c +++ b/components/esp_hw_support/port/esp32h2/pmu_param.c @@ -15,6 +15,7 @@ #include "hal/efuse_ll.h" #include "hal/efuse_hal.h" #include "esp_hw_log.h" +#include "soc/clk_tree_defs.h" static __attribute__((unused)) const char *TAG = "pmu_param"; @@ -99,48 +100,48 @@ const pmu_hp_system_power_param_t * pmu_hp_system_power_param_default(pmu_hp_mod return &hp_power[mode]; } -#define PMU_HP_ACTIVE_CLOCK_CONFIG_DEFAULT() { \ - .icg_func = 0xffffffff, \ - .icg_apb = 0xffffffff, \ - .icg_modem = { \ - .code = 0 \ +#define PMU_HP_ACTIVE_CLOCK_CONFIG_DEFAULT() { \ + .icg_func = 0xffffffff, \ + .icg_apb = 0xffffffff, \ + .icg_modem = { \ + .code = 0 \ }, \ - .sysclk = { \ - .dig_sysclk_nodiv = 0, \ - .icg_sysclk_en = 1, \ - .sysclk_slp_sel = 0, \ - .icg_slp_sel = 0, \ - .dig_sysclk_sel = PMU_HP_SYSCLK_XTAL \ + .sysclk = { \ + .dig_sysclk_nodiv = 0, \ + .icg_sysclk_en = 1, \ + .sysclk_slp_sel = 0, \ + .icg_slp_sel = 0, \ + .dig_sysclk_sel = SOC_CPU_CLK_SRC_XTAL \ } \ } -#define PMU_HP_MODEM_CLOCK_CONFIG_DEFAULT() { \ - .icg_func = 0, \ - .icg_apb = 0, \ - .icg_modem = { \ - .code = 0 \ +#define PMU_HP_MODEM_CLOCK_CONFIG_DEFAULT() { \ + .icg_func = 0, \ + .icg_apb = 0, \ + .icg_modem = { \ + .code = 0 \ }, \ - .sysclk = { \ - .dig_sysclk_nodiv = 0, \ - .icg_sysclk_en = 1, \ - .sysclk_slp_sel = 1, \ - .icg_slp_sel = 1, \ - .dig_sysclk_sel = PMU_HP_SYSCLK_PLL \ + .sysclk = { \ + .dig_sysclk_nodiv = 0, \ + .icg_sysclk_en = 1, \ + .sysclk_slp_sel = 1, \ + .icg_slp_sel = 1, \ + .dig_sysclk_sel = SOC_CPU_CLK_SRC_PLL \ } \ } -#define PMU_HP_SLEEP_CLOCK_CONFIG_DEFAULT() { \ - .icg_func = 0, \ - .icg_apb = 0, \ - .icg_modem = { \ - .code = 2 \ +#define PMU_HP_SLEEP_CLOCK_CONFIG_DEFAULT() { \ + .icg_func = 0, \ + .icg_apb = 0, \ + .icg_modem = { \ + .code = 2 \ }, \ - .sysclk = { \ - .dig_sysclk_nodiv = 0, \ - .icg_sysclk_en = 0, \ - .sysclk_slp_sel = 1, \ - .icg_slp_sel = 1, \ - .dig_sysclk_sel = PMU_HP_SYSCLK_XTAL \ + .sysclk = { \ + .dig_sysclk_nodiv = 0, \ + .icg_sysclk_en = 0, \ + .sysclk_slp_sel = 1, \ + .icg_slp_sel = 1, \ + .dig_sysclk_sel = SOC_CPU_CLK_SRC_XTAL \ } \ } @@ -282,8 +283,8 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m .hp_active_retention_mode = 0, \ .hp_sleep2active_retention_en = 0, \ .hp_modem2active_retention_en = 0, \ - .hp_sleep2active_backup_clk_sel = 0, \ - .hp_modem2active_backup_clk_sel = 0, \ + .hp_sleep2active_backup_clk_sel = SOC_CPU_CLK_SRC_XTAL, \ + .hp_modem2active_backup_clk_sel = SOC_CPU_CLK_SRC_XTAL, \ .hp_sleep2active_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 0), \ .hp_modem2active_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 2), \ .hp_sleep2active_backup_en = 0, \ @@ -308,7 +309,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m .hp_sleep2modem_backup_modem_clk_code = 3, \ .hp_modem_retention_mode = 0, \ .hp_sleep2modem_retention_en = 0, \ - .hp_sleep2modem_backup_clk_sel = 0, \ + .hp_sleep2modem_backup_clk_sel = SOC_CPU_CLK_SRC_XTAL, \ .hp_sleep2modem_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 1), \ .hp_sleep2modem_backup_en = 0, \ }, \ @@ -331,8 +332,8 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m .hp_sleep_retention_mode = 0, \ .hp_modem2sleep_retention_en = 0, \ .hp_active2sleep_retention_en = 0, \ - .hp_modem2sleep_backup_clk_sel = 0, \ - .hp_active2sleep_backup_clk_sel = 0, \ + .hp_modem2sleep_backup_clk_sel = SOC_CPU_CLK_SRC_XTAL, \ + .hp_active2sleep_backup_clk_sel = SOC_CPU_CLK_SRC_XTAL, \ .hp_modem2sleep_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(1, 1), \ .hp_active2sleep_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(1, 0), \ .hp_modem2sleep_backup_en = 0, \ diff --git a/components/esp_hw_support/port/esp32p4/pmu_param.c b/components/esp_hw_support/port/esp32p4/pmu_param.c index b0a263a692..362f6b9b73 100644 --- a/components/esp_hw_support/port/esp32p4/pmu_param.c +++ b/components/esp_hw_support/port/esp32p4/pmu_param.c @@ -12,6 +12,7 @@ #include "pmu_param.h" #include "soc/pmu_icg_mapping.h" #include "esp_private/esp_pmu.h" +#include "soc/clk_tree_defs.h" #ifndef ARRAY_SIZE #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) @@ -66,29 +67,29 @@ const pmu_hp_system_power_param_t * pmu_hp_system_power_param_default(pmu_hp_mod return &hp_power[mode]; } -#define PMU_HP_ACTIVE_CLOCK_CONFIG_DEFAULT() { \ - .icg_func = 0xffffffff, \ - .icg_apb = 0xffffffff, \ - .icg_modem = 0, \ - .sysclk = { \ - .dig_sysclk_nodiv = 0, \ - .icg_sysclk_en = 1, \ - .sysclk_slp_sel = 0, \ - .icg_slp_sel = 0, \ - .dig_sysclk_sel = PMU_HP_SYSCLK_XTAL \ +#define PMU_HP_ACTIVE_CLOCK_CONFIG_DEFAULT() { \ + .icg_func = 0xffffffff, \ + .icg_apb = 0xffffffff, \ + .icg_modem = 0, \ + .sysclk = { \ + .dig_sysclk_nodiv = 0, \ + .icg_sysclk_en = 1, \ + .sysclk_slp_sel = 0, \ + .icg_slp_sel = 0, \ + .dig_sysclk_sel = SOC_CPU_CLK_SRC_XTAL \ } \ } -#define PMU_HP_SLEEP_CLOCK_CONFIG_DEFAULT() { \ - .icg_func = 0, \ - .icg_apb = 0, \ - .icg_modem = 0, \ - .sysclk = { \ - .dig_sysclk_nodiv = 0, \ - .icg_sysclk_en = 0, \ - .sysclk_slp_sel = 1, \ - .icg_slp_sel = 1, \ - .dig_sysclk_sel = PMU_HP_SYSCLK_XTAL \ +#define PMU_HP_SLEEP_CLOCK_CONFIG_DEFAULT() { \ + .icg_func = 0, \ + .icg_apb = 0, \ + .icg_modem = 0, \ + .sysclk = { \ + .dig_sysclk_nodiv = 0, \ + .icg_sysclk_en = 0, \ + .sysclk_slp_sel = 1, \ + .icg_slp_sel = 1, \ + .dig_sysclk_sel = SOC_CPU_CLK_SRC_XTAL \ } \ }