diff --git a/components/soc/esp32p4/include/soc/dport_access.h b/components/soc/esp32p4/include/soc/dport_access.h
index 3747073d22..189fc786b8 100644
--- a/components/soc/esp32p4/include/soc/dport_access.h
+++ b/components/soc/esp32p4/include/soc/dport_access.h
@@ -9,7 +9,6 @@
 
 #include <stdint.h>
 #include "soc.h"
-#include "uart_reg.h"
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/components/soc/esp32p4/include/soc/reset_reasons.h b/components/soc/esp32p4/include/soc/reset_reasons.h
index 39b792e549..4e6952d555 100644
--- a/components/soc/esp32p4/include/soc/reset_reasons.h
+++ b/components/soc/esp32p4/include/soc/reset_reasons.h
@@ -45,7 +45,7 @@ typedef enum {
     RESET_REASON_CORE_USB_JTAG     = 0x16, // USB Serial/JTAG controller's JTAG resets the digital core
     RESET_REASON_CORE_USB_UART     = 0x17, // USB Serial/JTAG controller's UART resets the digital core
     RESET_REASON_CPU_JTAG          = 0x18, // Triggered when a reset command from JTAG is received
-    RESET_REASON_CPU_LOCKUP        = 0x1A, // Triggered when the CPU enters lockup (exception inside the execption handler would cause this)
+    RESET_REASON_CPU_LOCKUP        = 0x1A, // Triggered when the CPU enters lockup (exception inside the exception handler would cause this)
 } soc_reset_reason_t;
 
 
diff --git a/components/soc/esp32p4/include/soc/soc.h b/components/soc/esp32p4/include/soc/soc.h
index baf879c9e5..e8e79a9d07 100644
--- a/components/soc/esp32p4/include/soc/soc.h
+++ b/components/soc/esp32p4/include/soc/soc.h
@@ -12,7 +12,7 @@
 #endif
 
 #include "esp_bit_defs.h"
-#include "reg_base.h"
+#include "soc/reg_base.h"
 
 #define PRO_CPU_NUM (0)
 
diff --git a/components/soc/esp32p4/include/soc/usb_dwc_struct.h b/components/soc/esp32p4/include/soc/usb_dwc_struct.h
index 728be16b0f..206d566277 100644
--- a/components/soc/esp32p4/include/soc/usb_dwc_struct.h
+++ b/components/soc/esp32p4/include/soc/usb_dwc_struct.h
@@ -33,7 +33,7 @@ typedef union {
         uint32_t hnpreq: 1;
         uint32_t hstsethnpen: 1;
         uint32_t devhnpen: 1;
-        uint32_t ehen: 1;
+        uint32_t ehen: 1;    // codespell:ignore ehen
         uint32_t reserved_13: 2;
         uint32_t dbncefltrbypass: 1;
         uint32_t conidsts: 1;
diff --git a/components/soc/esp32p4/register/soc/.gitkeep b/components/soc/esp32p4/register/soc/.gitkeep
deleted file mode 100644
index e69de29bb2..0000000000
diff --git a/components/soc/esp32p4/include/soc/adc_reg.h b/components/soc/esp32p4/register/soc/adc_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/adc_reg.h
rename to components/soc/esp32p4/register/soc/adc_reg.h
diff --git a/components/soc/esp32p4/include/soc/adc_struct.h b/components/soc/esp32p4/register/soc/adc_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/adc_struct.h
rename to components/soc/esp32p4/register/soc/adc_struct.h
diff --git a/components/soc/esp32p4/include/soc/aes_reg.h b/components/soc/esp32p4/register/soc/aes_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/aes_reg.h
rename to components/soc/esp32p4/register/soc/aes_reg.h
diff --git a/components/soc/esp32p4/include/soc/aes_struct.h b/components/soc/esp32p4/register/soc/aes_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/aes_struct.h
rename to components/soc/esp32p4/register/soc/aes_struct.h
diff --git a/components/soc/esp32p4/include/soc/ahb_dma_reg.h b/components/soc/esp32p4/register/soc/ahb_dma_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/ahb_dma_reg.h
rename to components/soc/esp32p4/register/soc/ahb_dma_reg.h
diff --git a/components/soc/esp32p4/include/soc/ahb_dma_struct.h b/components/soc/esp32p4/register/soc/ahb_dma_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/ahb_dma_struct.h
rename to components/soc/esp32p4/register/soc/ahb_dma_struct.h
diff --git a/components/soc/esp32p4/include/soc/assist_debug_reg.h b/components/soc/esp32p4/register/soc/assist_debug_reg.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/assist_debug_reg.h
rename to components/soc/esp32p4/register/soc/assist_debug_reg.h
index 89c49a9cc6..f8f13c3531 100644
--- a/components/soc/esp32p4/include/soc/assist_debug_reg.h
+++ b/components/soc/esp32p4/register/soc/assist_debug_reg.h
@@ -435,7 +435,7 @@ extern "C" {
  */
 #define ASSIST_DEBUG_CORE_0_SP_MIN_REG (DR_REG_ASSIST_DEBUG_BASE + 0x38)
 /** ASSIST_DEBUG_CORE_0_SP_MIN : R/W; bitpos: [31:0]; default: 0;
- *  core0 sp region configuration regsiter
+ *  core0 sp region configuration register
  */
 #define ASSIST_DEBUG_CORE_0_SP_MIN    0xFFFFFFFFU
 #define ASSIST_DEBUG_CORE_0_SP_MIN_M  (ASSIST_DEBUG_CORE_0_SP_MIN_V << ASSIST_DEBUG_CORE_0_SP_MIN_S)
@@ -459,7 +459,7 @@ extern "C" {
  */
 #define ASSIST_DEBUG_CORE_0_SP_PC_REG (DR_REG_ASSIST_DEBUG_BASE + 0x40)
 /** ASSIST_DEBUG_CORE_0_SP_PC : RO; bitpos: [31:0]; default: 0;
- *  This regsiter stores the PC when trigger stack monitor.
+ *  This register stores the PC when trigger stack monitor.
  */
 #define ASSIST_DEBUG_CORE_0_SP_PC    0xFFFFFFFFU
 #define ASSIST_DEBUG_CORE_0_SP_PC_M  (ASSIST_DEBUG_CORE_0_SP_PC_V << ASSIST_DEBUG_CORE_0_SP_PC_S)
@@ -486,7 +486,7 @@ extern "C" {
 #define ASSIST_DEBUG_CORE_0_RCD_PDEBUGEN_S  1
 
 /** ASSIST_DEBUG_CORE_0_RCD_PDEBUGPC_REG register
- *  record status regsiter
+ *  record status register
  */
 #define ASSIST_DEBUG_CORE_0_RCD_PDEBUGPC_REG (DR_REG_ASSIST_DEBUG_BASE + 0x48)
 /** ASSIST_DEBUG_CORE_0_RCD_PDEBUGPC : RO; bitpos: [31:0]; default: 0;
@@ -498,7 +498,7 @@ extern "C" {
 #define ASSIST_DEBUG_CORE_0_RCD_PDEBUGPC_S  0
 
 /** ASSIST_DEBUG_CORE_0_RCD_PDEBUGSP_REG register
- *  record status regsiter
+ *  record status register
  */
 #define ASSIST_DEBUG_CORE_0_RCD_PDEBUGSP_REG (DR_REG_ASSIST_DEBUG_BASE + 0x4c)
 /** ASSIST_DEBUG_CORE_0_RCD_PDEBUGSP : RO; bitpos: [31:0]; default: 0;
@@ -1103,7 +1103,7 @@ extern "C" {
  */
 #define ASSIST_DEBUG_CORE_1_SP_MIN_REG (DR_REG_ASSIST_DEBUG_BASE + 0xb8)
 /** ASSIST_DEBUG_CORE_1_SP_MIN : R/W; bitpos: [31:0]; default: 0;
- *  core1 sp region configuration regsiter
+ *  core1 sp region configuration register
  */
 #define ASSIST_DEBUG_CORE_1_SP_MIN    0xFFFFFFFFU
 #define ASSIST_DEBUG_CORE_1_SP_MIN_M  (ASSIST_DEBUG_CORE_1_SP_MIN_V << ASSIST_DEBUG_CORE_1_SP_MIN_S)
@@ -1127,7 +1127,7 @@ extern "C" {
  */
 #define ASSIST_DEBUG_CORE_1_SP_PC_REG (DR_REG_ASSIST_DEBUG_BASE + 0xc0)
 /** ASSIST_DEBUG_CORE_1_SP_PC : RO; bitpos: [31:0]; default: 0;
- *  This regsiter stores the PC when trigger stack monitor.
+ *  This register stores the PC when trigger stack monitor.
  */
 #define ASSIST_DEBUG_CORE_1_SP_PC    0xFFFFFFFFU
 #define ASSIST_DEBUG_CORE_1_SP_PC_M  (ASSIST_DEBUG_CORE_1_SP_PC_V << ASSIST_DEBUG_CORE_1_SP_PC_S)
@@ -1154,7 +1154,7 @@ extern "C" {
 #define ASSIST_DEBUG_CORE_1_RCD_PDEBUGEN_S  1
 
 /** ASSIST_DEBUG_CORE_1_RCD_PDEBUGPC_REG register
- *  record status regsiter
+ *  record status register
  */
 #define ASSIST_DEBUG_CORE_1_RCD_PDEBUGPC_REG (DR_REG_ASSIST_DEBUG_BASE + 0xc8)
 /** ASSIST_DEBUG_CORE_1_RCD_PDEBUGPC : RO; bitpos: [31:0]; default: 0;
@@ -1166,7 +1166,7 @@ extern "C" {
 #define ASSIST_DEBUG_CORE_1_RCD_PDEBUGPC_S  0
 
 /** ASSIST_DEBUG_CORE_1_RCD_PDEBUGSP_REG register
- *  record status regsiter
+ *  record status register
  */
 #define ASSIST_DEBUG_CORE_1_RCD_PDEBUGSP_REG (DR_REG_ASSIST_DEBUG_BASE + 0xcc)
 /** ASSIST_DEBUG_CORE_1_RCD_PDEBUGSP : RO; bitpos: [31:0]; default: 0;
diff --git a/components/soc/esp32p4/include/soc/assist_debug_struct.h b/components/soc/esp32p4/register/soc/assist_debug_struct.h
similarity index 98%
rename from components/soc/esp32p4/include/soc/assist_debug_struct.h
rename to components/soc/esp32p4/register/soc/assist_debug_struct.h
index 88dd72df88..645e5a1cf0 100644
--- a/components/soc/esp32p4/include/soc/assist_debug_struct.h
+++ b/components/soc/esp32p4/register/soc/assist_debug_struct.h
@@ -197,7 +197,7 @@ typedef union {
 typedef union {
     struct {
         /** core_0_sp_min : R/W; bitpos: [31:0]; default: 0;
-         *  core0 sp region configuration regsiter
+         *  core0 sp region configuration register
          */
         uint32_t core_0_sp_min:32;
     };
@@ -223,7 +223,7 @@ typedef union {
 typedef union {
     struct {
         /** core_0_sp_pc : RO; bitpos: [31:0]; default: 0;
-         *  This regsiter stores the PC when trigger stack monitor.
+         *  This register stores the PC when trigger stack monitor.
          */
         uint32_t core_0_sp_pc:32;
     };
@@ -416,7 +416,7 @@ typedef union {
 typedef union {
     struct {
         /** core_1_sp_min : R/W; bitpos: [31:0]; default: 0;
-         *  core1 sp region configuration regsiter
+         *  core1 sp region configuration register
          */
         uint32_t core_1_sp_min:32;
     };
@@ -442,7 +442,7 @@ typedef union {
 typedef union {
     struct {
         /** core_1_sp_pc : RO; bitpos: [31:0]; default: 0;
-         *  This regsiter stores the PC when trigger stack monitor.
+         *  This register stores the PC when trigger stack monitor.
          */
         uint32_t core_1_sp_pc:32;
     };
@@ -752,7 +752,7 @@ typedef union {
 } assist_debug_core_1_intr_clr_reg_t;
 
 
-/** Group: pc reording configuration register */
+/** Group: pc recording configuration register */
 /** Type of core_0_rcd_en register
  *  record enable configuration register
  */
@@ -790,9 +790,9 @@ typedef union {
 } assist_debug_core_1_rcd_en_reg_t;
 
 
-/** Group: pc reording status register */
+/** Group: pc recording status register */
 /** Type of core_0_rcd_pdebugpc register
- *  record status regsiter
+ *  record status register
  */
 typedef union {
     struct {
@@ -805,7 +805,7 @@ typedef union {
 } assist_debug_core_0_rcd_pdebugpc_reg_t;
 
 /** Type of core_0_rcd_pdebugsp register
- *  record status regsiter
+ *  record status register
  */
 typedef union {
     struct {
@@ -818,7 +818,7 @@ typedef union {
 } assist_debug_core_0_rcd_pdebugsp_reg_t;
 
 /** Type of core_1_rcd_pdebugpc register
- *  record status regsiter
+ *  record status register
  */
 typedef union {
     struct {
@@ -831,7 +831,7 @@ typedef union {
 } assist_debug_core_1_rcd_pdebugpc_reg_t;
 
 /** Type of core_1_rcd_pdebugsp register
- *  record status regsiter
+ *  record status register
  */
 typedef union {
     struct {
@@ -844,7 +844,7 @@ typedef union {
 } assist_debug_core_1_rcd_pdebugsp_reg_t;
 
 
-/** Group: exception monitor regsiter */
+/** Group: exception monitor register */
 /** Type of core_0_iram0_exception_monitor_0 register
  *  exception monitor status register0
  */
diff --git a/components/soc/esp32p4/include/soc/axi_dma_reg.h b/components/soc/esp32p4/register/soc/axi_dma_reg.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/axi_dma_reg.h
rename to components/soc/esp32p4/register/soc/axi_dma_reg.h
index e3dfc907db..8f2775e795 100644
--- a/components/soc/esp32p4/include/soc/axi_dma_reg.h
+++ b/components/soc/esp32p4/register/soc/axi_dma_reg.h
@@ -770,7 +770,7 @@ extern "C" {
 #define AXI_DMA_RX_CH_ARB_WEIGH_CH0_V  0x0000000FU
 #define AXI_DMA_RX_CH_ARB_WEIGH_CH0_S  4
 /** AXI_DMA_RX_ARB_WEIGH_OPT_DIR_CH0 : R/W; bitpos: [8]; default: 0;
- *  0: mean not optimazation weight function ,1: mean optimazation
+ *  0: mean not optimization weight function ,1: mean optimization
  */
 #define AXI_DMA_RX_ARB_WEIGH_OPT_DIR_CH0    (BIT(8))
 #define AXI_DMA_RX_ARB_WEIGH_OPT_DIR_CH0_M  (AXI_DMA_RX_ARB_WEIGH_OPT_DIR_CH0_V << AXI_DMA_RX_ARB_WEIGH_OPT_DIR_CH0_S)
@@ -1654,7 +1654,7 @@ extern "C" {
 #define AXI_DMA_RX_CH_ARB_WEIGH_CH1_V  0x0000000FU
 #define AXI_DMA_RX_CH_ARB_WEIGH_CH1_S  4
 /** AXI_DMA_RX_ARB_WEIGH_OPT_DIR_CH1 : R/W; bitpos: [8]; default: 0;
- *  0: mean not optimazation weight function ,1: mean optimazation
+ *  0: mean not optimization weight function ,1: mean optimization
  */
 #define AXI_DMA_RX_ARB_WEIGH_OPT_DIR_CH1    (BIT(8))
 #define AXI_DMA_RX_ARB_WEIGH_OPT_DIR_CH1_M  (AXI_DMA_RX_ARB_WEIGH_OPT_DIR_CH1_V << AXI_DMA_RX_ARB_WEIGH_OPT_DIR_CH1_S)
@@ -2538,7 +2538,7 @@ extern "C" {
 #define AXI_DMA_RX_CH_ARB_WEIGH_CH2_V  0x0000000FU
 #define AXI_DMA_RX_CH_ARB_WEIGH_CH2_S  4
 /** AXI_DMA_RX_ARB_WEIGH_OPT_DIR_CH2 : R/W; bitpos: [8]; default: 0;
- *  0: mean not optimazation weight function ,1: mean optimazation
+ *  0: mean not optimization weight function ,1: mean optimization
  */
 #define AXI_DMA_RX_ARB_WEIGH_OPT_DIR_CH2    (BIT(8))
 #define AXI_DMA_RX_ARB_WEIGH_OPT_DIR_CH2_M  (AXI_DMA_RX_ARB_WEIGH_OPT_DIR_CH2_V << AXI_DMA_RX_ARB_WEIGH_OPT_DIR_CH2_S)
@@ -3384,7 +3384,7 @@ extern "C" {
 #define AXI_DMA_TX_CH_ARB_WEIGH_CH0_V  0x0000000FU
 #define AXI_DMA_TX_CH_ARB_WEIGH_CH0_S  4
 /** AXI_DMA_TX_ARB_WEIGH_OPT_DIR_CH0 : R/W; bitpos: [8]; default: 0;
- *  0: mean not optimazation weight function ,1: mean optimazation
+ *  0: mean not optimization weight function ,1: mean optimization
  */
 #define AXI_DMA_TX_ARB_WEIGH_OPT_DIR_CH0    (BIT(8))
 #define AXI_DMA_TX_ARB_WEIGH_OPT_DIR_CH0_M  (AXI_DMA_TX_ARB_WEIGH_OPT_DIR_CH0_V << AXI_DMA_TX_ARB_WEIGH_OPT_DIR_CH0_S)
@@ -4230,7 +4230,7 @@ extern "C" {
 #define AXI_DMA_TX_CH_ARB_WEIGH_CH1_V  0x0000000FU
 #define AXI_DMA_TX_CH_ARB_WEIGH_CH1_S  4
 /** AXI_DMA_TX_ARB_WEIGH_OPT_DIR_CH1 : R/W; bitpos: [8]; default: 0;
- *  0: mean not optimazation weight function ,1: mean optimazation
+ *  0: mean not optimization weight function ,1: mean optimization
  */
 #define AXI_DMA_TX_ARB_WEIGH_OPT_DIR_CH1    (BIT(8))
 #define AXI_DMA_TX_ARB_WEIGH_OPT_DIR_CH1_M  (AXI_DMA_TX_ARB_WEIGH_OPT_DIR_CH1_V << AXI_DMA_TX_ARB_WEIGH_OPT_DIR_CH1_S)
@@ -5076,7 +5076,7 @@ extern "C" {
 #define AXI_DMA_TX_CH_ARB_WEIGH_CH2_V  0x0000000FU
 #define AXI_DMA_TX_CH_ARB_WEIGH_CH2_S  4
 /** AXI_DMA_TX_ARB_WEIGH_OPT_DIR_CH2 : R/W; bitpos: [8]; default: 0;
- *  0: mean not optimazation weight function ,1: mean optimazation
+ *  0: mean not optimization weight function ,1: mean optimization
  */
 #define AXI_DMA_TX_ARB_WEIGH_OPT_DIR_CH2    (BIT(8))
 #define AXI_DMA_TX_ARB_WEIGH_OPT_DIR_CH2_M  (AXI_DMA_TX_ARB_WEIGH_OPT_DIR_CH2_V << AXI_DMA_TX_ARB_WEIGH_OPT_DIR_CH2_S)
@@ -5490,11 +5490,11 @@ extern "C" {
 #define AXI_DMA_RDN_ECO_LOW_S  0
 
 /** AXI_DMA_WRESP_CNT_REG register
- *  AXI wr responce cnt register.
+ *  AXI wr response cnt register.
  */
 #define AXI_DMA_WRESP_CNT_REG (DR_REG_AXI_DMA_BASE + 0x2b8)
 /** AXI_DMA_WRESP_CNT : RO; bitpos: [3:0]; default: 0;
- *  axi wr responce cnt reg.
+ *  axi wr response cnt reg.
  */
 #define AXI_DMA_WRESP_CNT    0x0000000FU
 #define AXI_DMA_WRESP_CNT_M  (AXI_DMA_WRESP_CNT_V << AXI_DMA_WRESP_CNT_S)
@@ -5502,11 +5502,11 @@ extern "C" {
 #define AXI_DMA_WRESP_CNT_S  0
 
 /** AXI_DMA_RRESP_CNT_REG register
- *  AXI wr responce cnt register.
+ *  AXI wr response cnt register.
  */
 #define AXI_DMA_RRESP_CNT_REG (DR_REG_AXI_DMA_BASE + 0x2bc)
 /** AXI_DMA_RRESP_CNT : RO; bitpos: [3:0]; default: 0;
- *  axi rd responce cnt reg.
+ *  axi rd response cnt reg.
  */
 #define AXI_DMA_RRESP_CNT    0x0000000FU
 #define AXI_DMA_RRESP_CNT_M  (AXI_DMA_RRESP_CNT_V << AXI_DMA_RRESP_CNT_S)
diff --git a/components/soc/esp32p4/include/soc/axi_dma_struct.h b/components/soc/esp32p4/register/soc/axi_dma_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/axi_dma_struct.h
rename to components/soc/esp32p4/register/soc/axi_dma_struct.h
diff --git a/components/soc/esp32p4/include/soc/bitscrambler_reg.h b/components/soc/esp32p4/register/soc/bitscrambler_reg.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/bitscrambler_reg.h
rename to components/soc/esp32p4/register/soc/bitscrambler_reg.h
index 44bfc3c874..4b8fbe5df5 100644
--- a/components/soc/esp32p4/include/soc/bitscrambler_reg.h
+++ b/components/soc/esp32p4/register/soc/bitscrambler_reg.h
@@ -216,7 +216,7 @@ extern "C" {
 #define BITSCRAMBLER_TX_COND_MODE_S  4
 /** BITSCRAMBLER_TX_FETCH_MODE : R/W; bitpos: [5]; default: 0;
  *  write this bit to set the bitscrambler tx core fetch instruction mode, 0: prefetch
- *  by reset, 1: fetch by instrutions
+ *  by reset, 1: fetch by instructions
  */
 #define BITSCRAMBLER_TX_FETCH_MODE    (BIT(5))
 #define BITSCRAMBLER_TX_FETCH_MODE_M  (BITSCRAMBLER_TX_FETCH_MODE_V << BITSCRAMBLER_TX_FETCH_MODE_S)
@@ -291,7 +291,7 @@ extern "C" {
 #define BITSCRAMBLER_RX_COND_MODE_S  4
 /** BITSCRAMBLER_RX_FETCH_MODE : R/W; bitpos: [5]; default: 0;
  *  write this bit to set the bitscrambler rx core fetch instruction mode, 0: prefetch
- *  by reset, 1: fetch by instrutions
+ *  by reset, 1: fetch by instructions
  */
 #define BITSCRAMBLER_RX_FETCH_MODE    (BIT(5))
 #define BITSCRAMBLER_RX_FETCH_MODE_M  (BITSCRAMBLER_RX_FETCH_MODE_V << BITSCRAMBLER_RX_FETCH_MODE_S)
diff --git a/components/soc/esp32p4/include/soc/bitscrambler_struct.h b/components/soc/esp32p4/register/soc/bitscrambler_struct.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/bitscrambler_struct.h
rename to components/soc/esp32p4/register/soc/bitscrambler_struct.h
index 007c244d50..6a451171ba 100644
--- a/components/soc/esp32p4/include/soc/bitscrambler_struct.h
+++ b/components/soc/esp32p4/register/soc/bitscrambler_struct.h
@@ -208,7 +208,7 @@ typedef union {
         uint32_t tx_cond_mode:1;
         /** tx_fetch_mode : R/W; bitpos: [5]; default: 0;
          *  write this bit to set the bitscrambler tx core fetch instruction mode, 0: prefetch
-         *  by reset, 1: fetch by instrutions
+         *  by reset, 1: fetch by instructions
          */
         uint32_t tx_fetch_mode:1;
         /** tx_halt_mode : R/W; bitpos: [6]; default: 0;
@@ -261,7 +261,7 @@ typedef union {
         uint32_t rx_cond_mode:1;
         /** rx_fetch_mode : R/W; bitpos: [5]; default: 0;
          *  write this bit to set the bitscrambler rx core fetch instruction mode, 0: prefetch
-         *  by reset, 1: fetch by instrutions
+         *  by reset, 1: fetch by instructions
          */
         uint32_t rx_fetch_mode:1;
         /** rx_halt_mode : R/W; bitpos: [6]; default: 0;
diff --git a/components/soc/esp32p4/include/soc/cache_reg.h b/components/soc/esp32p4/register/soc/cache_reg.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/cache_reg.h
rename to components/soc/esp32p4/register/soc/cache_reg.h
index b3cc3cd039..e80afcd41b 100644
--- a/components/soc/esp32p4/include/soc/cache_reg.h
+++ b/components/soc/esp32p4/register/soc/cache_reg.h
@@ -4270,7 +4270,7 @@ extern "C" {
 #define CACHE_L1_UNALLOCATE_BUFFER_CLEAR_REG (DR_REG_CACHE_BASE + 0x258)
 /** CACHE_L1_ICACHE0_UNALLOC_CLR : R/W; bitpos: [0]; default: 0;
  *  The bit is used to clear the unallocate request buffer of l1 icache0 where the
- *  unallocate request is responsed but not completed.
+ *  unallocate request is responded but not completed.
  */
 #define CACHE_L1_ICACHE0_UNALLOC_CLR    (BIT(0))
 #define CACHE_L1_ICACHE0_UNALLOC_CLR_M  (CACHE_L1_ICACHE0_UNALLOC_CLR_V << CACHE_L1_ICACHE0_UNALLOC_CLR_S)
@@ -4278,7 +4278,7 @@ extern "C" {
 #define CACHE_L1_ICACHE0_UNALLOC_CLR_S  0
 /** CACHE_L1_ICACHE1_UNALLOC_CLR : R/W; bitpos: [1]; default: 0;
  *  The bit is used to clear the unallocate request buffer of l1 icache1 where the
- *  unallocate request is responsed but not completed.
+ *  unallocate request is responded but not completed.
  */
 #define CACHE_L1_ICACHE1_UNALLOC_CLR    (BIT(1))
 #define CACHE_L1_ICACHE1_UNALLOC_CLR_M  (CACHE_L1_ICACHE1_UNALLOC_CLR_V << CACHE_L1_ICACHE1_UNALLOC_CLR_S)
@@ -4300,7 +4300,7 @@ extern "C" {
 #define CACHE_L1_ICACHE3_UNALLOC_CLR_S  3
 /** CACHE_L1_DCACHE_UNALLOC_CLR : R/W; bitpos: [4]; default: 0;
  *  The bit is used to clear the unallocate request buffer of l1 dcache where the
- *  unallocate request is responsed but not completed.
+ *  unallocate request is responded but not completed.
  */
 #define CACHE_L1_DCACHE_UNALLOC_CLR    (BIT(4))
 #define CACHE_L1_DCACHE_UNALLOC_CLR_M  (CACHE_L1_DCACHE_UNALLOC_CLR_V << CACHE_L1_DCACHE_UNALLOC_CLR_S)
@@ -6156,7 +6156,7 @@ extern "C" {
 #define CACHE_L2_UNALLOCATE_BUFFER_CLEAR_REG (DR_REG_CACHE_BASE + 0x3b8)
 /** CACHE_L2_CACHE_UNALLOC_CLR : R/W; bitpos: [5]; default: 0;
  *  The bit is used to clear the unallocate request buffer of l2 icache where the
- *  unallocate request is responsed but not completed.
+ *  unallocate request is responded but not completed.
  */
 #define CACHE_L2_CACHE_UNALLOC_CLR    (BIT(5))
 #define CACHE_L2_CACHE_UNALLOC_CLR_M  (CACHE_L2_CACHE_UNALLOC_CLR_V << CACHE_L2_CACHE_UNALLOC_CLR_S)
diff --git a/components/soc/esp32p4/include/soc/cache_struct.h b/components/soc/esp32p4/register/soc/cache_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/cache_struct.h
rename to components/soc/esp32p4/register/soc/cache_struct.h
diff --git a/components/soc/esp32p4/include/soc/dma2d_reg.h b/components/soc/esp32p4/register/soc/dma2d_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/dma2d_reg.h
rename to components/soc/esp32p4/register/soc/dma2d_reg.h
diff --git a/components/soc/esp32p4/include/soc/dma2d_struct.h b/components/soc/esp32p4/register/soc/dma2d_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/dma2d_struct.h
rename to components/soc/esp32p4/register/soc/dma2d_struct.h
diff --git a/components/soc/esp32p4/include/soc/dma_pms_reg.h b/components/soc/esp32p4/register/soc/dma_pms_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/dma_pms_reg.h
rename to components/soc/esp32p4/register/soc/dma_pms_reg.h
diff --git a/components/soc/esp32p4/include/soc/dma_pms_struct.h b/components/soc/esp32p4/register/soc/dma_pms_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/dma_pms_struct.h
rename to components/soc/esp32p4/register/soc/dma_pms_struct.h
diff --git a/components/soc/esp32p4/include/soc/ds_reg.h b/components/soc/esp32p4/register/soc/ds_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/ds_reg.h
rename to components/soc/esp32p4/register/soc/ds_reg.h
diff --git a/components/soc/esp32p4/include/soc/ds_struct.h b/components/soc/esp32p4/register/soc/ds_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/ds_struct.h
rename to components/soc/esp32p4/register/soc/ds_struct.h
diff --git a/components/soc/esp32p4/include/soc/dw_gdma_reg.h b/components/soc/esp32p4/register/soc/dw_gdma_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/dw_gdma_reg.h
rename to components/soc/esp32p4/register/soc/dw_gdma_reg.h
diff --git a/components/soc/esp32p4/include/soc/dw_gdma_struct.h b/components/soc/esp32p4/register/soc/dw_gdma_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/dw_gdma_struct.h
rename to components/soc/esp32p4/register/soc/dw_gdma_struct.h
diff --git a/components/soc/esp32p4/include/soc/ecc_mult_reg.h b/components/soc/esp32p4/register/soc/ecc_mult_reg.h
similarity index 97%
rename from components/soc/esp32p4/include/soc/ecc_mult_reg.h
rename to components/soc/esp32p4/register/soc/ecc_mult_reg.h
index 2bec4bb8c7..54033489df 100644
--- a/components/soc/esp32p4/include/soc/ecc_mult_reg.h
+++ b/components/soc/esp32p4/register/soc/ecc_mult_reg.h
@@ -64,7 +64,7 @@ extern "C" {
  */
 #define ECC_MULT_CONF_REG (DR_REG_ECC_MULT_BASE + 0x1c)
 /** ECC_MULT_START : R/W/SC; bitpos: [0]; default: 0;
- *  Write 1 to start caculation of ECC Accelerator. This bit will be self-cleared after
+ *  Write 1 to start calculation of ECC Accelerator. This bit will be self-cleared after
  *  the caculatrion is done.
  */
 #define ECC_MULT_START    (BIT(0))
@@ -97,7 +97,7 @@ extern "C" {
  *  The work mode bits of ECC Accelerator. 0: Point Mult Mode. 1: Reserved. 2: Point
  *  verification mode. 3: Point Verif+mult mode. 4: Jacobian Point Mult Mode. 5: Point
  *  Add Mode. 6: Jacobian Point Verification Mode. 7: Point Verif + Jacobian Mult Mode.
- *  8: mod addition. 9. mod substraction. 10: mod multiplication. 11: mod division.
+ *  8: mod addition. 9. mod subtraction. 10: mod multiplication. 11: mod division.
  */
 #define ECC_MULT_WORK_MODE    0x0000000FU
 #define ECC_MULT_WORK_MODE_M  (ECC_MULT_WORK_MODE_V << ECC_MULT_WORK_MODE_S)
diff --git a/components/soc/esp32p4/include/soc/ecc_mult_struct.h b/components/soc/esp32p4/register/soc/ecc_mult_struct.h
similarity index 96%
rename from components/soc/esp32p4/include/soc/ecc_mult_struct.h
rename to components/soc/esp32p4/register/soc/ecc_mult_struct.h
index 5754a9e3cd..d868fcc8f1 100644
--- a/components/soc/esp32p4/include/soc/ecc_mult_struct.h
+++ b/components/soc/esp32p4/register/soc/ecc_mult_struct.h
@@ -77,7 +77,7 @@ typedef union {
 typedef union {
     struct {
         /** start : R/W/SC; bitpos: [0]; default: 0;
-         *  Write 1 to start caculation of ECC Accelerator. This bit will be self-cleared after
+         *  Write 1 to start calculation of ECC Accelerator. This bit will be self-cleared after
          *  the caculatrion is done.
          */
         uint32_t start:1;
@@ -98,7 +98,7 @@ typedef union {
          *  The work mode bits of ECC Accelerator. 0: Point Mult Mode. 1: Reserved. 2: Point
          *  verification mode. 3: Point Verif+mult mode. 4: Jacobian Point Mult Mode. 5: Point
          *  Add Mode. 6: Jacobian Point Verification Mode. 7: Point Verif + Jacobian Mult Mode.
-         *  8: mod addition. 9. mod substraction. 10: mod multiplication. 11: mod division.
+         *  8: mod addition. 9. mod subtraction. 10: mod multiplication. 11: mod division.
          */
         uint32_t work_mode:4;
         /** security_mode : R/W; bitpos: [8]; default: 0;
diff --git a/components/soc/esp32p4/include/soc/ecdsa_reg.h b/components/soc/esp32p4/register/soc/ecdsa_reg.h
similarity index 98%
rename from components/soc/esp32p4/include/soc/ecdsa_reg.h
rename to components/soc/esp32p4/register/soc/ecdsa_reg.h
index 6e09925e09..b5cc4f696a 100644
--- a/components/soc/esp32p4/include/soc/ecdsa_reg.h
+++ b/components/soc/esp32p4/register/soc/ecdsa_reg.h
@@ -155,7 +155,7 @@ extern "C" {
  */
 #define ECDSA_START_REG (DR_REG_ECDSA_BASE + 0x1c)
 /** ECDSA_START : WT; bitpos: [0]; default: 0;
- *  Write 1 to start caculation of ECDSA Accelerator. This bit will be self-cleared
+ *  Write 1 to start calculation of ECDSA Accelerator. This bit will be self-cleared
  *  after configuration.
  */
 #define ECDSA_START    (BIT(0))
@@ -243,7 +243,7 @@ extern "C" {
  */
 #define ECDSA_SHA_START_REG (DR_REG_ECDSA_BASE + 0x210)
 /** ECDSA_SHA_START : WT; bitpos: [0]; default: 0;
- *  Write 1 to start the first caculation of SHA Calculator in ECDSA Accelerator. This
+ *  Write 1 to start the first calculation of SHA Calculator in ECDSA Accelerator. This
  *  bit will be self-cleared after configuration.
  */
 #define ECDSA_SHA_START    (BIT(0))
@@ -256,7 +256,7 @@ extern "C" {
  */
 #define ECDSA_SHA_CONTINUE_REG (DR_REG_ECDSA_BASE + 0x214)
 /** ECDSA_SHA_CONTINUE : WT; bitpos: [0]; default: 0;
- *  Write 1 to start the latter caculation of SHA Calculator in ECDSA Accelerator. This
+ *  Write 1 to start the latter calculation of SHA Calculator in ECDSA Accelerator. This
  *  bit will be self-cleared after configuration.
  */
 #define ECDSA_SHA_CONTINUE    (BIT(0))
diff --git a/components/soc/esp32p4/include/soc/ecdsa_struct.h b/components/soc/esp32p4/register/soc/ecdsa_struct.h
similarity index 97%
rename from components/soc/esp32p4/include/soc/ecdsa_struct.h
rename to components/soc/esp32p4/register/soc/ecdsa_struct.h
index 1d39f1ad04..67e226f86d 100644
--- a/components/soc/esp32p4/include/soc/ecdsa_struct.h
+++ b/components/soc/esp32p4/register/soc/ecdsa_struct.h
@@ -57,7 +57,7 @@ typedef union {
 typedef union {
     struct {
         /** start : WT; bitpos: [0]; default: 0;
-         *  Write 1 to start caculation of ECDSA Accelerator. This bit will be self-cleared
+         *  Write 1 to start calculation of ECDSA Accelerator. This bit will be self-cleared
          *  after configuration.
          */
         uint32_t start:1;
@@ -228,7 +228,7 @@ typedef union {
 typedef union {
     struct {
         /** sha_start : WT; bitpos: [0]; default: 0;
-         *  Write 1 to start the first caculation of SHA Calculator in ECDSA Accelerator. This
+         *  Write 1 to start the first calculation of SHA Calculator in ECDSA Accelerator. This
          *  bit will be self-cleared after configuration.
          */
         uint32_t sha_start:1;
@@ -243,7 +243,7 @@ typedef union {
 typedef union {
     struct {
         /** sha_continue : WT; bitpos: [0]; default: 0;
-         *  Write 1 to start the latter caculation of SHA Calculator in ECDSA Accelerator. This
+         *  Write 1 to start the latter calculation of SHA Calculator in ECDSA Accelerator. This
          *  bit will be self-cleared after configuration.
          */
         uint32_t sha_continue:1;
diff --git a/components/soc/esp32p4/include/soc/efuse_reg.h b/components/soc/esp32p4/register/soc/efuse_reg.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/efuse_reg.h
rename to components/soc/esp32p4/register/soc/efuse_reg.h
index 310bdaa73f..f26a3c342e 100644
--- a/components/soc/esp32p4/include/soc/efuse_reg.h
+++ b/components/soc/esp32p4/register/soc/efuse_reg.h
@@ -7,7 +7,7 @@
 
 #include <stdint.h>
 #include "soc/soc.h"
-#include "efuse_defs.h"
+#include "soc/efuse_defs.h"
 #ifdef __cplusplus
 extern "C" {
 #endif
diff --git a/components/soc/esp32p4/include/soc/efuse_struct.h b/components/soc/esp32p4/register/soc/efuse_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/efuse_struct.h
rename to components/soc/esp32p4/register/soc/efuse_struct.h
diff --git a/components/soc/esp32p4/include/soc/emac_dma_struct.h b/components/soc/esp32p4/register/soc/emac_dma_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/emac_dma_struct.h
rename to components/soc/esp32p4/register/soc/emac_dma_struct.h
diff --git a/components/soc/esp32p4/include/soc/emac_mac_struct.h b/components/soc/esp32p4/register/soc/emac_mac_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/emac_mac_struct.h
rename to components/soc/esp32p4/register/soc/emac_mac_struct.h
diff --git a/components/soc/esp32p4/include/soc/gpio_ext_reg.h b/components/soc/esp32p4/register/soc/gpio_ext_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/gpio_ext_reg.h
rename to components/soc/esp32p4/register/soc/gpio_ext_reg.h
diff --git a/components/soc/esp32p4/include/soc/gpio_ext_struct.h b/components/soc/esp32p4/register/soc/gpio_ext_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/gpio_ext_struct.h
rename to components/soc/esp32p4/register/soc/gpio_ext_struct.h
diff --git a/components/soc/esp32p4/include/soc/gpio_reg.h b/components/soc/esp32p4/register/soc/gpio_reg.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/gpio_reg.h
rename to components/soc/esp32p4/register/soc/gpio_reg.h
index 014c375394..06b1612992 100644
--- a/components/soc/esp32p4/include/soc/gpio_reg.h
+++ b/components/soc/esp32p4/register/soc/gpio_reg.h
@@ -12151,11 +12151,11 @@ extern "C" {
 #define GPIO_SEND_SEQ_S  0
 
 /** GPIO_RECIVE_SEQ_REG register
- *  High speed sdio pad bist recive sequence
+ *  High speed sdio pad bist receive sequence
  */
 #define GPIO_RECIVE_SEQ_REG (DR_REG_GPIO_BASE + 0x71c)
 /** GPIO_RECIVE_SEQ : RO; bitpos: [31:0]; default: 0;
- *  High speed sdio pad bist recive sequence
+ *  High speed sdio pad bist receive sequence
  */
 #define GPIO_RECIVE_SEQ    0xFFFFFFFFU
 #define GPIO_RECIVE_SEQ_M  (GPIO_RECIVE_SEQ_V << GPIO_RECIVE_SEQ_S)
diff --git a/components/soc/esp32p4/include/soc/gpio_struct.h b/components/soc/esp32p4/register/soc/gpio_struct.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/gpio_struct.h
rename to components/soc/esp32p4/register/soc/gpio_struct.h
index 052c0b9a6d..5a9cab9171 100644
--- a/components/soc/esp32p4/include/soc/gpio_struct.h
+++ b/components/soc/esp32p4/register/soc/gpio_struct.h
@@ -580,12 +580,12 @@ typedef union {
 } gpio_send_seq_reg_t;
 
 /** Type of recive_seq register
- *  High speed sdio pad bist recive sequence
+ *  High speed sdio pad bist receive sequence
  */
 typedef union {
     struct {
         /** recive_seq : RO; bitpos: [31:0]; default: 0;
-         *  High speed sdio pad bist recive sequence
+         *  High speed sdio pad bist receive sequence
          */
         uint32_t recive_seq:32;
     };
diff --git a/components/soc/esp32p4/include/soc/h264_dma_reg.h b/components/soc/esp32p4/register/soc/h264_dma_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/h264_dma_reg.h
rename to components/soc/esp32p4/register/soc/h264_dma_reg.h
diff --git a/components/soc/esp32p4/include/soc/h264_dma_struct.h b/components/soc/esp32p4/register/soc/h264_dma_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/h264_dma_struct.h
rename to components/soc/esp32p4/register/soc/h264_dma_struct.h
diff --git a/components/soc/esp32p4/include/soc/h264_reg.h b/components/soc/esp32p4/register/soc/h264_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/h264_reg.h
rename to components/soc/esp32p4/register/soc/h264_reg.h
diff --git a/components/soc/esp32p4/include/soc/h264_struct.h b/components/soc/esp32p4/register/soc/h264_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/h264_struct.h
rename to components/soc/esp32p4/register/soc/h264_struct.h
diff --git a/components/soc/esp32p4/include/soc/hmac_reg.h b/components/soc/esp32p4/register/soc/hmac_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/hmac_reg.h
rename to components/soc/esp32p4/register/soc/hmac_reg.h
diff --git a/components/soc/esp32p4/include/soc/hmac_struct.h b/components/soc/esp32p4/register/soc/hmac_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/hmac_struct.h
rename to components/soc/esp32p4/register/soc/hmac_struct.h
diff --git a/components/soc/esp32p4/include/soc/hp2lp_peri_pms_reg.h b/components/soc/esp32p4/register/soc/hp2lp_peri_pms_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/hp2lp_peri_pms_reg.h
rename to components/soc/esp32p4/register/soc/hp2lp_peri_pms_reg.h
diff --git a/components/soc/esp32p4/include/soc/hp2lp_peri_pms_struct.h b/components/soc/esp32p4/register/soc/hp2lp_peri_pms_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/hp2lp_peri_pms_struct.h
rename to components/soc/esp32p4/register/soc/hp2lp_peri_pms_struct.h
diff --git a/components/soc/esp32p4/include/soc/hp_peri_pms_reg.h b/components/soc/esp32p4/register/soc/hp_peri_pms_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/hp_peri_pms_reg.h
rename to components/soc/esp32p4/register/soc/hp_peri_pms_reg.h
diff --git a/components/soc/esp32p4/include/soc/hp_peri_pms_struct.h b/components/soc/esp32p4/register/soc/hp_peri_pms_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/hp_peri_pms_struct.h
rename to components/soc/esp32p4/register/soc/hp_peri_pms_struct.h
diff --git a/components/soc/esp32p4/include/soc/hp_sys_clkrst_reg.h b/components/soc/esp32p4/register/soc/hp_sys_clkrst_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/hp_sys_clkrst_reg.h
rename to components/soc/esp32p4/register/soc/hp_sys_clkrst_reg.h
diff --git a/components/soc/esp32p4/include/soc/hp_sys_clkrst_struct.h b/components/soc/esp32p4/register/soc/hp_sys_clkrst_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/hp_sys_clkrst_struct.h
rename to components/soc/esp32p4/register/soc/hp_sys_clkrst_struct.h
diff --git a/components/soc/esp32p4/include/soc/hp_system_reg.h b/components/soc/esp32p4/register/soc/hp_system_reg.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/hp_system_reg.h
rename to components/soc/esp32p4/register/soc/hp_system_reg.h
index ec9b55a793..e5d5a228e6 100644
--- a/components/soc/esp32p4/include/soc/hp_system_reg.h
+++ b/components/soc/esp32p4/register/soc/hp_system_reg.h
@@ -39,7 +39,7 @@ extern "C" {
  */
 #define HP_SYSTEM_CPU_INT_FROM_CPU_0_REG (DR_REG_HP_SYS_BASE + 0x10)
 /** HP_SYSTEM_CPU_INT_FROM_CPU_0 : R/W; bitpos: [0]; default: 0;
- *  set 1 will triger a interrupt
+ *  set 1 will trigger a interrupt
  */
 #define HP_SYSTEM_CPU_INT_FROM_CPU_0    (BIT(0))
 #define HP_SYSTEM_CPU_INT_FROM_CPU_0_M  (HP_SYSTEM_CPU_INT_FROM_CPU_0_V << HP_SYSTEM_CPU_INT_FROM_CPU_0_S)
@@ -51,7 +51,7 @@ extern "C" {
  */
 #define HP_SYSTEM_CPU_INT_FROM_CPU_1_REG (DR_REG_HP_SYS_BASE + 0x14)
 /** HP_SYSTEM_CPU_INT_FROM_CPU_1 : R/W; bitpos: [0]; default: 0;
- *  set 1 will triger a interrupt
+ *  set 1 will trigger a interrupt
  */
 #define HP_SYSTEM_CPU_INT_FROM_CPU_1    (BIT(0))
 #define HP_SYSTEM_CPU_INT_FROM_CPU_1_M  (HP_SYSTEM_CPU_INT_FROM_CPU_1_V << HP_SYSTEM_CPU_INT_FROM_CPU_1_S)
@@ -63,7 +63,7 @@ extern "C" {
  */
 #define HP_SYSTEM_CPU_INT_FROM_CPU_2_REG (DR_REG_HP_SYS_BASE + 0x18)
 /** HP_SYSTEM_CPU_INT_FROM_CPU_2 : R/W; bitpos: [0]; default: 0;
- *  set 1 will triger a interrupt
+ *  set 1 will trigger a interrupt
  */
 #define HP_SYSTEM_CPU_INT_FROM_CPU_2    (BIT(0))
 #define HP_SYSTEM_CPU_INT_FROM_CPU_2_M  (HP_SYSTEM_CPU_INT_FROM_CPU_2_V << HP_SYSTEM_CPU_INT_FROM_CPU_2_S)
@@ -75,7 +75,7 @@ extern "C" {
  */
 #define HP_SYSTEM_CPU_INT_FROM_CPU_3_REG (DR_REG_HP_SYS_BASE + 0x1c)
 /** HP_SYSTEM_CPU_INT_FROM_CPU_3 : R/W; bitpos: [0]; default: 0;
- *  set 1 will triger a interrupt
+ *  set 1 will trigger a interrupt
  */
 #define HP_SYSTEM_CPU_INT_FROM_CPU_3    (BIT(0))
 #define HP_SYSTEM_CPU_INT_FROM_CPU_3_M  (HP_SYSTEM_CPU_INT_FROM_CPU_3_V << HP_SYSTEM_CPU_INT_FROM_CPU_3_S)
@@ -87,7 +87,7 @@ extern "C" {
  */
 #define HP_SYSTEM_CACHE_CLK_CONFIG_REG (DR_REG_HP_SYS_BASE + 0x20)
 /** HP_SYSTEM_REG_L2_CACHE_CLK_ON : R/W; bitpos: [0]; default: 1;
- *  l2 cahce clk enable
+ *  l2 cache clk enable
  */
 #define HP_SYSTEM_REG_L2_CACHE_CLK_ON    (BIT(0))
 #define HP_SYSTEM_REG_L2_CACHE_CLK_ON_M  (HP_SYSTEM_REG_L2_CACHE_CLK_ON_V << HP_SYSTEM_REG_L2_CACHE_CLK_ON_S)
@@ -269,7 +269,7 @@ extern "C" {
  */
 #define HP_SYSTEM_PROBEA_CTRL_REG (DR_REG_HP_SYS_BASE + 0x50)
 /** HP_SYSTEM_REG_PROBE_A_MOD_SEL : R/W; bitpos: [15:0]; default: 0;
- *  Tihs field is used to selec probe_group from probe_group0 to probe_group15 for
+ *  This field is used to selec probe_group from probe_group0 to probe_group15 for
  *  module's probe_out[31:0] in a mode
  */
 #define HP_SYSTEM_REG_PROBE_A_MOD_SEL    0x0000FFFFU
@@ -277,21 +277,21 @@ extern "C" {
 #define HP_SYSTEM_REG_PROBE_A_MOD_SEL_V  0x0000FFFFU
 #define HP_SYSTEM_REG_PROBE_A_MOD_SEL_S  0
 /** HP_SYSTEM_REG_PROBE_A_TOP_SEL : R/W; bitpos: [23:16]; default: 0;
- *  Tihs field is used to selec module's probe_out[31:0] as probe out in a mode
+ *  This field is used to selec module's probe_out[31:0] as probe out in a mode
  */
 #define HP_SYSTEM_REG_PROBE_A_TOP_SEL    0x000000FFU
 #define HP_SYSTEM_REG_PROBE_A_TOP_SEL_M  (HP_SYSTEM_REG_PROBE_A_TOP_SEL_V << HP_SYSTEM_REG_PROBE_A_TOP_SEL_S)
 #define HP_SYSTEM_REG_PROBE_A_TOP_SEL_V  0x000000FFU
 #define HP_SYSTEM_REG_PROBE_A_TOP_SEL_S  16
 /** HP_SYSTEM_REG_PROBE_L_SEL : R/W; bitpos: [25:24]; default: 0;
- *  Tihs field is used to selec probe_out[31:16]
+ *  This field is used to selec probe_out[31:16]
  */
 #define HP_SYSTEM_REG_PROBE_L_SEL    0x00000003U
 #define HP_SYSTEM_REG_PROBE_L_SEL_M  (HP_SYSTEM_REG_PROBE_L_SEL_V << HP_SYSTEM_REG_PROBE_L_SEL_S)
 #define HP_SYSTEM_REG_PROBE_L_SEL_V  0x00000003U
 #define HP_SYSTEM_REG_PROBE_L_SEL_S  24
 /** HP_SYSTEM_REG_PROBE_H_SEL : R/W; bitpos: [27:26]; default: 0;
- *  Tihs field is used to selec probe_out[31:16]
+ *  This field is used to selec probe_out[31:16]
  */
 #define HP_SYSTEM_REG_PROBE_H_SEL    0x00000003U
 #define HP_SYSTEM_REG_PROBE_H_SEL_M  (HP_SYSTEM_REG_PROBE_H_SEL_V << HP_SYSTEM_REG_PROBE_H_SEL_S)
@@ -310,7 +310,7 @@ extern "C" {
  */
 #define HP_SYSTEM_PROBEB_CTRL_REG (DR_REG_HP_SYS_BASE + 0x54)
 /** HP_SYSTEM_REG_PROBE_B_MOD_SEL : R/W; bitpos: [15:0]; default: 0;
- *  Tihs field is used to selec probe_group from probe_group0 to probe_group15 for
+ *  This field is used to selec probe_group from probe_group0 to probe_group15 for
  *  module's probe_out[31:0] in b mode.
  */
 #define HP_SYSTEM_REG_PROBE_B_MOD_SEL    0x0000FFFFU
@@ -318,7 +318,7 @@ extern "C" {
 #define HP_SYSTEM_REG_PROBE_B_MOD_SEL_V  0x0000FFFFU
 #define HP_SYSTEM_REG_PROBE_B_MOD_SEL_S  0
 /** HP_SYSTEM_REG_PROBE_B_TOP_SEL : R/W; bitpos: [23:16]; default: 0;
- *  Tihs field is used to select module's probe_out[31:0]  as probe_out in b mode
+ *  This field is used to select module's probe_out[31:0]  as probe_out in b mode
  */
 #define HP_SYSTEM_REG_PROBE_B_TOP_SEL    0x000000FFU
 #define HP_SYSTEM_REG_PROBE_B_TOP_SEL_M  (HP_SYSTEM_REG_PROBE_B_TOP_SEL_V << HP_SYSTEM_REG_PROBE_B_TOP_SEL_S)
@@ -1069,7 +1069,7 @@ extern "C" {
  */
 #define HP_SYSTEM_BITSCRAMBLER_PERI_SEL_REG (DR_REG_HP_SYS_BASE + 0x140)
 /** HP_SYSTEM_BITSCRAMBLER_PERI_RX_SEL : R/W; bitpos: [3:0]; default: 15;
- *  Set  this field to sel peri with DMA RX interface to connec with bitscrambler: 4'h0
+ *  Set  this field to sel peri with DMA RX interface to connect with bitscrambler: 4'h0
  *  : lcd_cam, 4'h1: gpspi2, 4'h2: gpspi3, 4'h3: parl_io, 4'h4: aes, 4'h5: sha, 4'h6:
  *  adc, 4'h7: i2s0, 4'h8: i2s1, 4'h9: i2s2, 4'ha: i3c_mst, 4'hb: uhci0, 4'hc: RMT,
  *  else : none
@@ -1079,7 +1079,7 @@ extern "C" {
 #define HP_SYSTEM_BITSCRAMBLER_PERI_RX_SEL_V  0x0000000FU
 #define HP_SYSTEM_BITSCRAMBLER_PERI_RX_SEL_S  0
 /** HP_SYSTEM_BITSCRAMBLER_PERI_TX_SEL : R/W; bitpos: [7:4]; default: 15;
- *  Set  this field to sel peri with DMA TX interface to connec with bitscrambler: 4'h0
+ *  Set  this field to sel peri with DMA TX interface to connect with bitscrambler: 4'h0
  *  : lcd_cam, 4'h1: gpspi2, 4'h2: gpspi3, 4'h3: parl_io, 4'h4: aes, 4'h5: sha, 4'h6:
  *  adc, 4'h7: i2s0, 4'h8: i2s1, 4'h9: i2s2, 4'ha: i3c_mst, 4'hb: uhci0, 4'hc: RMT,
  *  else : none
diff --git a/components/soc/esp32p4/include/soc/hp_system_struct.h b/components/soc/esp32p4/register/soc/hp_system_struct.h
similarity index 98%
rename from components/soc/esp32p4/include/soc/hp_system_struct.h
rename to components/soc/esp32p4/register/soc/hp_system_struct.h
index 628ef31ef4..4e3d23f78a 100644
--- a/components/soc/esp32p4/include/soc/hp_system_struct.h
+++ b/components/soc/esp32p4/register/soc/hp_system_struct.h
@@ -48,7 +48,7 @@ typedef union {
 typedef union {
     struct {
         /** cpu_int_from_cpu_0 : R/W; bitpos: [0]; default: 0;
-         *  set 1 will triger a interrupt
+         *  set 1 will trigger a interrupt
          */
         uint32_t cpu_int_from_cpu_0:1;
         uint32_t reserved_1:31;
@@ -64,7 +64,7 @@ typedef union {
 typedef union {
     struct {
         /** cpu_int_from_cpu_1 : R/W; bitpos: [0]; default: 0;
-         *  set 1 will triger a interrupt
+         *  set 1 will trigger a interrupt
          */
         uint32_t cpu_int_from_cpu_1:1;
         uint32_t reserved_1:31;
@@ -80,7 +80,7 @@ typedef union {
 typedef union {
     struct {
         /** cpu_int_from_cpu_2 : R/W; bitpos: [0]; default: 0;
-         *  set 1 will triger a interrupt
+         *  set 1 will trigger a interrupt
          */
         uint32_t cpu_int_from_cpu_2:1;
         uint32_t reserved_1:31;
@@ -96,7 +96,7 @@ typedef union {
 typedef union {
     struct {
         /** cpu_int_from_cpu_3 : R/W; bitpos: [0]; default: 0;
-         *  set 1 will triger a interrupt
+         *  set 1 will trigger a interrupt
          */
         uint32_t cpu_int_from_cpu_3:1;
         uint32_t reserved_1:31;
@@ -112,7 +112,7 @@ typedef union {
 typedef union {
     struct {
         /** reg_l2_cache_clk_on : R/W; bitpos: [0]; default: 1;
-         *  l2 cahce clk enable
+         *  l2 cache clk enable
          */
         uint32_t reg_l2_cache_clk_on:1;
         /** reg_l1_d_cache_clk_on : R/W; bitpos: [1]; default: 1;
@@ -283,20 +283,20 @@ typedef union {
 typedef union {
     struct {
         /** reg_probe_a_mod_sel : R/W; bitpos: [15:0]; default: 0;
-         *  Tihs field is used to selec probe_group from probe_group0 to probe_group15 for
+         *  This field is used to selec probe_group from probe_group0 to probe_group15 for
          *  module's probe_out[31:0] in a mode
          */
         uint32_t reg_probe_a_mod_sel:16;
         /** reg_probe_a_top_sel : R/W; bitpos: [23:16]; default: 0;
-         *  Tihs field is used to selec module's probe_out[31:0] as probe out in a mode
+         *  This field is used to selec module's probe_out[31:0] as probe out in a mode
          */
         uint32_t reg_probe_a_top_sel:8;
         /** reg_probe_l_sel : R/W; bitpos: [25:24]; default: 0;
-         *  Tihs field is used to selec probe_out[31:16]
+         *  This field is used to selec probe_out[31:16]
          */
         uint32_t reg_probe_l_sel:2;
         /** reg_probe_h_sel : R/W; bitpos: [27:26]; default: 0;
-         *  Tihs field is used to selec probe_out[31:16]
+         *  This field is used to selec probe_out[31:16]
          */
         uint32_t reg_probe_h_sel:2;
         /** reg_probe_global_en : R/W; bitpos: [28]; default: 0;
@@ -316,12 +316,12 @@ typedef union {
 typedef union {
     struct {
         /** reg_probe_b_mod_sel : R/W; bitpos: [15:0]; default: 0;
-         *  Tihs field is used to selec probe_group from probe_group0 to probe_group15 for
+         *  This field is used to selec probe_group from probe_group0 to probe_group15 for
          *  module's probe_out[31:0] in b mode.
          */
         uint32_t reg_probe_b_mod_sel:16;
         /** reg_probe_b_top_sel : R/W; bitpos: [23:16]; default: 0;
-         *  Tihs field is used to select module's probe_out[31:0]  as probe_out in b mode
+         *  This field is used to select module's probe_out[31:0]  as probe_out in b mode
          */
         uint32_t reg_probe_b_top_sel:8;
         /** reg_probe_b_en : R/W; bitpos: [24]; default: 0;
@@ -834,7 +834,7 @@ typedef union {
 } hp_system_tcm_rdn_eco_high_reg_t;
 
 
-/** Group: HP GPIO DED HOLD CTRL REG */
+/** Group: HP GPIO DEAD HOLD CTRL REG */
 /** Type of gpio_ded_hold_ctrl register
  *  NA
  */
@@ -1021,14 +1021,14 @@ typedef union {
 typedef union {
     struct {
         /** bitscrambler_peri_rx_sel : R/W; bitpos: [3:0]; default: 15;
-         *  Set  this field to sel peri with DMA RX interface to connec with bitscrambler: 4'h0
+         *  Set  this field to sel peri with DMA RX interface to connect with bitscrambler: 4'h0
          *  : lcd_cam, 4'h1: gpspi2, 4'h2: gpspi3, 4'h3: parl_io, 4'h4: aes, 4'h5: sha, 4'h6:
          *  adc, 4'h7: i2s0, 4'h8: i2s1, 4'h9: i2s2, 4'ha: i3c_mst, 4'hb: uhci0, 4'hc: RMT,
          *  else : none
          */
         uint32_t bitscrambler_peri_rx_sel:4;
         /** bitscrambler_peri_tx_sel : R/W; bitpos: [7:4]; default: 15;
-         *  Set  this field to sel peri with DMA TX interface to connec with bitscrambler: 4'h0
+         *  Set  this field to sel peri with DMA TX interface to connect with bitscrambler: 4'h0
          *  : lcd_cam, 4'h1: gpspi2, 4'h2: gpspi3, 4'h3: parl_io, 4'h4: aes, 4'h5: sha, 4'h6:
          *  adc, 4'h7: i2s0, 4'h8: i2s1, 4'h9: i2s2, 4'ha: i3c_mst, 4'hb: uhci0, 4'hc: RMT,
          *  else : none
diff --git a/components/soc/esp32p4/include/soc/huk_reg.h b/components/soc/esp32p4/register/soc/huk_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/huk_reg.h
rename to components/soc/esp32p4/register/soc/huk_reg.h
diff --git a/components/soc/esp32p4/include/soc/huk_struct.h b/components/soc/esp32p4/register/soc/huk_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/huk_struct.h
rename to components/soc/esp32p4/register/soc/huk_struct.h
diff --git a/components/soc/esp32p4/include/soc/i2c_ana_mst_reg.h b/components/soc/esp32p4/register/soc/i2c_ana_mst_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/i2c_ana_mst_reg.h
rename to components/soc/esp32p4/register/soc/i2c_ana_mst_reg.h
diff --git a/components/soc/esp32p4/include/soc/i2c_ana_mst_struct.h b/components/soc/esp32p4/register/soc/i2c_ana_mst_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/i2c_ana_mst_struct.h
rename to components/soc/esp32p4/register/soc/i2c_ana_mst_struct.h
diff --git a/components/soc/esp32p4/include/soc/i2c_reg.h b/components/soc/esp32p4/register/soc/i2c_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/i2c_reg.h
rename to components/soc/esp32p4/register/soc/i2c_reg.h
diff --git a/components/soc/esp32p4/include/soc/i2c_struct.h b/components/soc/esp32p4/register/soc/i2c_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/i2c_struct.h
rename to components/soc/esp32p4/register/soc/i2c_struct.h
diff --git a/components/soc/esp32p4/include/soc/i2s_reg.h b/components/soc/esp32p4/register/soc/i2s_reg.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/i2s_reg.h
rename to components/soc/esp32p4/register/soc/i2s_reg.h
index cf9267487d..88ada789e7 100644
--- a/components/soc/esp32p4/include/soc/i2s_reg.h
+++ b/components/soc/esp32p4/register/soc/i2s_reg.h
@@ -320,7 +320,7 @@ extern "C" {
 #define I2S_TX_SLAVE_MOD_V  0x00000001U
 #define I2S_TX_SLAVE_MOD_S  3
 /** I2S_TX_STOP_EN : R/W; bitpos: [4]; default: 1;
- *  Set this bit to stop disable output BCK signal and WS signal when tx FIFO is emtpy
+ *  Set this bit to stop disable output BCK signal and WS signal when tx FIFO is empty
  */
 #define I2S_TX_STOP_EN    (BIT(4))
 #define I2S_TX_STOP_EN_M  (I2S_TX_STOP_EN_V << I2S_TX_STOP_EN_S)
diff --git a/components/soc/esp32p4/include/soc/i2s_struct.h b/components/soc/esp32p4/register/soc/i2s_struct.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/i2s_struct.h
rename to components/soc/esp32p4/register/soc/i2s_struct.h
index 6e05f6a2eb..191b9dc6a1 100644
--- a/components/soc/esp32p4/include/soc/i2s_struct.h
+++ b/components/soc/esp32p4/register/soc/i2s_struct.h
@@ -496,7 +496,7 @@ typedef union {
          */
         uint32_t tx_slave_mod:1;
         /** tx_stop_en : R/W; bitpos: [4]; default: 1;
-         *  Set this bit to stop disable output BCK signal and WS signal when tx FIFO is emtpy
+         *  Set this bit to stop disable output BCK signal and WS signal when tx FIFO is empty
          */
         uint32_t tx_stop_en:1;
         /** tx_chan_equal : R/W; bitpos: [5]; default: 0;
diff --git a/components/soc/esp32p4/include/soc/i3c_mst_mem_reg.h b/components/soc/esp32p4/register/soc/i3c_mst_mem_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/i3c_mst_mem_reg.h
rename to components/soc/esp32p4/register/soc/i3c_mst_mem_reg.h
diff --git a/components/soc/esp32p4/include/soc/i3c_mst_mem_struct.h b/components/soc/esp32p4/register/soc/i3c_mst_mem_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/i3c_mst_mem_struct.h
rename to components/soc/esp32p4/register/soc/i3c_mst_mem_struct.h
diff --git a/components/soc/esp32p4/include/soc/i3c_mst_reg.h b/components/soc/esp32p4/register/soc/i3c_mst_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/i3c_mst_reg.h
rename to components/soc/esp32p4/register/soc/i3c_mst_reg.h
diff --git a/components/soc/esp32p4/include/soc/i3c_mst_struct.h b/components/soc/esp32p4/register/soc/i3c_mst_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/i3c_mst_struct.h
rename to components/soc/esp32p4/register/soc/i3c_mst_struct.h
diff --git a/components/soc/esp32p4/include/soc/i3c_slv_reg.h b/components/soc/esp32p4/register/soc/i3c_slv_reg.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/i3c_slv_reg.h
rename to components/soc/esp32p4/register/soc/i3c_slv_reg.h
index a5684d88e0..335ec44fc2 100644
--- a/components/soc/esp32p4/include/soc/i3c_slv_reg.h
+++ b/components/soc/esp32p4/register/soc/i3c_slv_reg.h
@@ -103,7 +103,7 @@ extern "C" {
 #define I3C_SLV_STNOTSTOP_V  0x00000001U
 #define I3C_SLV_STNOTSTOP_S  0
 /** I3C_SLV_STMSG : RO; bitpos: [1]; default: 0;
- *  Is 1 if this bus Slave is listening to the bus traffic or repsonding, If
+ *  Is 1 if this bus Slave is listening to the bus traffic or responding, If
  *  STNOSTOP=1, then this will be 0 when a non-matching address seen until next
  *  respeated START it STOP.
  */
diff --git a/components/soc/esp32p4/include/soc/i3c_slv_struct.h b/components/soc/esp32p4/register/soc/i3c_slv_struct.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/i3c_slv_struct.h
rename to components/soc/esp32p4/register/soc/i3c_slv_struct.h
index 125ca7d627..7df80af894 100644
--- a/components/soc/esp32p4/include/soc/i3c_slv_struct.h
+++ b/components/soc/esp32p4/register/soc/i3c_slv_struct.h
@@ -83,7 +83,7 @@ typedef union {
          */
         uint32_t stnotstop:1;
         /** stmsg : RO; bitpos: [1]; default: 0;
-         *  Is 1 if this bus Slave is listening to the bus traffic or repsonding, If
+         *  Is 1 if this bus Slave is listening to the bus traffic or responding, If
          *  STNOSTOP=1, then this will be 0 when a non-matching address seen until next
          *  respeated START it STOP.
          */
@@ -459,10 +459,10 @@ typedef union {
  */
 typedef union {
     struct {
-        /** capablities : RO; bitpos: [31:0]; default: 2081684508;
+        /** capabilities : RO; bitpos: [31:0]; default: 2081684508;
          *  NA
          */
-        uint32_t capablities:32;
+        uint32_t capabilities:32;
     };
     uint32_t val;
 } i3c_slv_capabilities_reg_t;
diff --git a/components/soc/esp32p4/include/soc/icm_sys_qos_reg.h b/components/soc/esp32p4/register/soc/icm_sys_qos_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/icm_sys_qos_reg.h
rename to components/soc/esp32p4/register/soc/icm_sys_qos_reg.h
diff --git a/components/soc/esp32p4/include/soc/icm_sys_qos_struct.h b/components/soc/esp32p4/register/soc/icm_sys_qos_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/icm_sys_qos_struct.h
rename to components/soc/esp32p4/register/soc/icm_sys_qos_struct.h
diff --git a/components/soc/esp32p4/include/soc/icm_sys_reg.h b/components/soc/esp32p4/register/soc/icm_sys_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/icm_sys_reg.h
rename to components/soc/esp32p4/register/soc/icm_sys_reg.h
diff --git a/components/soc/esp32p4/include/soc/icm_sys_struct.h b/components/soc/esp32p4/register/soc/icm_sys_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/icm_sys_struct.h
rename to components/soc/esp32p4/register/soc/icm_sys_struct.h
diff --git a/components/soc/esp32p4/include/soc/interrupt_core0_reg.h b/components/soc/esp32p4/register/soc/interrupt_core0_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/interrupt_core0_reg.h
rename to components/soc/esp32p4/register/soc/interrupt_core0_reg.h
diff --git a/components/soc/esp32p4/include/soc/interrupt_core0_struct.h b/components/soc/esp32p4/register/soc/interrupt_core0_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/interrupt_core0_struct.h
rename to components/soc/esp32p4/register/soc/interrupt_core0_struct.h
diff --git a/components/soc/esp32p4/include/soc/interrupt_core1_reg.h b/components/soc/esp32p4/register/soc/interrupt_core1_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/interrupt_core1_reg.h
rename to components/soc/esp32p4/register/soc/interrupt_core1_reg.h
diff --git a/components/soc/esp32p4/include/soc/interrupt_core1_struct.h b/components/soc/esp32p4/register/soc/interrupt_core1_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/interrupt_core1_struct.h
rename to components/soc/esp32p4/register/soc/interrupt_core1_struct.h
diff --git a/components/soc/esp32p4/include/soc/io_mux_reg.h b/components/soc/esp32p4/register/soc/io_mux_reg.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/io_mux_reg.h
rename to components/soc/esp32p4/register/soc/io_mux_reg.h
index 02440af903..d7eba33c2c 100644
--- a/components/soc/esp32p4/include/soc/io_mux_reg.h
+++ b/components/soc/esp32p4/register/soc/io_mux_reg.h
@@ -5,7 +5,7 @@
  */
 
 #pragma once
-#include "soc.h"
+#include "soc/soc.h"
 
 /* The following are the bit fields for PERIPHS_IO_MUX_x_U registers */
 /* Output enable in sleep mode */
diff --git a/components/soc/esp32p4/include/soc/io_mux_struct.h b/components/soc/esp32p4/register/soc/io_mux_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/io_mux_struct.h
rename to components/soc/esp32p4/register/soc/io_mux_struct.h
diff --git a/components/soc/esp32p4/include/soc/iomux_mspi_pin_reg.h b/components/soc/esp32p4/register/soc/iomux_mspi_pin_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/iomux_mspi_pin_reg.h
rename to components/soc/esp32p4/register/soc/iomux_mspi_pin_reg.h
diff --git a/components/soc/esp32p4/include/soc/iomux_mspi_pin_struct.h b/components/soc/esp32p4/register/soc/iomux_mspi_pin_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/iomux_mspi_pin_struct.h
rename to components/soc/esp32p4/register/soc/iomux_mspi_pin_struct.h
diff --git a/components/soc/esp32p4/include/soc/isp_reg.h b/components/soc/esp32p4/register/soc/isp_reg.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/isp_reg.h
rename to components/soc/esp32p4/register/soc/isp_reg.h
index 13749f014c..c1c42d64aa 100644
--- a/components/soc/esp32p4/include/soc/isp_reg.h
+++ b/components/soc/esp32p4/register/soc/isp_reg.h
@@ -521,56 +521,56 @@ extern "C" {
  */
 #define ISP_BF_GAU0_REG (DR_REG_ISP_BASE + 0x30)
 /** ISP_GAU_TEMPLATE21 : R/W; bitpos: [3:0]; default: 15;
- *  this field configures index 21 of gausian template
+ *  this field configures index 21 of gaussian template
  */
 #define ISP_GAU_TEMPLATE21    0x0000000FU
 #define ISP_GAU_TEMPLATE21_M  (ISP_GAU_TEMPLATE21_V << ISP_GAU_TEMPLATE21_S)
 #define ISP_GAU_TEMPLATE21_V  0x0000000FU
 #define ISP_GAU_TEMPLATE21_S  0
 /** ISP_GAU_TEMPLATE20 : R/W; bitpos: [7:4]; default: 15;
- *  this field configures index 20 of gausian template
+ *  this field configures index 20 of gaussian template
  */
 #define ISP_GAU_TEMPLATE20    0x0000000FU
 #define ISP_GAU_TEMPLATE20_M  (ISP_GAU_TEMPLATE20_V << ISP_GAU_TEMPLATE20_S)
 #define ISP_GAU_TEMPLATE20_V  0x0000000FU
 #define ISP_GAU_TEMPLATE20_S  4
 /** ISP_GAU_TEMPLATE12 : R/W; bitpos: [11:8]; default: 15;
- *  this field configures index 12 of gausian template
+ *  this field configures index 12 of gaussian template
  */
 #define ISP_GAU_TEMPLATE12    0x0000000FU
 #define ISP_GAU_TEMPLATE12_M  (ISP_GAU_TEMPLATE12_V << ISP_GAU_TEMPLATE12_S)
 #define ISP_GAU_TEMPLATE12_V  0x0000000FU
 #define ISP_GAU_TEMPLATE12_S  8
 /** ISP_GAU_TEMPLATE11 : R/W; bitpos: [15:12]; default: 15;
- *  this field configures index 11 of gausian template
+ *  this field configures index 11 of gaussian template
  */
 #define ISP_GAU_TEMPLATE11    0x0000000FU
 #define ISP_GAU_TEMPLATE11_M  (ISP_GAU_TEMPLATE11_V << ISP_GAU_TEMPLATE11_S)
 #define ISP_GAU_TEMPLATE11_V  0x0000000FU
 #define ISP_GAU_TEMPLATE11_S  12
 /** ISP_GAU_TEMPLATE10 : R/W; bitpos: [19:16]; default: 15;
- *  this field configures index 10 of gausian template
+ *  this field configures index 10 of gaussian template
  */
 #define ISP_GAU_TEMPLATE10    0x0000000FU
 #define ISP_GAU_TEMPLATE10_M  (ISP_GAU_TEMPLATE10_V << ISP_GAU_TEMPLATE10_S)
 #define ISP_GAU_TEMPLATE10_V  0x0000000FU
 #define ISP_GAU_TEMPLATE10_S  16
 /** ISP_GAU_TEMPLATE02 : R/W; bitpos: [23:20]; default: 15;
- *  this field configures index 02 of gausian template
+ *  this field configures index 02 of gaussian template
  */
 #define ISP_GAU_TEMPLATE02    0x0000000FU
 #define ISP_GAU_TEMPLATE02_M  (ISP_GAU_TEMPLATE02_V << ISP_GAU_TEMPLATE02_S)
 #define ISP_GAU_TEMPLATE02_V  0x0000000FU
 #define ISP_GAU_TEMPLATE02_S  20
 /** ISP_GAU_TEMPLATE01 : R/W; bitpos: [27:24]; default: 15;
- *  this field configures index 01 of gausian template
+ *  this field configures index 01 of gaussian template
  */
 #define ISP_GAU_TEMPLATE01    0x0000000FU
 #define ISP_GAU_TEMPLATE01_M  (ISP_GAU_TEMPLATE01_V << ISP_GAU_TEMPLATE01_S)
 #define ISP_GAU_TEMPLATE01_V  0x0000000FU
 #define ISP_GAU_TEMPLATE01_S  24
 /** ISP_GAU_TEMPLATE00 : R/W; bitpos: [31:28]; default: 15;
- *  this field configures index 00 of gausian template
+ *  this field configures index 00 of gaussian template
  */
 #define ISP_GAU_TEMPLATE00    0x0000000FU
 #define ISP_GAU_TEMPLATE00_M  (ISP_GAU_TEMPLATE00_V << ISP_GAU_TEMPLATE00_S)
@@ -582,7 +582,7 @@ extern "C" {
  */
 #define ISP_BF_GAU1_REG (DR_REG_ISP_BASE + 0x34)
 /** ISP_GAU_TEMPLATE22 : R/W; bitpos: [3:0]; default: 15;
- *  this field configures index 22 of gausian template
+ *  this field configures index 22 of gaussian template
  */
 #define ISP_GAU_TEMPLATE22    0x0000000FU
 #define ISP_GAU_TEMPLATE22_M  (ISP_GAU_TEMPLATE22_V << ISP_GAU_TEMPLATE22_S)
@@ -2584,7 +2584,7 @@ extern "C" {
 #define ISP_AE_MONITOR_TH_V  0x000000FFU
 #define ISP_AE_MONITOR_TH_S  8
 /** ISP_AE_MONITOR_PERIOD : R/W; bitpos: [21:16]; default: 0;
- *  this field cnfigures ae monitor frame period
+ *  this field configures ae monitor frame period
  */
 #define ISP_AE_MONITOR_PERIOD    0x0000003FU
 #define ISP_AE_MONITOR_PERIOD_M  (ISP_AE_MONITOR_PERIOD_V << ISP_AE_MONITOR_PERIOD_S)
@@ -3030,7 +3030,7 @@ extern "C" {
  */
 #define ISP_DMA_CNTL_REG (DR_REG_ISP_BASE + 0x10c)
 /** ISP_DMA_EN : WT; bitpos: [0]; default: 0;
- *  write 1 to triger dma to get 1 frame
+ *  write 1 to trigger dma to get 1 frame
  */
 #define ISP_DMA_EN    (BIT(0))
 #define ISP_DMA_EN_M  (ISP_DMA_EN_V << ISP_DMA_EN_S)
@@ -3090,7 +3090,7 @@ extern "C" {
  */
 #define ISP_CAM_CNTL_REG (DR_REG_ISP_BASE + 0x114)
 /** ISP_CAM_EN : R/W; bitpos: [0]; default: 0;
- *  write 1 to start recive camera data, write 0 to disable
+ *  write 1 to start receive camera data, write 0 to disable
  */
 #define ISP_CAM_EN    (BIT(0))
 #define ISP_CAM_EN_M  (ISP_CAM_EN_V << ISP_CAM_EN_S)
@@ -3111,7 +3111,7 @@ extern "C" {
 #define ISP_CAM_RESET_V  0x00000001U
 #define ISP_CAM_RESET_S  2
 /** ISP_CAM_CLK_INV : R/W; bitpos: [3]; default: 0;
- *  this bit configures the invertion of cam clk from pad. 0: not invert cam clk, 1:
+ *  this bit configures the inversion of cam clk from pad. 0: not invert cam clk, 1:
  *  invert cam clk
  */
 #define ISP_CAM_CLK_INV    (BIT(3))
@@ -3487,7 +3487,7 @@ extern "C" {
  */
 #define ISP_AWB_MODE_REG (DR_REG_ISP_BASE + 0x164)
 /** ISP_AWB_MODE : R/W; bitpos: [1:0]; default: 3;
- *  this field configures awb algo sel. 00: none sellected. 01: sel algo0. 10: sel
+ *  this field configures awb algo sel. 00: none selected. 01: sel algo0. 10: sel
  *  algo1. 11: sel both algo0 and algo1
  */
 #define ISP_AWB_MODE    0x00000003U
diff --git a/components/soc/esp32p4/include/soc/isp_struct.h b/components/soc/esp32p4/register/soc/isp_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/isp_struct.h
rename to components/soc/esp32p4/register/soc/isp_struct.h
diff --git a/components/soc/esp32p4/include/soc/jpeg_reg.h b/components/soc/esp32p4/register/soc/jpeg_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/jpeg_reg.h
rename to components/soc/esp32p4/register/soc/jpeg_reg.h
diff --git a/components/soc/esp32p4/include/soc/jpeg_struct.h b/components/soc/esp32p4/register/soc/jpeg_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/jpeg_struct.h
rename to components/soc/esp32p4/register/soc/jpeg_struct.h
diff --git a/components/soc/esp32p4/include/soc/keymng_reg.h b/components/soc/esp32p4/register/soc/keymng_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/keymng_reg.h
rename to components/soc/esp32p4/register/soc/keymng_reg.h
diff --git a/components/soc/esp32p4/include/soc/keymng_struct.h b/components/soc/esp32p4/register/soc/keymng_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/keymng_struct.h
rename to components/soc/esp32p4/register/soc/keymng_struct.h
diff --git a/components/soc/esp32p4/include/soc/l2mem_monitor_reg.h b/components/soc/esp32p4/register/soc/l2mem_monitor_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/l2mem_monitor_reg.h
rename to components/soc/esp32p4/register/soc/l2mem_monitor_reg.h
diff --git a/components/soc/esp32p4/include/soc/l2mem_monitor_struct.h b/components/soc/esp32p4/register/soc/l2mem_monitor_struct.h
similarity index 98%
rename from components/soc/esp32p4/include/soc/l2mem_monitor_struct.h
rename to components/soc/esp32p4/register/soc/l2mem_monitor_struct.h
index c88691215a..e3e1abf376 100644
--- a/components/soc/esp32p4/include/soc/l2mem_monitor_struct.h
+++ b/components/soc/esp32p4/register/soc/l2mem_monitor_struct.h
@@ -12,7 +12,7 @@ extern "C" {
 
 /** Group: configuration registers */
 /** Type of log_setting register
- *  log config regsiter
+ *  log config register
  */
 typedef union {
     struct {
@@ -43,7 +43,7 @@ typedef union {
 } mem_monitor_log_setting_reg_t;
 
 /** Type of log_setting1 register
- *  log config regsiter
+ *  log config register
  */
 typedef union {
     struct {
@@ -61,7 +61,7 @@ typedef union {
 } mem_monitor_log_setting1_reg_t;
 
 /** Type of log_check_data register
- *  check data regsiter
+ *  check data register
  */
 typedef union {
     struct {
@@ -89,7 +89,7 @@ typedef union {
 } mem_monitor_log_data_mask_reg_t;
 
 /** Type of log_min register
- *  log boundary regsiter
+ *  log boundary register
  */
 typedef union {
     struct {
@@ -102,7 +102,7 @@ typedef union {
 } mem_monitor_log_min_reg_t;
 
 /** Type of log_max register
- *  log boundary regsiter
+ *  log boundary register
  */
 typedef union {
     struct {
diff --git a/components/soc/esp32p4/include/soc/lcd_cam_reg.h b/components/soc/esp32p4/register/soc/lcd_cam_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/lcd_cam_reg.h
rename to components/soc/esp32p4/register/soc/lcd_cam_reg.h
diff --git a/components/soc/esp32p4/include/soc/lcd_cam_struct.h b/components/soc/esp32p4/register/soc/lcd_cam_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/lcd_cam_struct.h
rename to components/soc/esp32p4/register/soc/lcd_cam_struct.h
diff --git a/components/soc/esp32p4/include/soc/ledc_reg.h b/components/soc/esp32p4/register/soc/ledc_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/ledc_reg.h
rename to components/soc/esp32p4/register/soc/ledc_reg.h
diff --git a/components/soc/esp32p4/include/soc/ledc_struct.h b/components/soc/esp32p4/register/soc/ledc_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/ledc_struct.h
rename to components/soc/esp32p4/register/soc/ledc_struct.h
diff --git a/components/soc/esp32p4/include/soc/lp2hp_peri_pms_reg.h b/components/soc/esp32p4/register/soc/lp2hp_peri_pms_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/lp2hp_peri_pms_reg.h
rename to components/soc/esp32p4/register/soc/lp2hp_peri_pms_reg.h
diff --git a/components/soc/esp32p4/include/soc/lp2hp_peri_pms_struct.h b/components/soc/esp32p4/register/soc/lp2hp_peri_pms_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/lp2hp_peri_pms_struct.h
rename to components/soc/esp32p4/register/soc/lp2hp_peri_pms_struct.h
diff --git a/components/soc/esp32p4/include/soc/lp_adc_reg.h b/components/soc/esp32p4/register/soc/lp_adc_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/lp_adc_reg.h
rename to components/soc/esp32p4/register/soc/lp_adc_reg.h
diff --git a/components/soc/esp32p4/include/soc/lp_adc_struct.h b/components/soc/esp32p4/register/soc/lp_adc_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/lp_adc_struct.h
rename to components/soc/esp32p4/register/soc/lp_adc_struct.h
diff --git a/components/soc/esp32p4/include/soc/lp_analog_peri_reg.h b/components/soc/esp32p4/register/soc/lp_analog_peri_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/lp_analog_peri_reg.h
rename to components/soc/esp32p4/register/soc/lp_analog_peri_reg.h
diff --git a/components/soc/esp32p4/include/soc/lp_analog_peri_struct.h b/components/soc/esp32p4/register/soc/lp_analog_peri_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/lp_analog_peri_struct.h
rename to components/soc/esp32p4/register/soc/lp_analog_peri_struct.h
diff --git a/components/soc/esp32p4/include/soc/lp_clkrst_reg.h b/components/soc/esp32p4/register/soc/lp_clkrst_reg.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/lp_clkrst_reg.h
rename to components/soc/esp32p4/register/soc/lp_clkrst_reg.h
index de3f17820c..a771250be6 100644
--- a/components/soc/esp32p4/include/soc/lp_clkrst_reg.h
+++ b/components/soc/esp32p4/register/soc/lp_clkrst_reg.h
@@ -829,7 +829,7 @@ extern "C" {
 #define LP_CLKRST_HP_FOSC_20M_CLK_EN_V  0x00000001U
 #define LP_CLKRST_HP_FOSC_20M_CLK_EN_S  24
 /** LP_CLKRST_HP_XTAL_40M_CLK_EN : R/W; bitpos: [25]; default: 1;
- *  XTAL 40M Clock Enalbe.
+ *  XTAL 40M Clock Enable.
  */
 #define LP_CLKRST_HP_XTAL_40M_CLK_EN    (BIT(25))
 #define LP_CLKRST_HP_XTAL_40M_CLK_EN_M  (LP_CLKRST_HP_XTAL_40M_CLK_EN_V << LP_CLKRST_HP_XTAL_40M_CLK_EN_S)
diff --git a/components/soc/esp32p4/include/soc/lp_clkrst_struct.h b/components/soc/esp32p4/register/soc/lp_clkrst_struct.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/lp_clkrst_struct.h
rename to components/soc/esp32p4/register/soc/lp_clkrst_struct.h
index 2e2246001f..b21775966a 100644
--- a/components/soc/esp32p4/include/soc/lp_clkrst_struct.h
+++ b/components/soc/esp32p4/register/soc/lp_clkrst_struct.h
@@ -611,7 +611,7 @@ typedef union {
          */
         uint32_t hp_fosc_20m_clk_en:1;
         /** hp_xtal_40m_clk_en : R/W; bitpos: [25]; default: 1;
-         *  XTAL 40M Clock Enalbe.
+         *  XTAL 40M Clock Enable.
          */
         uint32_t hp_xtal_40m_clk_en:1;
         /** hp_cpll_400m_clk_en : R/W; bitpos: [26]; default: 1;
diff --git a/components/soc/esp32p4/include/soc/lp_gpio_reg.h b/components/soc/esp32p4/register/soc/lp_gpio_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/lp_gpio_reg.h
rename to components/soc/esp32p4/register/soc/lp_gpio_reg.h
diff --git a/components/soc/esp32p4/include/soc/lp_gpio_struct.h b/components/soc/esp32p4/register/soc/lp_gpio_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/lp_gpio_struct.h
rename to components/soc/esp32p4/register/soc/lp_gpio_struct.h
diff --git a/components/soc/esp32p4/include/soc/lp_i2c_reg.h b/components/soc/esp32p4/register/soc/lp_i2c_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/lp_i2c_reg.h
rename to components/soc/esp32p4/register/soc/lp_i2c_reg.h
diff --git a/components/soc/esp32p4/include/soc/lp_i2c_struct.h b/components/soc/esp32p4/register/soc/lp_i2c_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/lp_i2c_struct.h
rename to components/soc/esp32p4/register/soc/lp_i2c_struct.h
diff --git a/components/soc/esp32p4/include/soc/lp_i2s_reg.h b/components/soc/esp32p4/register/soc/lp_i2s_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/lp_i2s_reg.h
rename to components/soc/esp32p4/register/soc/lp_i2s_reg.h
diff --git a/components/soc/esp32p4/include/soc/lp_i2s_struct.h b/components/soc/esp32p4/register/soc/lp_i2s_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/lp_i2s_struct.h
rename to components/soc/esp32p4/register/soc/lp_i2s_struct.h
diff --git a/components/soc/esp32p4/include/soc/lp_intr_reg.h b/components/soc/esp32p4/register/soc/lp_intr_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/lp_intr_reg.h
rename to components/soc/esp32p4/register/soc/lp_intr_reg.h
diff --git a/components/soc/esp32p4/include/soc/lp_intr_struct.h b/components/soc/esp32p4/register/soc/lp_intr_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/lp_intr_struct.h
rename to components/soc/esp32p4/register/soc/lp_intr_struct.h
diff --git a/components/soc/esp32p4/include/soc/lp_iomux_reg.h b/components/soc/esp32p4/register/soc/lp_iomux_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/lp_iomux_reg.h
rename to components/soc/esp32p4/register/soc/lp_iomux_reg.h
diff --git a/components/soc/esp32p4/include/soc/lp_iomux_struct.h b/components/soc/esp32p4/register/soc/lp_iomux_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/lp_iomux_struct.h
rename to components/soc/esp32p4/register/soc/lp_iomux_struct.h
diff --git a/components/soc/esp32p4/include/soc/lp_mailbox_reg.h b/components/soc/esp32p4/register/soc/lp_mailbox_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/lp_mailbox_reg.h
rename to components/soc/esp32p4/register/soc/lp_mailbox_reg.h
diff --git a/components/soc/esp32p4/include/soc/lp_mailbox_struct.h b/components/soc/esp32p4/register/soc/lp_mailbox_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/lp_mailbox_struct.h
rename to components/soc/esp32p4/register/soc/lp_mailbox_struct.h
diff --git a/components/soc/esp32p4/include/soc/lp_peri_pms_reg.h b/components/soc/esp32p4/register/soc/lp_peri_pms_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/lp_peri_pms_reg.h
rename to components/soc/esp32p4/register/soc/lp_peri_pms_reg.h
diff --git a/components/soc/esp32p4/include/soc/lp_peri_pms_struct.h b/components/soc/esp32p4/register/soc/lp_peri_pms_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/lp_peri_pms_struct.h
rename to components/soc/esp32p4/register/soc/lp_peri_pms_struct.h
diff --git a/components/soc/esp32p4/include/soc/lp_spi_reg.h b/components/soc/esp32p4/register/soc/lp_spi_reg.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/lp_spi_reg.h
rename to components/soc/esp32p4/register/soc/lp_spi_reg.h
index c00998b2b8..5892adfe42 100644
--- a/components/soc/esp32p4/include/soc/lp_spi_reg.h
+++ b/components/soc/esp32p4/register/soc/lp_spi_reg.h
@@ -126,7 +126,7 @@ extern "C" {
 #define LP_REG_CLKDIV_PRE_V  0x0000000FU
 #define LP_REG_CLKDIV_PRE_S  18
 /** LP_REG_CLK_EQU_SYSCLK : R/W; bitpos: [31]; default: 1;
- *  In the master mode 1: spi_clk is eqaul to system 0: spi_clk is divided from system
+ *  In the master mode 1: spi_clk is equal to system 0: spi_clk is divided from system
  *  clock. Can be configured in CONF state.
  */
 #define LP_REG_CLK_EQU_SYSCLK    (BIT(31))
@@ -1208,7 +1208,7 @@ extern "C" {
 /** LP_REG_CLK_MODE : R/W; bitpos: [1:0]; default: 0;
  *  SPI clock mode bits. 0: SPI clock is off when CS inactive 1: SPI clock is delayed
  *  one cycle after CS inactive 2: SPI clock is delayed two cycles after CS inactive 3:
- *  SPI clock is alwasy on. Can be configured in CONF state.
+ *  SPI clock is always on. Can be configured in CONF state.
  */
 #define LP_REG_CLK_MODE    0x00000003U
 #define LP_REG_CLK_MODE_M  (LP_REG_CLK_MODE_V << LP_REG_CLK_MODE_S)
diff --git a/components/soc/esp32p4/include/soc/lp_spi_struct.h b/components/soc/esp32p4/register/soc/lp_spi_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/lp_spi_struct.h
rename to components/soc/esp32p4/register/soc/lp_spi_struct.h
diff --git a/components/soc/esp32p4/include/soc/lp_system_reg.h b/components/soc/esp32p4/register/soc/lp_system_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/lp_system_reg.h
rename to components/soc/esp32p4/register/soc/lp_system_reg.h
diff --git a/components/soc/esp32p4/include/soc/lp_system_struct.h b/components/soc/esp32p4/register/soc/lp_system_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/lp_system_struct.h
rename to components/soc/esp32p4/register/soc/lp_system_struct.h
diff --git a/components/soc/esp32p4/include/soc/lp_timer_reg.h b/components/soc/esp32p4/register/soc/lp_timer_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/lp_timer_reg.h
rename to components/soc/esp32p4/register/soc/lp_timer_reg.h
diff --git a/components/soc/esp32p4/include/soc/lp_timer_struct.h b/components/soc/esp32p4/register/soc/lp_timer_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/lp_timer_struct.h
rename to components/soc/esp32p4/register/soc/lp_timer_struct.h
diff --git a/components/soc/esp32p4/include/soc/lp_uart_reg.h b/components/soc/esp32p4/register/soc/lp_uart_reg.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/lp_uart_reg.h
rename to components/soc/esp32p4/register/soc/lp_uart_reg.h
index 0a5ba491f4..d488866f78 100644
--- a/components/soc/esp32p4/include/soc/lp_uart_reg.h
+++ b/components/soc/esp32p4/register/soc/lp_uart_reg.h
@@ -100,7 +100,7 @@ extern "C" {
 #define LP_UART_RXFIFO_TOUT_INT_RAW_V  0x00000001U
 #define LP_UART_RXFIFO_TOUT_INT_RAW_S  8
 /** LP_UART_SW_XON_INT_RAW : R/WTC/SS; bitpos: [9]; default: 0;
- *  This interrupt raw bit turns to high level when receiver recevies Xon char when
+ *  This interrupt raw bit turns to high level when receiver receives Xon char when
  *  uart_sw_flow_con_en is set to 1.
  */
 #define LP_UART_SW_XON_INT_RAW    (BIT(9))
@@ -261,7 +261,7 @@ extern "C" {
 #define LP_UART_TX_BRK_DONE_INT_ST_V  0x00000001U
 #define LP_UART_TX_BRK_DONE_INT_ST_S  12
 /** LP_UART_TX_BRK_IDLE_DONE_INT_ST : RO; bitpos: [13]; default: 0;
- *  This is the stauts bit for tx_brk_idle_done_int_raw when tx_brk_idle_done_int_ena
+ *  This is the status bit for tx_brk_idle_done_int_raw when tx_brk_idle_done_int_ena
  *  is set to 1.
  */
 #define LP_UART_TX_BRK_IDLE_DONE_INT_ST    (BIT(13))
@@ -671,7 +671,7 @@ extern "C" {
 #define LP_UART_STOP_BIT_NUM_V  0x00000003U
 #define LP_UART_STOP_BIT_NUM_S  4
 /** LP_UART_TXD_BRK : R/W; bitpos: [6]; default: 0;
- *  Set this bit to enbale transmitter to  send NULL when the process of sending data
+ *  Set this bit to enable transmitter to  send NULL when the process of sending data
  *  is done.
  */
 #define LP_UART_TXD_BRK    (BIT(6))
@@ -1151,7 +1151,7 @@ extern "C" {
  */
 #define LP_UART_TOUT_CONF_SYNC_REG (DR_REG_LP_UART_BASE + 0x64)
 /** LP_UART_RX_TOUT_EN : R/W; bitpos: [0]; default: 0;
- *  This is the enble bit for uart receiver's timeout function.
+ *  This is the enable bit for uart receiver's timeout function.
  */
 #define LP_UART_RX_TOUT_EN    (BIT(0))
 #define LP_UART_RX_TOUT_EN_M  (LP_UART_RX_TOUT_EN_V << LP_UART_RX_TOUT_EN_S)
diff --git a/components/soc/esp32p4/include/soc/lp_uart_struct.h b/components/soc/esp32p4/register/soc/lp_uart_struct.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/lp_uart_struct.h
rename to components/soc/esp32p4/register/soc/lp_uart_struct.h
index 5bd4d605c0..d86d6a0d91 100644
--- a/components/soc/esp32p4/include/soc/lp_uart_struct.h
+++ b/components/soc/esp32p4/register/soc/lp_uart_struct.h
@@ -50,7 +50,7 @@ typedef union {
 typedef union {
     struct {
         /** rx_tout_en : R/W; bitpos: [0]; default: 0;
-         *  This is the enble bit for uart receiver's timeout function.
+         *  This is the enable bit for uart receiver's timeout function.
          */
         uint32_t rx_tout_en:1;
         /** rx_tout_flow_dis : R/W; bitpos: [1]; default: 0;
@@ -121,7 +121,7 @@ typedef union {
          */
         uint32_t rxfifo_tout_int_raw:1;
         /** sw_xon_int_raw : R/WTC/SS; bitpos: [9]; default: 0;
-         *  This interrupt raw bit turns to high level when receiver recevies Xon char when
+         *  This interrupt raw bit turns to high level when receiver receives Xon char when
          *  uart_sw_flow_con_en is set to 1.
          */
         uint32_t sw_xon_int_raw:1;
@@ -225,7 +225,7 @@ typedef union {
          */
         uint32_t tx_brk_done_int_st:1;
         /** tx_brk_idle_done_int_st : RO; bitpos: [13]; default: 0;
-         *  This is the stauts bit for tx_brk_idle_done_int_raw when tx_brk_idle_done_int_ena
+         *  This is the status bit for tx_brk_idle_done_int_raw when tx_brk_idle_done_int_ena
          *  is set to 1.
          */
         uint32_t tx_brk_idle_done_int_st:1;
@@ -467,7 +467,7 @@ typedef union {
          */
         uint32_t stop_bit_num:2;
         /** txd_brk : R/W; bitpos: [6]; default: 0;
-         *  Set this bit to enbale transmitter to  send NULL when the process of sending data
+         *  Set this bit to enable transmitter to  send NULL when the process of sending data
          *  is done.
          */
         uint32_t txd_brk:1;
diff --git a/components/soc/esp32p4/include/soc/lp_wdt_reg.h b/components/soc/esp32p4/register/soc/lp_wdt_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/lp_wdt_reg.h
rename to components/soc/esp32p4/register/soc/lp_wdt_reg.h
diff --git a/components/soc/esp32p4/include/soc/lp_wdt_struct.h b/components/soc/esp32p4/register/soc/lp_wdt_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/lp_wdt_struct.h
rename to components/soc/esp32p4/register/soc/lp_wdt_struct.h
diff --git a/components/soc/esp32p4/include/soc/lpperi_reg.h b/components/soc/esp32p4/register/soc/lpperi_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/lpperi_reg.h
rename to components/soc/esp32p4/register/soc/lpperi_reg.h
diff --git a/components/soc/esp32p4/include/soc/lpperi_struct.h b/components/soc/esp32p4/register/soc/lpperi_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/lpperi_struct.h
rename to components/soc/esp32p4/register/soc/lpperi_struct.h
diff --git a/components/soc/esp32p4/include/soc/mcpwm_reg.h b/components/soc/esp32p4/register/soc/mcpwm_reg.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/mcpwm_reg.h
rename to components/soc/esp32p4/register/soc/mcpwm_reg.h
index e526c38e60..8534b7f334 100644
--- a/components/soc/esp32p4/include/soc/mcpwm_reg.h
+++ b/components/soc/esp32p4/register/soc/mcpwm_reg.h
@@ -2764,7 +2764,7 @@ extern "C" {
 #define MCPWM_CAP0_MODE_V  0x00000003U
 #define MCPWM_CAP0_MODE_S  1
 /** MCPWM_CAP0_PRESCALE : R/W; bitpos: [10:3]; default: 0;
- *  Configures prescale value on possitive edge of CAP0. Prescale value =
+ *  Configures prescale value on positive edge of CAP0. Prescale value =
  *  PWM_CAP0_PRESCALE + 1
  */
 #define MCPWM_CAP0_PRESCALE    0x000000FFU
@@ -2809,7 +2809,7 @@ extern "C" {
 #define MCPWM_CAP0_MODE_V  0x00000003U
 #define MCPWM_CAP0_MODE_S  1
 /** MCPWM_CAP0_PRESCALE : R/W; bitpos: [10:3]; default: 0;
- *  Configures prescale value on possitive edge of CAP1. Prescale value =
+ *  Configures prescale value on positive edge of CAP1. Prescale value =
  *  PWM_CAP1_PRESCALE + 1
  */
 #define MCPWM_CAP0_PRESCALE    0x000000FFU
@@ -2854,7 +2854,7 @@ extern "C" {
 #define MCPWM_CAP0_MODE_V  0x00000003U
 #define MCPWM_CAP0_MODE_S  1
 /** MCPWM_CAP0_PRESCALE : R/W; bitpos: [10:3]; default: 0;
- *  Configures prescale value on possitive edge of CAP2. Prescale value =
+ *  Configures prescale value on positive edge of CAP2. Prescale value =
  *  PWM_CAP2_PRESCALE + 1
  */
 #define MCPWM_CAP0_PRESCALE    0x000000FFU
diff --git a/components/soc/esp32p4/include/soc/mcpwm_struct.h b/components/soc/esp32p4/register/soc/mcpwm_struct.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/mcpwm_struct.h
rename to components/soc/esp32p4/register/soc/mcpwm_struct.h
index 2b72d044e1..71a4864a9c 100644
--- a/components/soc/esp32p4/include/soc/mcpwm_struct.h
+++ b/components/soc/esp32p4/register/soc/mcpwm_struct.h
@@ -780,7 +780,7 @@ typedef union {
          */
         uint32_t capn_mode:2;
         /** capn_prescale : R/W; bitpos: [10:3]; default: 0;
-         *  Configures prescale value on possitive edge of CAPn. Prescale value =
+         *  Configures prescale value on positive edge of CAPn. Prescale value =
          *  PWM_CAPn_PRESCALE + 1
          */
         uint32_t capn_prescale:8;
diff --git a/components/soc/esp32p4/include/soc/mipi_csi_bridge_reg.h b/components/soc/esp32p4/register/soc/mipi_csi_bridge_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/mipi_csi_bridge_reg.h
rename to components/soc/esp32p4/register/soc/mipi_csi_bridge_reg.h
diff --git a/components/soc/esp32p4/include/soc/mipi_csi_bridge_struct.h b/components/soc/esp32p4/register/soc/mipi_csi_bridge_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/mipi_csi_bridge_struct.h
rename to components/soc/esp32p4/register/soc/mipi_csi_bridge_struct.h
diff --git a/components/soc/esp32p4/include/soc/mipi_csi_host_reg.h b/components/soc/esp32p4/register/soc/mipi_csi_host_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/mipi_csi_host_reg.h
rename to components/soc/esp32p4/register/soc/mipi_csi_host_reg.h
diff --git a/components/soc/esp32p4/include/soc/mipi_csi_host_struct.h b/components/soc/esp32p4/register/soc/mipi_csi_host_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/mipi_csi_host_struct.h
rename to components/soc/esp32p4/register/soc/mipi_csi_host_struct.h
diff --git a/components/soc/esp32p4/include/soc/mipi_dsi_bridge_reg.h b/components/soc/esp32p4/register/soc/mipi_dsi_bridge_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/mipi_dsi_bridge_reg.h
rename to components/soc/esp32p4/register/soc/mipi_dsi_bridge_reg.h
diff --git a/components/soc/esp32p4/include/soc/mipi_dsi_bridge_struct.h b/components/soc/esp32p4/register/soc/mipi_dsi_bridge_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/mipi_dsi_bridge_struct.h
rename to components/soc/esp32p4/register/soc/mipi_dsi_bridge_struct.h
diff --git a/components/soc/esp32p4/include/soc/mipi_dsi_host_reg.h b/components/soc/esp32p4/register/soc/mipi_dsi_host_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/mipi_dsi_host_reg.h
rename to components/soc/esp32p4/register/soc/mipi_dsi_host_reg.h
diff --git a/components/soc/esp32p4/include/soc/mipi_dsi_host_struct.h b/components/soc/esp32p4/register/soc/mipi_dsi_host_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/mipi_dsi_host_struct.h
rename to components/soc/esp32p4/register/soc/mipi_dsi_host_struct.h
diff --git a/components/soc/esp32p4/include/soc/parl_io_reg.h b/components/soc/esp32p4/register/soc/parl_io_reg.h
similarity index 98%
rename from components/soc/esp32p4/include/soc/parl_io_reg.h
rename to components/soc/esp32p4/register/soc/parl_io_reg.h
index 74a528017d..812470334d 100644
--- a/components/soc/esp32p4/include/soc/parl_io_reg.h
+++ b/components/soc/esp32p4/register/soc/parl_io_reg.h
@@ -260,7 +260,7 @@ extern "C" {
 #define PARL_IO_TX_READY_S  31
 
 /** PARL_IO_INT_ENA_REG register
- *  Parallel IO interrupt enable singal configuration register.
+ *  Parallel IO interrupt enable signal configuration register.
  */
 #define PARL_IO_INT_ENA_REG (DR_REG_PARL_IO_BASE + 0x28)
 /** PARL_IO_TX_FIFO_REMPTY_INT_ENA : R/W; bitpos: [0]; default: 0;
@@ -286,7 +286,7 @@ extern "C" {
 #define PARL_IO_TX_EOF_INT_ENA_S  2
 
 /** PARL_IO_INT_RAW_REG register
- *  Parallel IO interrupt raw singal status register.
+ *  Parallel IO interrupt raw signal status register.
  */
 #define PARL_IO_INT_RAW_REG (DR_REG_PARL_IO_BASE + 0x2c)
 /** PARL_IO_TX_FIFO_REMPTY_INT_RAW : R/WTC/SS; bitpos: [0]; default: 0;
@@ -312,7 +312,7 @@ extern "C" {
 #define PARL_IO_TX_EOF_INT_RAW_S  2
 
 /** PARL_IO_INT_ST_REG register
- *  Parallel IO interrupt singal status register.
+ *  Parallel IO interrupt signal status register.
  */
 #define PARL_IO_INT_ST_REG (DR_REG_PARL_IO_BASE + 0x30)
 /** PARL_IO_TX_FIFO_REMPTY_INT_ST : RO; bitpos: [0]; default: 0;
@@ -338,7 +338,7 @@ extern "C" {
 #define PARL_IO_TX_EOF_INT_ST_S  2
 
 /** PARL_IO_INT_CLR_REG register
- *  Parallel IO interrupt  clear singal configuration register.
+ *  Parallel IO interrupt  clear signal configuration register.
  */
 #define PARL_IO_INT_CLR_REG (DR_REG_PARL_IO_BASE + 0x34)
 /** PARL_IO_TX_FIFO_REMPTY_INT_CLR : WT; bitpos: [0]; default: 0;
diff --git a/components/soc/esp32p4/include/soc/parl_io_struct.h b/components/soc/esp32p4/register/soc/parl_io_struct.h
similarity index 98%
rename from components/soc/esp32p4/include/soc/parl_io_struct.h
rename to components/soc/esp32p4/register/soc/parl_io_struct.h
index aea2cb383b..7304e7be2c 100644
--- a/components/soc/esp32p4/include/soc/parl_io_struct.h
+++ b/components/soc/esp32p4/register/soc/parl_io_struct.h
@@ -256,7 +256,7 @@ typedef union {
 
 /** Group: PARL_IO Interrupt Configuration and Status */
 /** Type of int_ena register
- *  Parallel IO interrupt enable singal configuration register.
+ *  Parallel IO interrupt enable signal configuration register.
  */
 typedef union {
     struct {
@@ -278,7 +278,7 @@ typedef union {
 } parl_io_int_ena_reg_t;
 
 /** Type of int_raw register
- *  Parallel IO interrupt raw singal status register.
+ *  Parallel IO interrupt raw signal status register.
  */
 typedef union {
     struct {
@@ -300,7 +300,7 @@ typedef union {
 } parl_io_int_raw_reg_t;
 
 /** Type of int_st register
- *  Parallel IO interrupt singal status register.
+ *  Parallel IO interrupt signal status register.
  */
 typedef union {
     struct {
@@ -322,7 +322,7 @@ typedef union {
 } parl_io_int_st_reg_t;
 
 /** Type of int_clr register
- *  Parallel IO interrupt  clear singal configuration register.
+ *  Parallel IO interrupt  clear signal configuration register.
  */
 typedef union {
     struct {
diff --git a/components/soc/esp32p4/include/soc/pau_reg.h b/components/soc/esp32p4/register/soc/pau_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/pau_reg.h
rename to components/soc/esp32p4/register/soc/pau_reg.h
diff --git a/components/soc/esp32p4/include/soc/pau_struct.h b/components/soc/esp32p4/register/soc/pau_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/pau_struct.h
rename to components/soc/esp32p4/register/soc/pau_struct.h
diff --git a/components/soc/esp32p4/include/soc/pcnt_reg.h b/components/soc/esp32p4/register/soc/pcnt_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/pcnt_reg.h
rename to components/soc/esp32p4/register/soc/pcnt_reg.h
diff --git a/components/soc/esp32p4/include/soc/pcnt_struct.h b/components/soc/esp32p4/register/soc/pcnt_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/pcnt_struct.h
rename to components/soc/esp32p4/register/soc/pcnt_struct.h
diff --git a/components/soc/esp32p4/include/soc/pmu_reg.h b/components/soc/esp32p4/register/soc/pmu_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/pmu_reg.h
rename to components/soc/esp32p4/register/soc/pmu_reg.h
diff --git a/components/soc/esp32p4/include/soc/pmu_struct.h b/components/soc/esp32p4/register/soc/pmu_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/pmu_struct.h
rename to components/soc/esp32p4/register/soc/pmu_struct.h
diff --git a/components/soc/esp32p4/include/soc/ppa_reg.h b/components/soc/esp32p4/register/soc/ppa_reg.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/ppa_reg.h
rename to components/soc/esp32p4/register/soc/ppa_reg.h
index 2b17794d77..a7a64aa44f 100644
--- a/components/soc/esp32p4/include/soc/ppa_reg.h
+++ b/components/soc/esp32p4/register/soc/ppa_reg.h
@@ -645,21 +645,21 @@ extern "C" {
  */
 #define PPA_CK_DEFAULT_REG (DR_REG_PPA_BASE + 0x60)
 /** PPA_COLORKEY_DEFAULT_B : R/W; bitpos: [7:0]; default: 0;
- *  default B channle value of color key
+ *  default B channel value of color key
  */
 #define PPA_COLORKEY_DEFAULT_B    0x000000FFU
 #define PPA_COLORKEY_DEFAULT_B_M  (PPA_COLORKEY_DEFAULT_B_V << PPA_COLORKEY_DEFAULT_B_S)
 #define PPA_COLORKEY_DEFAULT_B_V  0x000000FFU
 #define PPA_COLORKEY_DEFAULT_B_S  0
 /** PPA_COLORKEY_DEFAULT_G : R/W; bitpos: [15:8]; default: 0;
- *  default G channle value of color key
+ *  default G channel value of color key
  */
 #define PPA_COLORKEY_DEFAULT_G    0x000000FFU
 #define PPA_COLORKEY_DEFAULT_G_M  (PPA_COLORKEY_DEFAULT_G_V << PPA_COLORKEY_DEFAULT_G_S)
 #define PPA_COLORKEY_DEFAULT_G_V  0x000000FFU
 #define PPA_COLORKEY_DEFAULT_G_S  8
 /** PPA_COLORKEY_DEFAULT_R : R/W; bitpos: [23:16]; default: 0;
- *  default R channle value of color key
+ *  default R channel value of color key
  */
 #define PPA_COLORKEY_DEFAULT_R    0x000000FFU
 #define PPA_COLORKEY_DEFAULT_R_M  (PPA_COLORKEY_DEFAULT_R_V << PPA_COLORKEY_DEFAULT_R_S)
diff --git a/components/soc/esp32p4/include/soc/ppa_struct.h b/components/soc/esp32p4/register/soc/ppa_struct.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/ppa_struct.h
rename to components/soc/esp32p4/register/soc/ppa_struct.h
index 5aa064b901..abcc3dc0a7 100644
--- a/components/soc/esp32p4/include/soc/ppa_struct.h
+++ b/components/soc/esp32p4/register/soc/ppa_struct.h
@@ -446,15 +446,15 @@ typedef union {
 typedef union {
     struct {
         /** colorkey_default_b : R/W; bitpos: [7:0]; default: 0;
-         *  default B channle value of color key
+         *  default B channel value of color key
          */
         uint32_t colorkey_default_b:8;
         /** colorkey_default_g : R/W; bitpos: [15:8]; default: 0;
-         *  default G channle value of color key
+         *  default G channel value of color key
          */
         uint32_t colorkey_default_g:8;
         /** colorkey_default_r : R/W; bitpos: [23:16]; default: 0;
-         *  default R channle value of color key
+         *  default R channel value of color key
          */
         uint32_t colorkey_default_r:8;
         /** colorkey_fg_bg_reverse : R/W; bitpos: [24]; default: 0;
diff --git a/components/soc/esp32p4/include/soc/pvt_reg.h b/components/soc/esp32p4/register/soc/pvt_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/pvt_reg.h
rename to components/soc/esp32p4/register/soc/pvt_reg.h
diff --git a/components/soc/esp32p4/include/soc/pvt_struct.h b/components/soc/esp32p4/register/soc/pvt_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/pvt_struct.h
rename to components/soc/esp32p4/register/soc/pvt_struct.h
diff --git a/components/soc/esp32p4/include/soc/reg_base.h b/components/soc/esp32p4/register/soc/reg_base.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/reg_base.h
rename to components/soc/esp32p4/register/soc/reg_base.h
diff --git a/components/soc/esp32p4/include/soc/rmt_reg.h b/components/soc/esp32p4/register/soc/rmt_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/rmt_reg.h
rename to components/soc/esp32p4/register/soc/rmt_reg.h
diff --git a/components/soc/esp32p4/include/soc/rmt_struct.h b/components/soc/esp32p4/register/soc/rmt_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/rmt_struct.h
rename to components/soc/esp32p4/register/soc/rmt_struct.h
diff --git a/components/soc/esp32p4/include/soc/rsa_reg.h b/components/soc/esp32p4/register/soc/rsa_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/rsa_reg.h
rename to components/soc/esp32p4/register/soc/rsa_reg.h
diff --git a/components/soc/esp32p4/include/soc/rsa_struct.h b/components/soc/esp32p4/register/soc/rsa_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/rsa_struct.h
rename to components/soc/esp32p4/register/soc/rsa_struct.h
diff --git a/components/soc/esp32p4/include/soc/rtclockcali_reg.h b/components/soc/esp32p4/register/soc/rtclockcali_reg.h
similarity index 98%
rename from components/soc/esp32p4/include/soc/rtclockcali_reg.h
rename to components/soc/esp32p4/register/soc/rtclockcali_reg.h
index 329ef154c4..d9794fe943 100644
--- a/components/soc/esp32p4/include/soc/rtclockcali_reg.h
+++ b/components/soc/esp32p4/register/soc/rtclockcali_reg.h
@@ -267,21 +267,21 @@ extern "C" {
 #define RTCLOCKCALI_DREQ_UPDATE_V  0x00000001U
 #define RTCLOCKCALI_DREQ_UPDATE_S  0
 /** RTCLOCKCALI_DREQ_INIT_32K : WT; bitpos: [2]; default: 0;
- *  Initialize the vaule of 32K OSC dfreq setting.
+ *  Initialize the value of 32K OSC dfreq setting.
  */
 #define RTCLOCKCALI_DREQ_INIT_32K    (BIT(2))
 #define RTCLOCKCALI_DREQ_INIT_32K_M  (RTCLOCKCALI_DREQ_INIT_32K_V << RTCLOCKCALI_DREQ_INIT_32K_S)
 #define RTCLOCKCALI_DREQ_INIT_32K_V  0x00000001U
 #define RTCLOCKCALI_DREQ_INIT_32K_S  2
 /** RTCLOCKCALI_DREQ_INIT_FOSC : WT; bitpos: [3]; default: 0;
- *  Initialize the vaule of FOSC  dfreq setting.
+ *  Initialize the value of FOSC  dfreq setting.
  */
 #define RTCLOCKCALI_DREQ_INIT_FOSC    (BIT(3))
 #define RTCLOCKCALI_DREQ_INIT_FOSC_M  (RTCLOCKCALI_DREQ_INIT_FOSC_V << RTCLOCKCALI_DREQ_INIT_FOSC_S)
 #define RTCLOCKCALI_DREQ_INIT_FOSC_V  0x00000001U
 #define RTCLOCKCALI_DREQ_INIT_FOSC_S  3
 /** RTCLOCKCALI_DREQ_INIT_SOSC : WT; bitpos: [4]; default: 0;
- *  Initialize the vaule of SOSC  dfreq setting.
+ *  Initialize the value of SOSC  dfreq setting.
  */
 #define RTCLOCKCALI_DREQ_INIT_SOSC    (BIT(4))
 #define RTCLOCKCALI_DREQ_INIT_SOSC_M  (RTCLOCKCALI_DREQ_INIT_SOSC_V << RTCLOCKCALI_DREQ_INIT_SOSC_S)
@@ -312,21 +312,21 @@ extern "C" {
 #define RTCLOCKCALI_SOSC_DFREQ_SEL_V  0x00000001U
 #define RTCLOCKCALI_SOSC_DFREQ_SEL_S  7
 /** RTCLOCKCALI_FINE_STEP : R/W; bitpos: [15:8]; default: 1;
- *  Frequncy fine step.
+ *  Frequency fine step.
  */
 #define RTCLOCKCALI_FINE_STEP    0x000000FFU
 #define RTCLOCKCALI_FINE_STEP_M  (RTCLOCKCALI_FINE_STEP_V << RTCLOCKCALI_FINE_STEP_S)
 #define RTCLOCKCALI_FINE_STEP_V  0x000000FFU
 #define RTCLOCKCALI_FINE_STEP_S  8
 /** RTCLOCKCALI_COARSE_STEP_FAST : R/W; bitpos: [23:16]; default: 8;
- *  Frequncy coarse step,use to decrease calibration time.
+ *  Frequency coarse step,use to decrease calibration time.
  */
 #define RTCLOCKCALI_COARSE_STEP_FAST    0x000000FFU
 #define RTCLOCKCALI_COARSE_STEP_FAST_M  (RTCLOCKCALI_COARSE_STEP_FAST_V << RTCLOCKCALI_COARSE_STEP_FAST_S)
 #define RTCLOCKCALI_COARSE_STEP_FAST_V  0x000000FFU
 #define RTCLOCKCALI_COARSE_STEP_FAST_S  16
 /** RTCLOCKCALI_COARSE_STEP_SLOW : R/W; bitpos: [31:24]; default: 8;
- *  Frequncy coarse step,use to decrease calibration time.
+ *  Frequency coarse step,use to decrease calibration time.
  */
 #define RTCLOCKCALI_COARSE_STEP_SLOW    0x000000FFU
 #define RTCLOCKCALI_COARSE_STEP_SLOW_M  (RTCLOCKCALI_COARSE_STEP_SLOW_V << RTCLOCKCALI_COARSE_STEP_SLOW_S)
@@ -409,14 +409,14 @@ extern "C" {
  */
 #define RTCLOCKCALI_INT_RAW_REG (DR_REG_RTCLOCKCALI_BASE + 0x38)
 /** RTCLOCKCALI_XTAL_TIMEOUT_INT_RAW : R/WTC/SS; bitpos: [29]; default: 0;
- *  Indicate the xtal timeout  once happend .
+ *  Indicate the xtal timeout  once happened .
  */
 #define RTCLOCKCALI_XTAL_TIMEOUT_INT_RAW    (BIT(29))
 #define RTCLOCKCALI_XTAL_TIMEOUT_INT_RAW_M  (RTCLOCKCALI_XTAL_TIMEOUT_INT_RAW_V << RTCLOCKCALI_XTAL_TIMEOUT_INT_RAW_S)
 #define RTCLOCKCALI_XTAL_TIMEOUT_INT_RAW_V  0x00000001U
 #define RTCLOCKCALI_XTAL_TIMEOUT_INT_RAW_S  29
 /** RTCLOCKCALI_CALI_TIMEOUT_INT_RAW : R/WTC/SS; bitpos: [30]; default: 0;
- *  Indicate the calibration timeout  once happend .
+ *  Indicate the calibration timeout  once happened .
  */
 #define RTCLOCKCALI_CALI_TIMEOUT_INT_RAW    (BIT(30))
 #define RTCLOCKCALI_CALI_TIMEOUT_INT_RAW_M  (RTCLOCKCALI_CALI_TIMEOUT_INT_RAW_V << RTCLOCKCALI_CALI_TIMEOUT_INT_RAW_S)
diff --git a/components/soc/esp32p4/include/soc/rtclockcali_struct.h b/components/soc/esp32p4/register/soc/rtclockcali_struct.h
similarity index 97%
rename from components/soc/esp32p4/include/soc/rtclockcali_struct.h
rename to components/soc/esp32p4/register/soc/rtclockcali_struct.h
index 358ab21fc8..3898c76293 100644
--- a/components/soc/esp32p4/include/soc/rtclockcali_struct.h
+++ b/components/soc/esp32p4/register/soc/rtclockcali_struct.h
@@ -107,15 +107,15 @@ typedef union {
         uint32_t dreq_update:1;
         uint32_t reserved_1:1;
         /** dreq_init_32k : WT; bitpos: [2]; default: 0;
-         *  Initialize the vaule of 32K OSC dfreq setting.
+         *  Initialize the value of 32K OSC dfreq setting.
          */
         uint32_t dreq_init_32k:1;
         /** dreq_init_fosc : WT; bitpos: [3]; default: 0;
-         *  Initialize the vaule of FOSC  dfreq setting.
+         *  Initialize the value of FOSC  dfreq setting.
          */
         uint32_t dreq_init_fosc:1;
         /** dreq_init_sosc : WT; bitpos: [4]; default: 0;
-         *  Initialize the vaule of SOSC  dfreq setting.
+         *  Initialize the value of SOSC  dfreq setting.
          */
         uint32_t dreq_init_sosc:1;
         /** rc32k_dfreq_sel : R/W; bitpos: [5]; default: 0;
@@ -134,15 +134,15 @@ typedef union {
          */
         uint32_t sosc_dfreq_sel:1;
         /** fine_step : R/W; bitpos: [15:8]; default: 1;
-         *  Frequncy fine step.
+         *  Frequency fine step.
          */
         uint32_t fine_step:8;
         /** coarse_step_fast : R/W; bitpos: [23:16]; default: 8;
-         *  Frequncy coarse step,use to decrease calibration time.
+         *  Frequency coarse step,use to decrease calibration time.
          */
         uint32_t coarse_step_fast:8;
         /** coarse_step_slow : R/W; bitpos: [31:24]; default: 8;
-         *  Frequncy coarse step,use to decrease calibration time.
+         *  Frequency coarse step,use to decrease calibration time.
          */
         uint32_t coarse_step_slow:8;
     };
@@ -218,11 +218,11 @@ typedef union {
     struct {
         uint32_t reserved_0:29;
         /** xtal_timeout_int_raw : R/WTC/SS; bitpos: [29]; default: 0;
-         *  Indicate the xtal timeout  once happend .
+         *  Indicate the xtal timeout  once happened .
          */
         uint32_t xtal_timeout_int_raw:1;
         /** cali_timeout_int_raw : R/WTC/SS; bitpos: [30]; default: 0;
-         *  Indicate the calibration timeout  once happend .
+         *  Indicate the calibration timeout  once happened .
          */
         uint32_t cali_timeout_int_raw:1;
         /** cali_done_int_raw : R/WTC/SS; bitpos: [31]; default: 0;
diff --git a/components/soc/esp32p4/include/soc/sdmmc_reg.h b/components/soc/esp32p4/register/soc/sdmmc_reg.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/sdmmc_reg.h
rename to components/soc/esp32p4/register/soc/sdmmc_reg.h
index f8ba68d49f..536a95e4ef 100644
--- a/components/soc/esp32p4/include/soc/sdmmc_reg.h
+++ b/components/soc/esp32p4/register/soc/sdmmc_reg.h
@@ -893,7 +893,7 @@ extern "C" {
 #define SDHOST_BUS_TYPE_REG_V  0x00000001U
 #define SDHOST_BUS_TYPE_REG_S  6
 /** SDHOST_DATA_WIDTH_REG : RO; bitpos: [9:7]; default: 1;
- *  Regisger data widht is 32.
+ *  Regisger data width is 32.
  */
 #define SDHOST_DATA_WIDTH_REG    0x00000007U
 #define SDHOST_DATA_WIDTH_REG_M  (SDHOST_DATA_WIDTH_REG_V << SDHOST_DATA_WIDTH_REG_S)
@@ -907,7 +907,7 @@ extern "C" {
 #define SDHOST_ADDR_WIDTH_REG_V  0x0000003FU
 #define SDHOST_ADDR_WIDTH_REG_S  10
 /** SDHOST_DMA_WIDTH_REG : RO; bitpos: [20:18]; default: 1;
- *  DMA data witdth is 32.
+ *  DMA data width is 32.
  */
 #define SDHOST_DMA_WIDTH_REG    0x00000007U
 #define SDHOST_DMA_WIDTH_REG_M  (SDHOST_DMA_WIDTH_REG_V << SDHOST_DMA_WIDTH_REG_S)
@@ -921,7 +921,7 @@ extern "C" {
 #define SDHOST_RAM_INDISE_REG_V  0x00000001U
 #define SDHOST_RAM_INDISE_REG_S  21
 /** SDHOST_HOLD_REG : RO; bitpos: [22]; default: 1;
- *  Have a hold regiser in data path .
+ *  Have a hold register in data path .
  */
 #define SDHOST_HOLD_REG    (BIT(22))
 #define SDHOST_HOLD_REG_M  (SDHOST_HOLD_REG_V << SDHOST_HOLD_REG_S)
@@ -940,9 +940,9 @@ extern "C" {
  */
 #define SDHOST_UHS_REG (DR_REG_SDHOST_BASE + 0x74)
 /** SDHOST_DDR_REG : R/W; bitpos: [17:16]; default: 0;
- *  DDR mode selecton,1 bit for each card.
- *  0-Non-DDR mdoe.
- *  1-DDR mdoe.
+ *  DDR mode selection,1 bit for each card.
+ *  0-Non-DDR mode.
+ *  1-DDR mode.
  */
 #define SDHOST_DDR_REG    0x00000003U
 #define SDHOST_DDR_REG_M  (SDHOST_DDR_REG_V << SDHOST_DDR_REG_S)
diff --git a/components/soc/esp32p4/include/soc/sdmmc_struct.h b/components/soc/esp32p4/register/soc/sdmmc_struct.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/sdmmc_struct.h
rename to components/soc/esp32p4/register/soc/sdmmc_struct.h
index f9b5a5ed77..10318d6c9c 100644
--- a/components/soc/esp32p4/include/soc/sdmmc_struct.h
+++ b/components/soc/esp32p4/register/soc/sdmmc_struct.h
@@ -870,7 +870,7 @@ typedef union {
          */
         uint32_t bus_type_reg:1;
         /** data_width_reg : RO; bitpos: [9:7]; default: 1;
-         *  Regisger data widht is 32.
+         *  Regisger data width is 32.
          */
         uint32_t data_width_reg:3;
         /** addr_width_reg : RO; bitpos: [15:10]; default: 19;
@@ -879,7 +879,7 @@ typedef union {
         uint32_t addr_width_reg:6;
         uint32_t reserved_16:2;
         /** dma_width_reg : RO; bitpos: [20:18]; default: 1;
-         *  DMA data witdth is 32.
+         *  DMA data width is 32.
          */
         uint32_t dma_width_reg:3;
         /** ram_indise_reg : RO; bitpos: [21]; default: 0;
@@ -887,7 +887,7 @@ typedef union {
          */
         uint32_t ram_indise_reg:1;
         /** hold_reg : RO; bitpos: [22]; default: 1;
-         *  Have a hold regiser in data path .
+         *  Have a hold register in data path .
          */
         uint32_t hold_reg:1;
         uint32_t reserved_23:1;
@@ -909,9 +909,9 @@ typedef union {
     struct {
         uint32_t reserved_0:16;
         /** ddr : R/W; bitpos: [17:16]; default: 0;
-         *  DDR mode selecton,1 bit for each card.
-         *  0-Non-DDR mdoe.
-         *  1-DDR mdoe.
+         *  DDR mode selection,1 bit for each card.
+         *  0-Non-DDR mode.
+         *  1-DDR mode.
          */
         uint32_t ddr:2;
         uint32_t reserved_18:14;
diff --git a/components/soc/esp32p4/include/soc/sha_reg.h b/components/soc/esp32p4/register/soc/sha_reg.h
similarity index 98%
rename from components/soc/esp32p4/include/soc/sha_reg.h
rename to components/soc/esp32p4/register/soc/sha_reg.h
index 888da914b3..40f4d53dfb 100644
--- a/components/soc/esp32p4/include/soc/sha_reg.h
+++ b/components/soc/esp32p4/register/soc/sha_reg.h
@@ -156,7 +156,7 @@ extern "C" {
 #define SHA_DATE_S  0
 
 /** SHA_H_MEM register
- *  Sha H memory which contains intermediate hash or finial hash.
+ *  Sha H memory which contains intermediate hash or final hash.
  */
 #define SHA_H_MEM (DR_REG_SHA_BASE + 0x40)
 #define SHA_H_MEM_SIZE_BYTES 64
diff --git a/components/soc/esp32p4/include/soc/sha_struct.h b/components/soc/esp32p4/register/soc/sha_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/sha_struct.h
rename to components/soc/esp32p4/register/soc/sha_struct.h
diff --git a/components/soc/esp32p4/include/soc/soc_etm_reg.h b/components/soc/esp32p4/register/soc/soc_etm_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/soc_etm_reg.h
rename to components/soc/esp32p4/register/soc/soc_etm_reg.h
diff --git a/components/soc/esp32p4/include/soc/soc_etm_struct.h b/components/soc/esp32p4/register/soc/soc_etm_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/soc_etm_struct.h
rename to components/soc/esp32p4/register/soc/soc_etm_struct.h
diff --git a/components/soc/esp32p4/include/soc/spi1_mem_c_reg.h b/components/soc/esp32p4/register/soc/spi1_mem_c_reg.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/spi1_mem_c_reg.h
rename to components/soc/esp32p4/register/soc/spi1_mem_c_reg.h
index e3bfc69214..eab9fa8a7e 100644
--- a/components/soc/esp32p4/include/soc/spi1_mem_c_reg.h
+++ b/components/soc/esp32p4/register/soc/spi1_mem_c_reg.h
@@ -321,7 +321,7 @@ extern "C" {
 /** SPI1_MEM_C_CLK_MODE : R/W; bitpos: [1:0]; default: 0;
  *  SPI clock mode bits. 0: SPI clock is off when CS inactive 1: SPI clock is delayed
  *  one cycle after CS inactive 2: SPI clock is delayed two cycles after CS inactive 3:
- *  SPI clock is alwasy on.
+ *  SPI clock is always on.
  */
 #define SPI1_MEM_C_CLK_MODE    0x00000003U
 #define SPI1_MEM_C_CLK_MODE_M  (SPI1_MEM_C_CLK_MODE_V << SPI1_MEM_C_CLK_MODE_S)
@@ -1268,7 +1268,7 @@ extern "C" {
 #define SPI1_MEM_C_MST_ST_END_INT_RAW_S  4
 /** SPI1_MEM_C_BROWN_OUT_INT_RAW : R/WTC/SS; bitpos: [10]; default: 0;
  *  The raw bit for SPI1_MEM_C_BROWN_OUT_INT interrupt. 1: Triggered condition is that
- *  chip is loosing power and RTC module sends out brown out close flash request to
+ *  chip is losing power and RTC module sends out brown out close flash request to
  *  SPI1. After SPI1 sends out suspend command to flash, this interrupt is triggered
  *  and MSPI returns to idle state. 0: Others.
  */
diff --git a/components/soc/esp32p4/include/soc/spi1_mem_c_struct.h b/components/soc/esp32p4/register/soc/spi1_mem_c_struct.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/spi1_mem_c_struct.h
rename to components/soc/esp32p4/register/soc/spi1_mem_c_struct.h
index b78578c082..6b08445b57 100644
--- a/components/soc/esp32p4/include/soc/spi1_mem_c_struct.h
+++ b/components/soc/esp32p4/register/soc/spi1_mem_c_struct.h
@@ -334,7 +334,7 @@ typedef union {
         /** clk_mode : R/W; bitpos: [1:0]; default: 0;
          *  SPI clock mode bits. 0: SPI clock is off when CS inactive 1: SPI clock is delayed
          *  one cycle after CS inactive 2: SPI clock is delayed two cycles after CS inactive 3:
-         *  SPI clock is alwasy on.
+         *  SPI clock is always on.
          */
         uint32_t clk_mode:2;
         /** cs_hold_dly_res : R/W; bitpos: [11:2]; default: 1023;
@@ -912,7 +912,7 @@ typedef union {
         uint32_t reserved_5:5;
         /** brown_out_int_raw : R/WTC/SS; bitpos: [10]; default: 0;
          *  The raw bit for SPI1_MEM_C_BROWN_OUT_INT interrupt. 1: Triggered condition is that
-         *  chip is loosing power and RTC module sends out brown out close flash request to
+         *  chip is losing power and RTC module sends out brown out close flash request to
          *  SPI1. After SPI1 sends out suspend command to flash, this interrupt is triggered
          *  and MSPI returns to idle state. 0: Others.
          */
diff --git a/components/soc/esp32p4/include/soc/spi1_mem_s_reg.h b/components/soc/esp32p4/register/soc/spi1_mem_s_reg.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/spi1_mem_s_reg.h
rename to components/soc/esp32p4/register/soc/spi1_mem_s_reg.h
index 8aa91923ec..9bc4517be9 100644
--- a/components/soc/esp32p4/include/soc/spi1_mem_s_reg.h
+++ b/components/soc/esp32p4/register/soc/spi1_mem_s_reg.h
@@ -321,7 +321,7 @@ extern "C" {
 /** SPI1_MEM_S_CLK_MODE : R/W; bitpos: [1:0]; default: 0;
  *  SPI clock mode bits. 0: SPI clock is off when CS inactive 1: SPI clock is delayed
  *  one cycle after CS inactive 2: SPI clock is delayed two cycles after CS inactive 3:
- *  SPI clock is alwasy on.
+ *  SPI clock is always on.
  */
 #define SPI1_MEM_S_CLK_MODE    0x00000003U
 #define SPI1_MEM_S_CLK_MODE_M  (SPI1_MEM_S_CLK_MODE_V << SPI1_MEM_S_CLK_MODE_S)
@@ -1268,7 +1268,7 @@ extern "C" {
 #define SPI1_MEM_S_MST_ST_END_INT_RAW_S  4
 /** SPI1_MEM_S_BROWN_OUT_INT_RAW : R/WTC/SS; bitpos: [10]; default: 0;
  *  The raw bit for SPI1_MEM_S_BROWN_OUT_INT interrupt. 1: Triggered condition is that
- *  chip is loosing power and RTC module sends out brown out close flash request to
+ *  chip is losing power and RTC module sends out brown out close flash request to
  *  SPI1. After SPI1 sends out suspend command to flash, this interrupt is triggered
  *  and MSPI returns to idle state. 0: Others.
  */
diff --git a/components/soc/esp32p4/include/soc/spi1_mem_s_struct.h b/components/soc/esp32p4/register/soc/spi1_mem_s_struct.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/spi1_mem_s_struct.h
rename to components/soc/esp32p4/register/soc/spi1_mem_s_struct.h
index c2bb46eb9d..5cbe96076b 100644
--- a/components/soc/esp32p4/include/soc/spi1_mem_s_struct.h
+++ b/components/soc/esp32p4/register/soc/spi1_mem_s_struct.h
@@ -334,7 +334,7 @@ typedef union {
         /** clk_mode : R/W; bitpos: [1:0]; default: 0;
          *  SPI clock mode bits. 0: SPI clock is off when CS inactive 1: SPI clock is delayed
          *  one cycle after CS inactive 2: SPI clock is delayed two cycles after CS inactive 3:
-         *  SPI clock is alwasy on.
+         *  SPI clock is always on.
          */
         uint32_t clk_mode:2;
         /** cs_hold_dly_res : R/W; bitpos: [11:2]; default: 1023;
@@ -1123,7 +1123,7 @@ typedef union {
         uint32_t reserved_5:5;
         /** brown_out_int_raw : R/WTC/SS; bitpos: [10]; default: 0;
          *  The raw bit for SPI1_MEM_S_BROWN_OUT_INT interrupt. 1: Triggered condition is that
-         *  chip is loosing power and RTC module sends out brown out close flash request to
+         *  chip is losing power and RTC module sends out brown out close flash request to
          *  SPI1. After SPI1 sends out suspend command to flash, this interrupt is triggered
          *  and MSPI returns to idle state. 0: Others.
          */
diff --git a/components/soc/esp32p4/include/soc/spi_mem_c_reg.h b/components/soc/esp32p4/register/soc/spi_mem_c_reg.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/spi_mem_c_reg.h
rename to components/soc/esp32p4/register/soc/spi_mem_c_reg.h
index 89ff7ae948..4b5c8c54e5 100644
--- a/components/soc/esp32p4/include/soc/spi_mem_c_reg.h
+++ b/components/soc/esp32p4/register/soc/spi_mem_c_reg.h
@@ -199,7 +199,7 @@ extern "C" {
 /** SPI_MEM_C_CLK_MODE : R/W; bitpos: [1:0]; default: 0;
  *  SPI clock mode bits. 0: SPI clock is off when CS inactive 1: SPI clock is delayed
  *  one cycle after CS inactive 2: SPI clock is delayed two cycles after CS inactive 3:
- *  SPI clock is alwasy on.
+ *  SPI clock is always on.
  */
 #define SPI_MEM_C_CLK_MODE    0x00000003U
 #define SPI_MEM_C_CLK_MODE_M  (SPI_MEM_C_CLK_MODE_V << SPI_MEM_C_CLK_MODE_S)
@@ -2694,7 +2694,7 @@ extern "C" {
  */
 #define SPI_MEM_C_DPA_CTRL_REG (DR_REG_FLASH_SPI0_BASE + 0x388)
 /** SPI_MEM_C_CRYPT_SECURITY_LEVEL : R/W; bitpos: [2:0]; default: 7;
- *  Set the security level of spi mem cryption. 0: Shut off cryption DPA funtion. 1-7:
+ *  Set the security level of spi mem cryption. 0: Shut off cryption DPA function. 1-7:
  *  The bigger the number is, the more secure the cryption is. (Note that the
  *  performance of cryption will decrease together with this number increasing)
  */
diff --git a/components/soc/esp32p4/include/soc/spi_mem_c_struct.h b/components/soc/esp32p4/register/soc/spi_mem_c_struct.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/spi_mem_c_struct.h
rename to components/soc/esp32p4/register/soc/spi_mem_c_struct.h
index c694be7e0a..61abcf0591 100644
--- a/components/soc/esp32p4/include/soc/spi_mem_c_struct.h
+++ b/components/soc/esp32p4/register/soc/spi_mem_c_struct.h
@@ -167,7 +167,7 @@ typedef union {
         /** clk_mode : R/W; bitpos: [1:0]; default: 0;
          *  SPI clock mode bits. 0: SPI clock is off when CS inactive 1: SPI clock is delayed
          *  one cycle after CS inactive 2: SPI clock is delayed two cycles after CS inactive 3:
-         *  SPI clock is alwasy on.
+         *  SPI clock is always on.
          */
         uint32_t clk_mode:2;
         uint32_t reserved_2:19;
@@ -1908,7 +1908,7 @@ typedef union {
 typedef union {
     struct {
         /** crypt_security_level : R/W; bitpos: [2:0]; default: 7;
-         *  Set the security level of spi mem cryption. 0: Shut off cryption DPA funtion. 1-7:
+         *  Set the security level of spi mem cryption. 0: Shut off cryption DPA function. 1-7:
          *  The bigger the number is, the more secure the cryption is. (Note that the
          *  performance of cryption will decrease together with this number increasing)
          */
diff --git a/components/soc/esp32p4/include/soc/spi_mem_s_reg.h b/components/soc/esp32p4/register/soc/spi_mem_s_reg.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/spi_mem_s_reg.h
rename to components/soc/esp32p4/register/soc/spi_mem_s_reg.h
index 4e81aa49b4..ec83145c77 100644
--- a/components/soc/esp32p4/include/soc/spi_mem_s_reg.h
+++ b/components/soc/esp32p4/register/soc/spi_mem_s_reg.h
@@ -199,7 +199,7 @@ extern "C" {
 /** SPI_MEM_S_CLK_MODE : R/W; bitpos: [1:0]; default: 0;
  *  SPI clock mode bits. 0: SPI clock is off when CS inactive 1: SPI clock is delayed
  *  one cycle after CS inactive 2: SPI clock is delayed two cycles after CS inactive 3:
- *  SPI clock is alwasy on.
+ *  SPI clock is always on.
  */
 #define SPI_MEM_S_CLK_MODE    0x00000003U
 #define SPI_MEM_S_CLK_MODE_M  (SPI_MEM_S_CLK_MODE_V << SPI_MEM_S_CLK_MODE_S)
@@ -945,7 +945,7 @@ extern "C" {
 #define SPI_MEM_S_SCLKCNT_N_V  0x000000FFU
 #define SPI_MEM_S_SCLKCNT_N_S  16
 /** SPI_MEM_S_SCLK_EQU_SYSCLK : R/W; bitpos: [31]; default: 0;
- *  For SPI0 external RAM  interface, 1: spi_mem_clk is eqaul to system 0: spi_mem_clk
+ *  For SPI0 external RAM  interface, 1: spi_mem_clk is equal to system 0: spi_mem_clk
  *  is divided from system clock.
  */
 #define SPI_MEM_S_SCLK_EQU_SYSCLK    (BIT(31))
@@ -3461,7 +3461,7 @@ extern "C" {
  */
 #define SPI_MEM_S_DPA_CTRL_REG (DR_REG_PSRAM_MSPI0_BASE + 0x388)
 /** SPI_MEM_S_CRYPT_SECURITY_LEVEL : R/W; bitpos: [2:0]; default: 7;
- *  Set the security level of spi mem cryption. 0: Shut off cryption DPA funtion. 1-7:
+ *  Set the security level of spi mem cryption. 0: Shut off cryption DPA function. 1-7:
  *  The bigger the number is, the more secure the cryption is. (Note that the
  *  performance of cryption will decrease together with this number increasing)
  */
diff --git a/components/soc/esp32p4/include/soc/spi_mem_s_struct.h b/components/soc/esp32p4/register/soc/spi_mem_s_struct.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/spi_mem_s_struct.h
rename to components/soc/esp32p4/register/soc/spi_mem_s_struct.h
index 691b30c6d7..4948325c47 100644
--- a/components/soc/esp32p4/include/soc/spi_mem_s_struct.h
+++ b/components/soc/esp32p4/register/soc/spi_mem_s_struct.h
@@ -167,7 +167,7 @@ typedef union {
         /** mem_clk_mode : R/W; bitpos: [1:0]; default: 0;
          *  SPI clock mode bits. 0: SPI clock is off when CS inactive 1: SPI clock is delayed
          *  one cycle after CS inactive 2: SPI clock is delayed two cycles after CS inactive 3:
-         *  SPI clock is alwasy on.
+         *  SPI clock is always on.
          */
         uint32_t mem_clk_mode:2;
         uint32_t reserved_2:19;
@@ -504,7 +504,7 @@ typedef union {
         uint32_t mem_sclkcnt_n:8;
         uint32_t reserved_24:7;
         /** mem_sclk_equ_sysclk : R/W; bitpos: [31]; default: 0;
-         *  For SPI0 external RAM  interface, 1: spi_mem_s_clk is eqaul to system 0: spi_mem_s_clk
+         *  For SPI0 external RAM  interface, 1: spi_mem_s_clk is equal to system 0: spi_mem_s_clk
          *  is divided from system clock.
          */
         uint32_t mem_sclk_equ_sysclk:1;
@@ -2446,7 +2446,7 @@ typedef union {
 typedef union {
     struct {
         /** crypt_security_level : R/W; bitpos: [2:0]; default: 7;
-         *  Set the security level of spi mem cryption. 0: Shut off cryption DPA funtion. 1-7:
+         *  Set the security level of spi mem cryption. 0: Shut off cryption DPA function. 1-7:
          *  The bigger the number is, the more secure the cryption is. (Note that the
          *  performance of cryption will decrease together with this number increasing)
          */
diff --git a/components/soc/esp32p4/include/soc/spi_reg.h b/components/soc/esp32p4/register/soc/spi_reg.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/spi_reg.h
rename to components/soc/esp32p4/register/soc/spi_reg.h
index 61a1858b09..ffce14740e 100644
--- a/components/soc/esp32p4/include/soc/spi_reg.h
+++ b/components/soc/esp32p4/register/soc/spi_reg.h
@@ -225,7 +225,7 @@ extern "C" {
 #define SPI_CLKDIV_PRE_V  0x0000000FU
 #define SPI_CLKDIV_PRE_S  18
 /** SPI_CLK_EQU_SYSCLK : R/W; bitpos: [31]; default: 1;
- *  In the master mode 1: spi_clk is eqaul to system 0: spi_clk is divided from system
+ *  In the master mode 1: spi_clk is equal to system 0: spi_clk is divided from system
  *  clock. Can be configured in CONF state.
  */
 #define SPI_CLK_EQU_SYSCLK    (BIT(31))
@@ -1978,7 +1978,7 @@ extern "C" {
 /** SPI_CLK_MODE : R/W; bitpos: [1:0]; default: 0;
  *  SPI clock mode bits. 0: SPI clock is off when CS inactive 1: SPI clock is delayed
  *  one cycle after CS inactive 2: SPI clock is delayed two cycles after CS inactive 3:
- *  SPI clock is alwasy on. Can be configured in CONF state.
+ *  SPI clock is always on. Can be configured in CONF state.
  */
 #define SPI_CLK_MODE    0x00000003U
 #define SPI_CLK_MODE_M  (SPI_CLK_MODE_V << SPI_CLK_MODE_S)
diff --git a/components/soc/esp32p4/include/soc/spi_struct.h b/components/soc/esp32p4/register/soc/spi_struct.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/spi_struct.h
rename to components/soc/esp32p4/register/soc/spi_struct.h
index 66929cd3a0..8d004e60e1 100644
--- a/components/soc/esp32p4/include/soc/spi_struct.h
+++ b/components/soc/esp32p4/register/soc/spi_struct.h
@@ -511,7 +511,7 @@ typedef union {
         /** clk_mode : R/W; bitpos: [1:0]; default: 0;
          *  SPI clock mode bits. 0: SPI clock is off when CS inactive 1: SPI clock is delayed
          *  one cycle after CS inactive 2: SPI clock is delayed two cycles after CS inactive 3:
-         *  SPI clock is alwasy on. Can be configured in CONF state.
+         *  SPI clock is always on. Can be configured in CONF state.
          */
         uint32_t clk_mode:2;
         /** clk_mode_13 : R/W; bitpos: [2]; default: 0;
@@ -629,7 +629,7 @@ typedef union {
         uint32_t clkdiv_pre:4;
         uint32_t reserved_22:9;
         /** clk_equ_sysclk : R/W; bitpos: [31]; default: 1;
-         *  In the master mode 1: spi_clk is eqaul to system 0: spi_clk is divided from system
+         *  In the master mode 1: spi_clk is equal to system 0: spi_clk is divided from system
          *  clock. Can be configured in CONF state.
          */
         uint32_t clk_equ_sysclk:1;
diff --git a/components/soc/esp32p4/include/soc/systimer_reg.h b/components/soc/esp32p4/register/soc/systimer_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/systimer_reg.h
rename to components/soc/esp32p4/register/soc/systimer_reg.h
diff --git a/components/soc/esp32p4/include/soc/systimer_struct.h b/components/soc/esp32p4/register/soc/systimer_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/systimer_struct.h
rename to components/soc/esp32p4/register/soc/systimer_struct.h
diff --git a/components/soc/esp32p4/include/soc/tcm_monitor_reg.h b/components/soc/esp32p4/register/soc/tcm_monitor_reg.h
similarity index 98%
rename from components/soc/esp32p4/include/soc/tcm_monitor_reg.h
rename to components/soc/esp32p4/register/soc/tcm_monitor_reg.h
index d89fc3009c..f04f761def 100644
--- a/components/soc/esp32p4/include/soc/tcm_monitor_reg.h
+++ b/components/soc/esp32p4/register/soc/tcm_monitor_reg.h
@@ -12,7 +12,7 @@ extern "C" {
 #endif
 
 /** MEM_MONITOR_LOG_SETTING_REG register
- *  log config regsiter
+ *  log config register
  */
 #define MEM_MONITOR_LOG_SETTING_REG (DR_REG_MEM_MONITOR_BASE + 0x0)
 /** MEM_MONITOR_LOG_MODE : R/W; bitpos: [3:0]; default: 0;
@@ -53,7 +53,7 @@ extern "C" {
 #define MEM_MONITOR_LOG_DMA_1_ENA_S  24
 
 /** MEM_MONITOR_LOG_SETTING1_REG register
- *  log config regsiter
+ *  log config register
  */
 #define MEM_MONITOR_LOG_SETTING1_REG (DR_REG_MEM_MONITOR_BASE + 0x4)
 /** MEM_MONITOR_LOG_DMA_2_ENA : R/W; bitpos: [7:0]; default: 0;
@@ -72,7 +72,7 @@ extern "C" {
 #define MEM_MONITOR_LOG_DMA_3_ENA_S  8
 
 /** MEM_MONITOR_LOG_CHECK_DATA_REG register
- *  check data regsiter
+ *  check data register
  */
 #define MEM_MONITOR_LOG_CHECK_DATA_REG (DR_REG_MEM_MONITOR_BASE + 0x8)
 /** MEM_MONITOR_LOG_CHECK_DATA : R/W; bitpos: [31:0]; default: 0;
@@ -97,7 +97,7 @@ extern "C" {
 #define MEM_MONITOR_LOG_DATA_MASK_S  0
 
 /** MEM_MONITOR_LOG_MIN_REG register
- *  log boundary regsiter
+ *  log boundary register
  */
 #define MEM_MONITOR_LOG_MIN_REG (DR_REG_MEM_MONITOR_BASE + 0x10)
 /** MEM_MONITOR_LOG_MIN : R/W; bitpos: [31:0]; default: 0;
@@ -109,7 +109,7 @@ extern "C" {
 #define MEM_MONITOR_LOG_MIN_S  0
 
 /** MEM_MONITOR_LOG_MAX_REG register
- *  log boundary regsiter
+ *  log boundary register
  */
 #define MEM_MONITOR_LOG_MAX_REG (DR_REG_MEM_MONITOR_BASE + 0x14)
 /** MEM_MONITOR_LOG_MAX : R/W; bitpos: [31:0]; default: 0;
diff --git a/components/soc/esp32p4/include/soc/tcm_monitor_struct.h b/components/soc/esp32p4/register/soc/tcm_monitor_struct.h
similarity index 98%
rename from components/soc/esp32p4/include/soc/tcm_monitor_struct.h
rename to components/soc/esp32p4/register/soc/tcm_monitor_struct.h
index c88691215a..e3e1abf376 100644
--- a/components/soc/esp32p4/include/soc/tcm_monitor_struct.h
+++ b/components/soc/esp32p4/register/soc/tcm_monitor_struct.h
@@ -12,7 +12,7 @@ extern "C" {
 
 /** Group: configuration registers */
 /** Type of log_setting register
- *  log config regsiter
+ *  log config register
  */
 typedef union {
     struct {
@@ -43,7 +43,7 @@ typedef union {
 } mem_monitor_log_setting_reg_t;
 
 /** Type of log_setting1 register
- *  log config regsiter
+ *  log config register
  */
 typedef union {
     struct {
@@ -61,7 +61,7 @@ typedef union {
 } mem_monitor_log_setting1_reg_t;
 
 /** Type of log_check_data register
- *  check data regsiter
+ *  check data register
  */
 typedef union {
     struct {
@@ -89,7 +89,7 @@ typedef union {
 } mem_monitor_log_data_mask_reg_t;
 
 /** Type of log_min register
- *  log boundary regsiter
+ *  log boundary register
  */
 typedef union {
     struct {
@@ -102,7 +102,7 @@ typedef union {
 } mem_monitor_log_min_reg_t;
 
 /** Type of log_max register
- *  log boundary regsiter
+ *  log boundary register
  */
 typedef union {
     struct {
diff --git a/components/soc/esp32p4/include/soc/timer_group_reg.h b/components/soc/esp32p4/register/soc/timer_group_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/timer_group_reg.h
rename to components/soc/esp32p4/register/soc/timer_group_reg.h
diff --git a/components/soc/esp32p4/include/soc/timer_group_struct.h b/components/soc/esp32p4/register/soc/timer_group_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/timer_group_struct.h
rename to components/soc/esp32p4/register/soc/timer_group_struct.h
diff --git a/components/soc/esp32p4/include/soc/touch_reg.h b/components/soc/esp32p4/register/soc/touch_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/touch_reg.h
rename to components/soc/esp32p4/register/soc/touch_reg.h
diff --git a/components/soc/esp32p4/include/soc/touch_struct.h b/components/soc/esp32p4/register/soc/touch_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/touch_struct.h
rename to components/soc/esp32p4/register/soc/touch_struct.h
diff --git a/components/soc/esp32p4/include/soc/trace_reg.h b/components/soc/esp32p4/register/soc/trace_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/trace_reg.h
rename to components/soc/esp32p4/register/soc/trace_reg.h
diff --git a/components/soc/esp32p4/include/soc/trace_struct.h b/components/soc/esp32p4/register/soc/trace_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/trace_struct.h
rename to components/soc/esp32p4/register/soc/trace_struct.h
diff --git a/components/soc/esp32p4/include/soc/tsens_reg.h b/components/soc/esp32p4/register/soc/tsens_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/tsens_reg.h
rename to components/soc/esp32p4/register/soc/tsens_reg.h
diff --git a/components/soc/esp32p4/include/soc/tsens_struct.h b/components/soc/esp32p4/register/soc/tsens_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/tsens_struct.h
rename to components/soc/esp32p4/register/soc/tsens_struct.h
diff --git a/components/soc/esp32p4/include/soc/twai_reg.h b/components/soc/esp32p4/register/soc/twai_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/twai_reg.h
rename to components/soc/esp32p4/register/soc/twai_reg.h
diff --git a/components/soc/esp32p4/include/soc/twai_struct.h b/components/soc/esp32p4/register/soc/twai_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/twai_struct.h
rename to components/soc/esp32p4/register/soc/twai_struct.h
diff --git a/components/soc/esp32p4/include/soc/uart_reg.h b/components/soc/esp32p4/register/soc/uart_reg.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/uart_reg.h
rename to components/soc/esp32p4/register/soc/uart_reg.h
index fc3c662721..014f8eaed2 100644
--- a/components/soc/esp32p4/include/soc/uart_reg.h
+++ b/components/soc/esp32p4/register/soc/uart_reg.h
@@ -100,7 +100,7 @@ extern "C" {
 #define UART_RXFIFO_TOUT_INT_RAW_V  0x00000001U
 #define UART_RXFIFO_TOUT_INT_RAW_S  8
 /** UART_SW_XON_INT_RAW : R/WTC/SS; bitpos: [9]; default: 0;
- *  This interrupt raw bit turns to high level when receiver recevies Xon char when
+ *  This interrupt raw bit turns to high level when receiver receives Xon char when
  *  uart_sw_flow_con_en is set to 1.
  */
 #define UART_SW_XON_INT_RAW    (BIT(9))
@@ -285,7 +285,7 @@ extern "C" {
 #define UART_TX_BRK_DONE_INT_ST_V  0x00000001U
 #define UART_TX_BRK_DONE_INT_ST_S  12
 /** UART_TX_BRK_IDLE_DONE_INT_ST : RO; bitpos: [13]; default: 0;
- *  This is the stauts bit for tx_brk_idle_done_int_raw when tx_brk_idle_done_int_ena
+ *  This is the status bit for tx_brk_idle_done_int_raw when tx_brk_idle_done_int_ena
  *  is set to 1.
  */
 #define UART_TX_BRK_IDLE_DONE_INT_ST    (BIT(13))
@@ -760,7 +760,7 @@ extern "C" {
 #define UART_STOP_BIT_NUM_V  0x00000003U
 #define UART_STOP_BIT_NUM_S  4
 /** UART_TXD_BRK : R/W; bitpos: [6]; default: 0;
- *  Set this bit to enbale transmitter to  send NULL when the process of sending data
+ *  Set this bit to enable transmitter to  send NULL when the process of sending data
  *  is done.
  */
 #define UART_TXD_BRK    (BIT(6))
@@ -1326,7 +1326,7 @@ extern "C" {
  */
 #define UART_TOUT_CONF_SYNC_REG(i) (REG_UART_BASE(i) + 0x64)
 /** UART_RX_TOUT_EN : R/W; bitpos: [0]; default: 0;
- *  This is the enble bit for uart receiver's timeout function.
+ *  This is the enable bit for uart receiver's timeout function.
  */
 #define UART_RX_TOUT_EN    (BIT(0))
 #define UART_RX_TOUT_EN_M  (UART_RX_TOUT_EN_V << UART_RX_TOUT_EN_S)
@@ -1450,7 +1450,7 @@ extern "C" {
  */
 #define UART_HIGHPULSE_REG(i) (REG_UART_BASE(i) + 0x80)
 /** UART_HIGHPULSE_MIN_CNT : RO; bitpos: [11:0]; default: 4095;
- *  This register stores  the value of the maxinum duration time for the high level
+ *  This register stores  the value of the maximum duration time for the high level
  *  pulse. It is used in baud rate-detect process.
  */
 #define UART_HIGHPULSE_MIN_CNT    0x00000FFFU
diff --git a/components/soc/esp32p4/include/soc/uart_struct.h b/components/soc/esp32p4/register/soc/uart_struct.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/uart_struct.h
rename to components/soc/esp32p4/register/soc/uart_struct.h
index b23e6db930..b750ef943a 100644
--- a/components/soc/esp32p4/include/soc/uart_struct.h
+++ b/components/soc/esp32p4/register/soc/uart_struct.h
@@ -49,7 +49,7 @@ typedef union {
 typedef union {
     struct {
         /** rx_tout_en : R/W; bitpos: [0]; default: 0;
-         *  This is the enble bit for uart receiver's timeout function.
+         *  This is the enable bit for uart receiver's timeout function.
          */
         uint32_t rx_tout_en:1;
         /** rx_tout_flow_dis : R/W; bitpos: [1]; default: 0;
@@ -120,7 +120,7 @@ typedef union {
          */
         uint32_t rxfifo_tout_int_raw:1;
         /** sw_xon_int_raw : R/WTC/SS; bitpos: [9]; default: 0;
-         *  This interrupt raw bit turns to high level when receiver recevies Xon char when
+         *  This interrupt raw bit turns to high level when receiver receives Xon char when
          *  uart_sw_flow_con_en is set to 1.
          */
         uint32_t sw_xon_int_raw:1;
@@ -238,7 +238,7 @@ typedef union {
          */
         uint32_t tx_brk_done_int_st:1;
         /** tx_brk_idle_done_int_st : RO; bitpos: [13]; default: 0;
-         *  This is the stauts bit for tx_brk_idle_done_int_raw when tx_brk_idle_done_int_ena
+         *  This is the status bit for tx_brk_idle_done_int_raw when tx_brk_idle_done_int_ena
          *  is set to 1.
          */
         uint32_t tx_brk_idle_done_int_st:1;
@@ -515,7 +515,7 @@ typedef union {
          */
         uint32_t stop_bit_num:2;
         /** txd_brk : R/W; bitpos: [6]; default: 0;
-         *  Set this bit to enbale transmitter to  send NULL when the process of sending data
+         *  Set this bit to enable transmitter to  send NULL when the process of sending data
          *  is done.
          */
         uint32_t txd_brk:1;
@@ -1160,7 +1160,7 @@ typedef union {
 typedef union {
     struct {
         /** highpulse_min_cnt : RO; bitpos: [11:0]; default: 4095;
-         *  This register stores  the value of the maxinum duration time for the high level
+         *  This register stores  the value of the maximum duration time for the high level
          *  pulse. It is used in baud rate-detect process.
          */
         uint32_t highpulse_min_cnt:12;
diff --git a/components/soc/esp32p4/include/soc/uhci_reg.h b/components/soc/esp32p4/register/soc/uhci_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/uhci_reg.h
rename to components/soc/esp32p4/register/soc/uhci_reg.h
diff --git a/components/soc/esp32p4/include/soc/uhci_struct.h b/components/soc/esp32p4/register/soc/uhci_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/uhci_struct.h
rename to components/soc/esp32p4/register/soc/uhci_struct.h
diff --git a/components/soc/esp32p4/include/soc/usb_serial_jtag_reg.h b/components/soc/esp32p4/register/soc/usb_serial_jtag_reg.h
similarity index 99%
rename from components/soc/esp32p4/include/soc/usb_serial_jtag_reg.h
rename to components/soc/esp32p4/register/soc/usb_serial_jtag_reg.h
index 478c734ea8..6de18f3a76 100644
--- a/components/soc/esp32p4/include/soc/usb_serial_jtag_reg.h
+++ b/components/soc/esp32p4/register/soc/usb_serial_jtag_reg.h
@@ -1140,7 +1140,7 @@ extern "C" {
 #define USB_SERIAL_JTAG_SERIAL_OUT_AFIFO_RESET_RD_V  0x00000001U
 #define USB_SERIAL_JTAG_SERIAL_OUT_AFIFO_RESET_RD_S  3
 /** USB_SERIAL_JTAG_SERIAL_OUT_AFIFO_REMPTY : RO; bitpos: [4]; default: 1;
- *  CDC_ACM OUTOUT async FIFO empty signal in read clock domain.
+ *  CDC_ACM OUTPUT async FIFO empty signal in read clock domain.
  */
 #define USB_SERIAL_JTAG_SERIAL_OUT_AFIFO_REMPTY    (BIT(4))
 #define USB_SERIAL_JTAG_SERIAL_OUT_AFIFO_REMPTY_M  (USB_SERIAL_JTAG_SERIAL_OUT_AFIFO_REMPTY_V << USB_SERIAL_JTAG_SERIAL_OUT_AFIFO_REMPTY_S)
diff --git a/components/soc/esp32p4/include/soc/usb_serial_jtag_struct.h b/components/soc/esp32p4/register/soc/usb_serial_jtag_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/usb_serial_jtag_struct.h
rename to components/soc/esp32p4/register/soc/usb_serial_jtag_struct.h
diff --git a/components/soc/esp32p4/include/soc/usb_wrap_reg.h b/components/soc/esp32p4/register/soc/usb_wrap_reg.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/usb_wrap_reg.h
rename to components/soc/esp32p4/register/soc/usb_wrap_reg.h
diff --git a/components/soc/esp32p4/include/soc/usb_wrap_struct.h b/components/soc/esp32p4/register/soc/usb_wrap_struct.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/usb_wrap_struct.h
rename to components/soc/esp32p4/register/soc/usb_wrap_struct.h