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fix(esp_pm): fix bad apb_max_freq for 26mhz esp32c2

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wuzhenghui
2023-07-25 13:54:24 +08:00
parent e0e4642ff8
commit 5f6f20ea30
2 changed files with 3 additions and 2 deletions
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4
components/esp_pm/pm_impl.c
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@@ -266,7 +266,7 @@ esp_err_t esp_pm_configure(const void* vconfig)
*/ */
apb_max_freq = 80; apb_max_freq = 80;
} }
#elif CONFIG_IDF_TARGET_ESP32C6 #elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
/* Maximum SOC APB clock frequency is 40 MHz, maximum Modem (WiFi, /* Maximum SOC APB clock frequency is 40 MHz, maximum Modem (WiFi,
* Bluetooth, etc..) APB clock frequency is 80 MHz */ * Bluetooth, etc..) APB clock frequency is 80 MHz */
const int soc_apb_clk_freq = esp_clk_apb_freq() / MHZ; const int soc_apb_clk_freq = esp_clk_apb_freq() / MHZ;
@@ -274,7 +274,7 @@ esp_err_t esp_pm_configure(const void* vconfig)
const int apb_clk_freq = MAX(soc_apb_clk_freq, modem_apb_clk_freq); const int apb_clk_freq = MAX(soc_apb_clk_freq, modem_apb_clk_freq);
int apb_max_freq = MIN(max_freq_mhz, apb_clk_freq); /* CPU frequency in APB_MAX mode */ int apb_max_freq = MIN(max_freq_mhz, apb_clk_freq); /* CPU frequency in APB_MAX mode */
#else #else
int apb_max_freq = MIN(max_freq_mhz, APB_CLK_FREQ / MHZ); /* CPU frequency in APB_MAX mode */ int apb_max_freq = MIN(max_freq_mhz, 80); /* CPU frequency in APB_MAX mode */
#endif #endif
apb_max_freq = MAX(apb_max_freq, min_freq_mhz); apb_max_freq = MAX(apb_max_freq, min_freq_mhz);

1
components/soc/esp32h2/include/soc/soc.h
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@@ -140,6 +140,7 @@
#define CPU_CLK_FREQ_MHZ_BTLD (96) // The cpu clock frequency (in MHz) to set at 2nd stage bootloader system clock configuration #define CPU_CLK_FREQ_MHZ_BTLD (96) // The cpu clock frequency (in MHz) to set at 2nd stage bootloader system clock configuration
#define CPU_CLK_FREQ APB_CLK_FREQ #define CPU_CLK_FREQ APB_CLK_FREQ
#define APB_CLK_FREQ ( 32*1000000 ) #define APB_CLK_FREQ ( 32*1000000 )
#define MODEM_APB_CLK_FREQ ( 32*1000000 )
#define REF_CLK_FREQ ( 1000000 ) #define REF_CLK_FREQ ( 1000000 )
#define XTAL_CLK_FREQ (32*1000000) #define XTAL_CLK_FREQ (32*1000000)
#define GPIO_MATRIX_DELAY_NS 0 #define GPIO_MATRIX_DELAY_NS 0