fix(esp_hw_support): fix esp32p4 xtal_xpd depends on TOP power domain

This commit is contained in:
wuzhenghui
2025-04-09 15:21:37 +08:00
parent f031cd39e7
commit 5fbc742248
13 changed files with 39 additions and 7 deletions

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@@ -2314,7 +2314,9 @@ FORCE_INLINE_ATTR bool top_domain_pd_allowed(void) {
#if SOC_PM_SUPPORT_MODEM_PD
top_pd_allowed &= modem_domain_pd_allowed();
#endif
#if SOC_XTAL_CLOCK_PATH_DEPENDS_ON_TOP_DOMAIN
top_pd_allowed &= (s_config.domain[ESP_PD_DOMAIN_XTAL].pd_option != ESP_PD_OPTION_ON);
#endif
return top_pd_allowed;
}

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@@ -267,6 +267,10 @@ config SOC_XTAL_SUPPORT_48M
bool
default y
config SOC_XTAL_CLOCK_PATH_DEPENDS_ON_TOP_DOMAIN
bool
default y
config SOC_AES_SUPPORT_DMA
bool
default y

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@@ -88,6 +88,7 @@
/*-------------------------- XTAL CAPS ---------------------------------------*/
#define SOC_XTAL_SUPPORT_40M 1
#define SOC_XTAL_SUPPORT_48M 1
#define SOC_XTAL_CLOCK_PATH_DEPENDS_ON_TOP_DOMAIN 1
/*-------------------------- AES CAPS -----------------------------------------*/
#define SOC_AES_SUPPORT_DMA (1)

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@@ -247,6 +247,10 @@ config SOC_XTAL_SUPPORT_40M
bool
default y
config SOC_XTAL_CLOCK_PATH_DEPENDS_ON_TOP_DOMAIN
bool
default y
config SOC_AES_SUPPORT_DMA
bool
default y

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@@ -80,6 +80,7 @@
/*-------------------------- XTAL CAPS ---------------------------------------*/
#define SOC_XTAL_SUPPORT_40M 1
#define SOC_XTAL_CLOCK_PATH_DEPENDS_ON_TOP_DOMAIN 1
/*-------------------------- AES CAPS -----------------------------------------*/
#define SOC_AES_SUPPORT_DMA (1)

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@@ -183,6 +183,10 @@ config SOC_XTAL_SUPPORT_40M
bool
default y
config SOC_XTAL_CLOCK_PATH_DEPENDS_ON_TOP_DOMAIN
bool
default y
config SOC_ADC_DIG_CTRL_SUPPORTED
bool
default y

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@@ -67,6 +67,7 @@
#define SOC_SPIRAM_SUPPORTED 1
/*-------------------------- XTAL CAPS ---------------------------------------*/
#define SOC_XTAL_SUPPORT_40M 1
#define SOC_XTAL_CLOCK_PATH_DEPENDS_ON_TOP_DOMAIN 1
/*-------------------------- ADC CAPS -------------------------------*/
/*!< SAR ADC Module*/

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@@ -243,6 +243,10 @@ config SOC_XTAL_SUPPORT_32M
bool
default y
config SOC_XTAL_CLOCK_PATH_DEPENDS_ON_TOP_DOMAIN
bool
default y
config SOC_AES_SUPPORT_DMA
bool
default y

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@@ -95,6 +95,7 @@
/*-------------------------- XTAL CAPS ---------------------------------------*/
#define SOC_XTAL_SUPPORT_32M 1
#define SOC_XTAL_CLOCK_PATH_DEPENDS_ON_TOP_DOMAIN 1
/*-------------------------- AES CAPS -----------------------------------------*/
#define SOC_AES_SUPPORT_DMA (1)

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@@ -95,6 +95,10 @@ config SOC_XTAL_SUPPORT_32M
bool
default y
config SOC_XTAL_CLOCK_PATH_DEPENDS_ON_TOP_DOMAIN
bool
default y
config SOC_AES_SUPPORT_DMA
bool
default y

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@@ -82,6 +82,7 @@
/*-------------------------- XTAL CAPS ---------------------------------------*/
#define SOC_XTAL_SUPPORT_32M 1
#define SOC_XTAL_CLOCK_PATH_DEPENDS_ON_TOP_DOMAIN 1
/*-------------------------- AES CAPS -----------------------------------------*/
#define SOC_AES_SUPPORT_DMA (1)

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@@ -35,6 +35,10 @@ config SOC_XTAL_SUPPORT_32M
bool
default y
config SOC_XTAL_CLOCK_PATH_DEPENDS_ON_TOP_DOMAIN
bool
default y
config SOC_AES_SUPPORT_DMA
bool
default y

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@@ -83,6 +83,7 @@
/*-------------------------- XTAL CAPS ---------------------------------------*/
#define SOC_XTAL_SUPPORT_32M 1
#define SOC_XTAL_CLOCK_PATH_DEPENDS_ON_TOP_DOMAIN 1
/*-------------------------- AES CAPS -----------------------------------------*/
#define SOC_AES_SUPPORT_DMA (1)