From 54febcae0ee0398711118fa50a6d5bba9662f8c5 Mon Sep 17 00:00:00 2001 From: morris Date: Fri, 4 Aug 2023 17:57:57 +0800 Subject: [PATCH 1/2] fix(adc): invalid assertion on the adc_unit --- components/driver/deprecated/adc_legacy.c | 2 +- components/driver/gptimer/Kconfig.gptimer | 2 +- components/esp_adc/adc_continuous.c | 2 +- components/hal/README.md | 2 +- docs/en/api-reference/system/async_memcpy.rst | 4 ++-- 5 files changed, 6 insertions(+), 6 deletions(-) diff --git a/components/driver/deprecated/adc_legacy.c b/components/driver/deprecated/adc_legacy.c index d9d8f95363..b20df639e6 100644 --- a/components/driver/deprecated/adc_legacy.c +++ b/components/driver/deprecated/adc_legacy.c @@ -670,7 +670,7 @@ static adc_atten_t s_atten2_single[ADC2_CHANNEL_MAX]; //Array saving attenuat static int8_t adc_digi_get_io_num(adc_unit_t adc_unit, uint8_t adc_channel) { - assert(adc_unit <= SOC_ADC_PERIPH_NUM); + assert(adc_unit < SOC_ADC_PERIPH_NUM); uint8_t adc_n = (adc_unit == ADC_UNIT_1) ? 0 : 1; return adc_channel_io_map[adc_n][adc_channel]; } diff --git a/components/driver/gptimer/Kconfig.gptimer b/components/driver/gptimer/Kconfig.gptimer index 1283241204..5aeda6fd04 100644 --- a/components/driver/gptimer/Kconfig.gptimer +++ b/components/driver/gptimer/Kconfig.gptimer @@ -1,4 +1,5 @@ menu "GPTimer Configuration" + depends on SOC_GPTIMER_SUPPORTED config GPTIMER_ISR_HANDLER_IN_IRAM bool "Place GPTimer ISR handler into IRAM" default y @@ -16,7 +17,6 @@ menu "GPTimer Configuration" config GPTIMER_ISR_IRAM_SAFE bool "GPTimer ISR IRAM-Safe" select GPTIMER_ISR_HANDLER_IN_IRAM - select GPTIMER_ISR_NON_MASKABLE default n help Ensure the GPTimer interrupt is IRAM-Safe by allowing the interrupt handler to be diff --git a/components/esp_adc/adc_continuous.c b/components/esp_adc/adc_continuous.c index 695a9e6b2e..f0660c880c 100644 --- a/components/esp_adc/adc_continuous.c +++ b/components/esp_adc/adc_continuous.c @@ -67,7 +67,7 @@ static void adc_dma_intr_handler(void *arg); static int8_t adc_digi_get_io_num(adc_unit_t adc_unit, uint8_t adc_channel) { - assert(adc_unit <= SOC_ADC_PERIPH_NUM); + assert(adc_unit < SOC_ADC_PERIPH_NUM); uint8_t adc_n = (adc_unit == ADC_UNIT_1) ? 0 : 1; return adc_channel_io_map[adc_n][adc_channel]; } diff --git a/components/hal/README.md b/components/hal/README.md index 7ec82ff77d..3f7f0e79f3 100644 --- a/components/hal/README.md +++ b/components/hal/README.md @@ -61,7 +61,7 @@ The first argument of a HAL function is usually a pointer to the **context objec `/include/hal` contains header files which provides a hardware-agnostic interface to the SoC. The interface consists of function declarations and abstracted types that other, higher level components can make use of in order to have code portable to all targets ESP-IDF supports. It contains an abstraction layer for interacting with/driving the hardware found in the SoC such as the peripherals and 'core' hardware such as the CPU, MPU, caches, etc. It contains for the abstracted types. -The abstraction design is actually two levels -- often sometimes `xxx_hal.h` includes a lower-level header from a `xxx_ll.h`, which resides in the implementation. More on this abstraction design in the [`hal/include/hal`'s Readme](include/hal/readme.md) +The abstraction design is actually two levels -- often sometimes `xxx_hal.h` includes a lower-level header from a `xxx_ll.h`, which resides in the implementation. ### `target/include` diff --git a/docs/en/api-reference/system/async_memcpy.rst b/docs/en/api-reference/system/async_memcpy.rst index 46f0f4f4ae..a16874232b 100644 --- a/docs/en/api-reference/system/async_memcpy.rst +++ b/docs/en/api-reference/system/async_memcpy.rst @@ -6,9 +6,9 @@ Overview {IDF_TARGET_NAME} has a DMA engine which can help to offload internal memory copy operations from the CPU in an asynchronous way. -The async memcpy API wraps all DMA configurations and operations, the signature of :cpp:func:`esp_async_memcpy` is almost the same to the standard libc ``memcpy`` function. +The async memcpy API wraps all DMA configurations and operations, the signature of :cpp:func:`esp_async_memcpy` is almost the same as the standard libc ``memcpy`` function. -The DMA allows multiple memory copy requests to be queued up before the first one is completed, which allows overlap of computation and memory copy. By the way, it is still possible to know the exact time when a memory copy request is completed by registering an event callback. +The DMA allows multiple memory copy requests to be queued up before the first one is completed, which allows overlap of computation and memory copy. Moreover, it is still possible to know the exact time when a memory copy request is completed by registering an event callback. .. only:: SOC_AHB_GDMA_SUPPORT_PSRAM From fa58d2c6b0f5fba47e838ee5b5e5d713d1dd50ac Mon Sep 17 00:00:00 2001 From: morris Date: Wed, 23 Aug 2023 10:27:27 +0800 Subject: [PATCH 2/2] feat(mcpwm): default clock source setting can leave empty --- components/driver/mcpwm/mcpwm_cap.c | 5 +++-- components/driver/mcpwm/mcpwm_timer.c | 3 ++- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/components/driver/mcpwm/mcpwm_cap.c b/components/driver/mcpwm/mcpwm_cap.c index 965311bdfe..e4e4a01550 100644 --- a/components/driver/mcpwm/mcpwm_cap.c +++ b/components/driver/mcpwm/mcpwm_cap.c @@ -96,13 +96,14 @@ esp_err_t mcpwm_new_capture_timer(const mcpwm_capture_timer_config_t *config, mc mcpwm_group_t *group = cap_timer->group; int group_id = group->group_id; + mcpwm_capture_clock_source_t clk_src = config->clk_src ? config->clk_src : MCPWM_CAPTURE_CLK_SRC_DEFAULT; #if SOC_MCPWM_CAPTURE_CLK_FROM_GROUP // capture timer clock source is same as the MCPWM group - ESP_GOTO_ON_ERROR(mcpwm_select_periph_clock(group, (soc_module_clk_t)config->clk_src), err, TAG, "set group clock failed"); + ESP_GOTO_ON_ERROR(mcpwm_select_periph_clock(group, (soc_module_clk_t)clk_src), err, TAG, "set group clock failed"); cap_timer->resolution_hz = group->resolution_hz; #else // capture timer has independent clock source selection - switch (config->clk_src) { + switch (clk_src) { case MCPWM_CAPTURE_CLK_SRC_APB: cap_timer->resolution_hz = esp_clk_apb_freq(); #if CONFIG_PM_ENABLE diff --git a/components/driver/mcpwm/mcpwm_timer.c b/components/driver/mcpwm/mcpwm_timer.c index 6a3ea03a1b..cf4e21cb09 100644 --- a/components/driver/mcpwm/mcpwm_timer.c +++ b/components/driver/mcpwm/mcpwm_timer.c @@ -110,7 +110,8 @@ esp_err_t mcpwm_new_timer(const mcpwm_timer_config_t *config, mcpwm_timer_handle ESP_GOTO_ON_ERROR(mcpwm_check_intr_priority(group, config->intr_priority), err, TAG, "set group intrrupt priority failed"); // select the clock source - ESP_GOTO_ON_ERROR(mcpwm_select_periph_clock(group, (soc_module_clk_t)config->clk_src), err, TAG, "set group clock failed"); + mcpwm_timer_clock_source_t clk_src = config->clk_src ? config->clk_src : MCPWM_TIMER_CLK_SRC_DEFAULT; + ESP_RETURN_ON_ERROR(mcpwm_select_periph_clock(group, (soc_module_clk_t)clk_src), TAG, "set group clock failed"); // reset the timer to a determined state mcpwm_hal_timer_reset(hal, timer_id); // set timer resolution