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Merge branch 'fix/mutex_between_oct_flash_and_flash_rom_impl' into 'master'

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flash: mutex between oct flash and flash rom impl

See merge request espressif/esp-idf!37760
This commit is contained in:
Armando (Dou Yiwen)
2025-03-21 14:51:08 +08:00
parent f3f3cad07c 9b845f9f8b
commit 64ff6ec274
12 changed files with 29 additions and 28 deletions
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2
components/bootloader_support/bootloader_flash/src/bootloader_flash.c
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@@ -981,7 +981,7 @@ esp_err_t IRAM_ATTR bootloader_flash_reset_chip(void)
bool IRAM_ATTR bootloader_flash_is_octal_mode_enabled(void) bool IRAM_ATTR bootloader_flash_is_octal_mode_enabled(void)
{ {
#if SOC_SPI_MEM_SUPPORT_OPI_MODE #if SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE
return efuse_ll_get_flash_type(); return efuse_ll_get_flash_type();
#else #else
return false; return false;

4
components/esp_hw_support/sleep_gpio.c
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@@ -68,7 +68,7 @@ void esp_sleep_config_gpio_isolate(void)
gpio_sleep_set_pull_mode(esp_mspi_get_io(ESP_MSPI_IO_D), GPIO_PULLUP_ONLY); gpio_sleep_set_pull_mode(esp_mspi_get_io(ESP_MSPI_IO_D), GPIO_PULLUP_ONLY);
gpio_sleep_set_pull_mode(esp_mspi_get_io(ESP_MSPI_IO_HD), GPIO_PULLUP_ONLY); gpio_sleep_set_pull_mode(esp_mspi_get_io(ESP_MSPI_IO_HD), GPIO_PULLUP_ONLY);
gpio_sleep_set_pull_mode(esp_mspi_get_io(ESP_MSPI_IO_WP), GPIO_PULLUP_ONLY); gpio_sleep_set_pull_mode(esp_mspi_get_io(ESP_MSPI_IO_WP), GPIO_PULLUP_ONLY);
#if SOC_SPI_MEM_SUPPORT_OPI_MODE #if SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE
bool octal_mspi_required = bootloader_flash_is_octal_mode_enabled(); bool octal_mspi_required = bootloader_flash_is_octal_mode_enabled();
#if CONFIG_SPIRAM_MODE_OCT #if CONFIG_SPIRAM_MODE_OCT
octal_mspi_required |= true; octal_mspi_required |= true;
@@ -80,7 +80,7 @@ void esp_sleep_config_gpio_isolate(void)
gpio_sleep_set_pull_mode(esp_mspi_get_io(ESP_MSPI_IO_D6), GPIO_PULLUP_ONLY); gpio_sleep_set_pull_mode(esp_mspi_get_io(ESP_MSPI_IO_D6), GPIO_PULLUP_ONLY);
gpio_sleep_set_pull_mode(esp_mspi_get_io(ESP_MSPI_IO_D7), GPIO_PULLUP_ONLY); gpio_sleep_set_pull_mode(esp_mspi_get_io(ESP_MSPI_IO_D7), GPIO_PULLUP_ONLY);
} }
#endif // SOC_SPI_MEM_SUPPORT_OPI_MODE #endif // SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE
#endif // CONFIG_ESP_SLEEP_MSPI_NEED_ALL_IO_PU #endif // CONFIG_ESP_SLEEP_MSPI_NEED_ALL_IO_PU
} }

4
components/esp_rom/include/esp_rom_efuse.h
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@@ -49,7 +49,7 @@ uint32_t esp_rom_efuse_get_flash_gpio_info(void);
*/ */
uint32_t esp_rom_efuse_get_flash_wp_gpio(void); uint32_t esp_rom_efuse_get_flash_wp_gpio(void);
#if SOC_SPI_MEM_SUPPORT_OPI_MODE #if SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE
/** /**
* @brief Read opi flash pads configuration from Efuse * @brief Read opi flash pads configuration from Efuse
* *
@@ -59,7 +59,7 @@ uint32_t esp_rom_efuse_get_flash_wp_gpio(void);
* DQS, D4, D5, D6, D7 accordingly. * DQS, D4, D5, D6, D7 accordingly.
*/ */
uint32_t esp_rom_efuse_get_opiconfig(void); uint32_t esp_rom_efuse_get_opiconfig(void);
#endif // SOC_SPI_MEM_SUPPORT_OPI_MODE #endif // SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE
/** /**
* @brief Read eFuse to check whether secure boot has been enabled or not * @brief Read eFuse to check whether secure boot has been enabled or not

4
components/esp_rom/linux/esp_rom_efuse.c
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@@ -41,12 +41,12 @@ uint32_t esp_rom_efuse_get_flash_wp_gpio(void)
return 0; return 0;
} }
#if SOC_SPI_MEM_SUPPORT_OPI_MODE #if SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE
uint32_t esp_rom_efuse_get_opiconfig(void) uint32_t esp_rom_efuse_get_opiconfig(void)
{ {
return 0; return 0;
} }
#endif // SOC_SPI_MEM_SUPPORT_OPI_MODE #endif // SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE
bool esp_rom_efuse_is_secure_boot_enabled(void) bool esp_rom_efuse_is_secure_boot_enabled(void)
{ {

4
components/esptool_py/Kconfig.projbuild
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@@ -11,12 +11,12 @@ menu "Serial flasher config"
like compressed downloads and more. Usually you should not need to disable that feature like compressed downloads and more. Usually you should not need to disable that feature
config ESPTOOLPY_OCT_FLASH config ESPTOOLPY_OCT_FLASH
depends on IDF_TARGET_ESP32S3 depends on SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE
bool "Enable Octal Flash" bool "Enable Octal Flash"
default n default n
config ESPTOOLPY_FLASH_MODE_AUTO_DETECT config ESPTOOLPY_FLASH_MODE_AUTO_DETECT
depends on IDF_TARGET_ESP32S3 depends on SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE
bool "Choose flash mode automatically (please read help)" bool "Choose flash mode automatically (please read help)"
default y default y
help help

2
components/hal/spi_flash_hal.c
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@@ -138,7 +138,7 @@ esp_err_t spi_flash_hal_init(spi_flash_hal_context_t *data_out, const spi_flash_
data_out->flags &= ~SPI_FLASH_HOST_CONTEXT_FLAG_AUTO_RESUME; data_out->flags &= ~SPI_FLASH_HOST_CONTEXT_FLAG_AUTO_RESUME;
#endif #endif
#if SOC_SPI_MEM_SUPPORT_OPI_MODE #if SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE
if (cfg->octal_mode_en) { if (cfg->octal_mode_en) {
data_out->flags |= SPI_FLASH_HOST_CONTEXT_FLAG_OCTAL_MODE; data_out->flags |= SPI_FLASH_HOST_CONTEXT_FLAG_OCTAL_MODE;
} }

2
components/soc/esp32s3/include/soc/Kconfig.soc_caps.in
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@@ -1403,7 +1403,7 @@ config SOC_SPI_MEM_SUPPORT_SW_SUSPEND
bool bool
default y default y
config SOC_SPI_MEM_SUPPORT_OPI_MODE config SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE
bool bool
default y default y

2
components/soc/esp32s3/include/soc/soc_caps.h
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@@ -547,7 +547,7 @@
#define SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND (1) #define SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND (1)
#define SOC_SPI_MEM_SUPPORT_AUTO_RESUME (1) #define SOC_SPI_MEM_SUPPORT_AUTO_RESUME (1)
#define SOC_SPI_MEM_SUPPORT_SW_SUSPEND (1) #define SOC_SPI_MEM_SUPPORT_SW_SUSPEND (1)
#define SOC_SPI_MEM_SUPPORT_OPI_MODE (1) #define SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE (1)
#define SOC_SPI_MEM_SUPPORT_TIMING_TUNING (1) #define SOC_SPI_MEM_SUPPORT_TIMING_TUNING (1)
#define SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE (1) #define SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE (1)
#define SOC_SPI_MEM_SUPPORT_WRAP (1) #define SOC_SPI_MEM_SUPPORT_WRAP (1)

2
components/spi_flash/CMakeLists.txt
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@@ -16,7 +16,7 @@ if(non_os_build OR CONFIG_APP_BUILD_TYPE_PURE_RAM_APP)
else() else()
set(srcs "flash_brownout_hook.c") set(srcs "flash_brownout_hook.c")
if(CONFIG_SOC_SPI_MEM_SUPPORT_OPI_MODE) if(CONFIG_SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE)
list(APPEND srcs "${target}/spi_flash_oct_flash_init.c") list(APPEND srcs "${target}/spi_flash_oct_flash_init.c")
endif() endif()

3
components/spi_flash/Kconfig
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@@ -240,7 +240,8 @@ menu "SPI Flash driver"
config SPI_FLASH_ROM_IMPL config SPI_FLASH_ROM_IMPL
bool "Use esp_flash implementation in ROM" bool "Use esp_flash implementation in ROM"
depends on ESP_ROM_HAS_SPI_FLASH depends on ESP_ROM_HAS_SPI_FLASH && !ESPTOOLPY_OCT_FLASH
# ROM never supports octal flash before. Future if ROM supports it we can use a ESP_ROM_x macro
default n default n
help help
Enable this flag to use new SPI flash driver functions from ROM instead of ESP-IDF. Enable this flag to use new SPI flash driver functions from ROM instead of ESP-IDF.

24
components/spi_flash/flash_ops.c
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@@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@@ -140,7 +140,7 @@ void IRAM_ATTR spi_flash_rom_impl_init(void)
void IRAM_ATTR esp_mspi_pin_init(void) void IRAM_ATTR esp_mspi_pin_init(void)
{ {
#if SOC_SPI_MEM_SUPPORT_OPI_MODE #if SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE
bool octal_mspi_required = bootloader_flash_is_octal_mode_enabled(); bool octal_mspi_required = bootloader_flash_is_octal_mode_enabled();
#if CONFIG_SPIRAM_MODE_OCT #if CONFIG_SPIRAM_MODE_OCT
octal_mspi_required |= true; octal_mspi_required |= true;
@@ -159,7 +159,7 @@ void esp_mspi_pin_reserve(void)
uint64_t reserve_pin_mask = 0; uint64_t reserve_pin_mask = 0;
uint8_t mspi_io; uint8_t mspi_io;
for (esp_mspi_io_t i = 0; i < ESP_MSPI_IO_MAX; i++) { for (esp_mspi_io_t i = 0; i < ESP_MSPI_IO_MAX; i++) {
#if SOC_SPI_MEM_SUPPORT_OPI_MODE #if SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE
if (!bootloader_flash_is_octal_mode_enabled() if (!bootloader_flash_is_octal_mode_enabled()
&& i >= ESP_MSPI_IO_DQS && i <= ESP_MSPI_IO_D7) { && i >= ESP_MSPI_IO_DQS && i <= ESP_MSPI_IO_D7) {
continue; continue;
@@ -175,7 +175,7 @@ void esp_mspi_pin_reserve(void)
esp_err_t IRAM_ATTR spi_flash_init_chip_state(void) esp_err_t IRAM_ATTR spi_flash_init_chip_state(void)
{ {
#if SOC_SPI_MEM_SUPPORT_OPI_MODE #if SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE
if (bootloader_flash_is_octal_mode_enabled()) { if (bootloader_flash_is_octal_mode_enabled()) {
return esp_opiflash_init(rom_spiflash_legacy_data->chip.device_id); return esp_opiflash_init(rom_spiflash_legacy_data->chip.device_id);
} }
@@ -188,7 +188,7 @@ esp_err_t IRAM_ATTR spi_flash_init_chip_state(void)
void IRAM_ATTR spi_flash_set_rom_required_regs(void) void IRAM_ATTR spi_flash_set_rom_required_regs(void)
{ {
#if SOC_SPI_MEM_SUPPORT_OPI_MODE #if SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE
if (bootloader_flash_is_octal_mode_enabled()) { if (bootloader_flash_is_octal_mode_enabled()) {
//Disable the variable dummy mode when doing timing tuning //Disable the variable dummy mode when doing timing tuning
CLEAR_PERI_REG_MASK(SPI_MEM_DDR_REG(1), SPI_MEM_SPI_FMEM_VAR_DUMMY); CLEAR_PERI_REG_MASK(SPI_MEM_DDR_REG(1), SPI_MEM_SPI_FMEM_VAR_DUMMY);
@@ -223,13 +223,13 @@ static const uint8_t s_mspi_io_num_default[] = {
MSPI_IOMUX_PIN_NUM_CS0, MSPI_IOMUX_PIN_NUM_CS0,
MSPI_IOMUX_PIN_NUM_HD, MSPI_IOMUX_PIN_NUM_HD,
MSPI_IOMUX_PIN_NUM_WP, MSPI_IOMUX_PIN_NUM_WP,
#if SOC_SPI_MEM_SUPPORT_OPI_MODE #if SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE
MSPI_IOMUX_PIN_NUM_DQS, MSPI_IOMUX_PIN_NUM_DQS,
MSPI_IOMUX_PIN_NUM_D4, MSPI_IOMUX_PIN_NUM_D4,
MSPI_IOMUX_PIN_NUM_D5, MSPI_IOMUX_PIN_NUM_D5,
MSPI_IOMUX_PIN_NUM_D6, MSPI_IOMUX_PIN_NUM_D6,
MSPI_IOMUX_PIN_NUM_D7 MSPI_IOMUX_PIN_NUM_D7
#endif // SOC_SPI_MEM_SUPPORT_OPI_MODE #endif // SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE
}; };
uint8_t esp_mspi_get_io(esp_mspi_io_t io) uint8_t esp_mspi_get_io(esp_mspi_io_t io)
@@ -241,7 +241,7 @@ uint8_t esp_mspi_get_io(esp_mspi_io_t io)
#endif #endif
assert(io >= ESP_MSPI_IO_CLK); assert(io >= ESP_MSPI_IO_CLK);
#if SOC_SPI_MEM_SUPPORT_OPI_MODE #if SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE
assert(io <= ESP_MSPI_IO_D7); assert(io <= ESP_MSPI_IO_D7);
#else #else
assert(io <= ESP_MSPI_IO_WP); assert(io <= ESP_MSPI_IO_WP);
@@ -265,11 +265,11 @@ uint8_t esp_mspi_get_io(esp_mspi_io_t io)
#endif #endif
} }
#if SOC_SPI_MEM_SUPPORT_OPI_MODE #if SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE
spiconfig = (io < ESP_MSPI_IO_WP) ? esp_rom_efuse_get_flash_gpio_info() : esp_rom_efuse_get_opiconfig(); spiconfig = (io < ESP_MSPI_IO_WP) ? esp_rom_efuse_get_flash_gpio_info() : esp_rom_efuse_get_opiconfig();
#else #else
spiconfig = esp_rom_efuse_get_flash_gpio_info(); spiconfig = esp_rom_efuse_get_flash_gpio_info();
#endif // SOC_SPI_MEM_SUPPORT_OPI_MODE #endif // SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE
if (spiconfig == ESP_ROM_EFUSE_FLASH_DEFAULT_SPI) { if (spiconfig == ESP_ROM_EFUSE_FLASH_DEFAULT_SPI) {
mspi_io = s_mspi_io_num_default[io]; mspi_io = s_mspi_io_num_default[io];
@@ -283,7 +283,7 @@ uint8_t esp_mspi_get_io(esp_mspi_io_t io)
*/ */
mspi_io = (spiconfig >> io * 6) & 0x3f; mspi_io = (spiconfig >> io * 6) & 0x3f;
} }
#if SOC_SPI_MEM_SUPPORT_OPI_MODE #if SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE
else { else {
/** /**
* [0 : 5] -- DQS * [0 : 5] -- DQS
@@ -294,7 +294,7 @@ uint8_t esp_mspi_get_io(esp_mspi_io_t io)
*/ */
mspi_io = (spiconfig >> (io - ESP_MSPI_IO_DQS) * 6) & 0x3f; mspi_io = (spiconfig >> (io - ESP_MSPI_IO_DQS) * 6) & 0x3f;
} }
#endif // SOC_SPI_MEM_SUPPORT_OPI_MODE #endif // SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE
return mspi_io; return mspi_io;
#else // SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE #else // SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE
return s_mspi_io_num_default[io]; return s_mspi_io_num_default[io];

4
components/spi_flash/include/esp_private/spi_flash_os.h
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@@ -32,13 +32,13 @@ typedef enum {
ESP_MSPI_IO_CS0, /* cs for spi flash */ ESP_MSPI_IO_CS0, /* cs for spi flash */
ESP_MSPI_IO_HD, ESP_MSPI_IO_HD,
ESP_MSPI_IO_WP, ESP_MSPI_IO_WP,
#if SOC_SPI_MEM_SUPPORT_OPI_MODE #if SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE
ESP_MSPI_IO_DQS, ESP_MSPI_IO_DQS,
ESP_MSPI_IO_D4, ESP_MSPI_IO_D4,
ESP_MSPI_IO_D5, ESP_MSPI_IO_D5,
ESP_MSPI_IO_D6, ESP_MSPI_IO_D6,
ESP_MSPI_IO_D7, ESP_MSPI_IO_D7,
#endif // SOC_SPI_MEM_SUPPORT_OPI_MODE #endif // SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE
#if CONFIG_SPIRAM #if CONFIG_SPIRAM
ESP_MSPI_IO_CS1, /* cs for spi ram */ ESP_MSPI_IO_CS1, /* cs for spi ram */
#endif #endif