refactor(rng): rename/merge some adc_ll functions

This commit is contained in:
gaoxu
2025-03-09 16:49:41 +08:00
parent e6c2259b44
commit 675fe44f1e
10 changed files with 48 additions and 48 deletions

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@@ -18,12 +18,12 @@ void bootloader_random_enable(void)
adc_ll_digi_controller_clk_div(0, 0, 0); adc_ll_digi_controller_clk_div(0, 0, 0);
// some ADC sensor registers are in power group PERIF_I2C and need to be enabled via PMU // some ADC sensor registers are in power group PERIF_I2C and need to be enabled via PMU
regi2c_ctrl_ll_i2c_reset_set(); regi2c_ctrl_ll_reset(false);
regi2c_ctrl_ll_i2c_periph_enable(); regi2c_ctrl_ll_i2c_periph_enable();
// enable analog i2c master clock for RNG runtime // enable analog i2c master clock for RNG runtime
ANALOG_CLOCK_ENABLE(); ANALOG_CLOCK_ENABLE();
adc_ll_regi2c_adc_init(); adc_ll_regi2c_init();
adc_ll_set_calibration_param(ADC_UNIT_1, 0x866); adc_ll_set_calibration_param(ADC_UNIT_1, 0x866);
adc_ll_set_calibration_param(ADC_UNIT_2, 0x866); adc_ll_set_calibration_param(ADC_UNIT_2, 0x866);

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@@ -18,12 +18,12 @@ void bootloader_random_enable(void)
adc_ll_digi_controller_clk_div(0, 0, 0); adc_ll_digi_controller_clk_div(0, 0, 0);
// some ADC sensor registers are in power group PERIF_I2C and need to be enabled via PMU // some ADC sensor registers are in power group PERIF_I2C and need to be enabled via PMU
regi2c_ctrl_ll_i2c_reset_set(); regi2c_ctrl_ll_reset(false);
regi2c_ctrl_ll_i2c_periph_enable(); regi2c_ctrl_ll_i2c_periph_enable();
// enable analog i2c master clock for RNG runtime // enable analog i2c master clock for RNG runtime
ANALOG_CLOCK_ENABLE(); ANALOG_CLOCK_ENABLE();
adc_ll_regi2c_adc_init(); adc_ll_regi2c_init();
adc_ll_set_calibration_param(ADC_UNIT_1, 0x866); adc_ll_set_calibration_param(ADC_UNIT_1, 0x866);
adc_ll_set_calibration_param(ADC_UNIT_2, 0x866); adc_ll_set_calibration_param(ADC_UNIT_2, 0x866);

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@@ -22,7 +22,7 @@ void bootloader_random_enable(void)
// enable analog i2c master clock for RNG runtime // enable analog i2c master clock for RNG runtime
ANALOG_CLOCK_ENABLE(); ANALOG_CLOCK_ENABLE();
adc_ll_regi2c_adc_init(); adc_ll_regi2c_init();
adc_ll_set_calibration_param(ADC_UNIT_1, 0x866); adc_ll_set_calibration_param(ADC_UNIT_1, 0x866);
adc_ll_set_calibration_param(ADC_UNIT_2, 0x866); adc_ll_set_calibration_param(ADC_UNIT_2, 0x866);

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@@ -210,7 +210,7 @@ static void pmu_lp_system_init_default(pmu_context_t *ctx)
void pmu_init(void) void pmu_init(void)
{ {
/* Peripheral reg i2c power up */ /* Peripheral reg i2c power up */
regi2c_ctrl_ll_i2c_reset_set(); regi2c_ctrl_ll_reset(false);
regi2c_ctrl_ll_i2c_periph_enable(); regi2c_ctrl_ll_i2c_periph_enable();
REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_ENIF_RTC_DREG, 1); REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_ENIF_RTC_DREG, 1);

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@@ -210,7 +210,7 @@ static void pmu_lp_system_init_default(pmu_context_t *ctx)
void pmu_init(void) void pmu_init(void)
{ {
/* Peripheral reg i2c power up */ /* Peripheral reg i2c power up */
regi2c_ctrl_ll_i2c_reset_set(); regi2c_ctrl_ll_reset(false);
regi2c_ctrl_ll_i2c_periph_enable(); regi2c_ctrl_ll_i2c_periph_enable();
pmu_hp_system_init_default(PMU_instance()); pmu_hp_system_init_default(PMU_instance());

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@@ -699,7 +699,7 @@ static inline void adc_ll_set_calibration_param(adc_unit_t adc_n, uint32_t param
__attribute__((always_inline)) __attribute__((always_inline))
static inline void adc_ll_set_dtest_param(uint32_t param) static inline void adc_ll_set_dtest_param(uint32_t param)
{ {
REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC_DTEST_RTC_ADDR , param); REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC_DTEST_RTC_ADDR, param);
} }
/** /**
@@ -714,13 +714,13 @@ static inline void adc_ll_set_ent_param(uint32_t param)
} }
/** /**
* Enable the SAR TOUT bus * Enable/disable the calibration voltage reference for ADC unit.
* *
* @param adc_n ADC index number. * @param adc_n ADC index number.
* @param en true for enable * @param en true to enable, false to disable
*/ */
__attribute__((always_inline)) __attribute__((always_inline))
static inline void adc_ll_enable_encal_ref(adc_unit_t adc_n, bool en) static inline void adc_ll_enable_calibration_ref(adc_unit_t adc_n, bool en)
{ {
//C6 doesn't support ADC2, here is for backward compatibility for RNG //C6 doesn't support ADC2, here is for backward compatibility for RNG
if (adc_n == ADC_UNIT_1) { if (adc_n == ADC_UNIT_1) {
@@ -734,13 +734,13 @@ static inline void adc_ll_enable_encal_ref(adc_unit_t adc_n, bool en)
* Init regi2c SARADC registers * Init regi2c SARADC registers
*/ */
__attribute__((always_inline)) __attribute__((always_inline))
static inline void adc_ll_regi2c_adc_init(void) static inline void adc_ll_regi2c_init(void)
{ {
adc_ll_set_dtest_param(2); adc_ll_set_dtest_param(2);
adc_ll_set_ent_param(1); adc_ll_set_ent_param(1);
// Config ADC circuit (Analog part) with I2C(HOST ID 0x69) and chose internal voltage as sampling source // Config ADC circuit (Analog part) with I2C(HOST ID 0x69) and chose internal voltage as sampling source
adc_ll_enable_encal_ref(ADC_UNIT_1, true); adc_ll_enable_calibration_ref(ADC_UNIT_1, true);
adc_ll_enable_encal_ref(ADC_UNIT_2, true); adc_ll_enable_calibration_ref(ADC_UNIT_2, true);
} }
/** /**
@@ -751,8 +751,8 @@ static inline void adc_ll_regi2c_adc_deinit(void)
{ {
adc_ll_set_dtest_param(0); adc_ll_set_dtest_param(0);
adc_ll_set_ent_param(0); adc_ll_set_ent_param(0);
adc_ll_enable_encal_ref(ADC_UNIT_1, false); adc_ll_enable_calibration_ref(ADC_UNIT_1, false);
adc_ll_enable_encal_ref(ADC_UNIT_2, false); adc_ll_enable_calibration_ref(ADC_UNIT_2, false);
} }
/*--------------------------------------------------------------- /*---------------------------------------------------------------

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@@ -129,19 +129,19 @@ static inline void regi2c_ctrl_ll_i2c_periph_disable(void)
} }
/** /**
* @brief Set regi2c reset * @brief Enter / Exit reset state
*
* @param enter True to reset mode, false to normal working mode
*/ */
static inline void regi2c_ctrl_ll_i2c_reset_set(void) static inline void regi2c_ctrl_ll_reset(bool enter)
{ {
SET_PERI_REG_MASK(PMU_RF_PWC_REG, PMU_PERIF_I2C_RSTB); if (enter) {
} // Reset mode
CLEAR_PERI_REG_MASK(PMU_RF_PWC_REG, PMU_PERIF_I2C_RSTB);
/** } else {
* @brief Clear regi2c reset // Normal working mode
*/ SET_PERI_REG_MASK(PMU_RF_PWC_REG, PMU_PERIF_I2C_RSTB);
static inline void regi2c_ctrl_ll_i2c_reset_clear(void) }
{
CLEAR_PERI_REG_MASK(PMU_RF_PWC_REG, PMU_PERIF_I2C_RSTB);
} }
#ifdef __cplusplus #ifdef __cplusplus

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@@ -660,7 +660,7 @@ static inline void adc_ll_set_calibration_param(adc_unit_t adc_n, uint32_t param
__attribute__((always_inline)) __attribute__((always_inline))
static inline void adc_ll_set_dtest_param(uint32_t param) static inline void adc_ll_set_dtest_param(uint32_t param)
{ {
REGI2C_WRITE_MASK(I2C_SAR_ADC, I2C_SARADC_DTEST , param); REGI2C_WRITE_MASK(I2C_SAR_ADC, I2C_SARADC_DTEST, param);
} }
/** /**
@@ -675,13 +675,13 @@ static inline void adc_ll_set_ent_param(uint32_t param)
} }
/** /**
* Enable the SAR TOUT bus * Enable/disable the calibration voltage reference for ADC unit.
* *
* @param adc_n ADC index number. * @param adc_n ADC index number.
* @param en true for enable * @param en true to enable, false to disable
*/ */
__attribute__((always_inline)) __attribute__((always_inline))
static inline void adc_ll_enable_encal_ref(adc_unit_t adc_n, bool en) static inline void adc_ll_enable_calibration_ref(adc_unit_t adc_n, bool en)
{ {
//C61 doesn't support ADC2, here is for backward compatibility for RNG //C61 doesn't support ADC2, here is for backward compatibility for RNG
if (adc_n == ADC_UNIT_1) { if (adc_n == ADC_UNIT_1) {
@@ -695,13 +695,13 @@ __attribute__((always_inline))
/** /**
* Init regi2c SARADC registers * Init regi2c SARADC registers
*/ */
static inline void adc_ll_regi2c_adc_init(void) static inline void adc_ll_regi2c_init(void)
{ {
adc_ll_set_dtest_param(0); adc_ll_set_dtest_param(0);
adc_ll_set_ent_param(1); adc_ll_set_ent_param(1);
// Config ADC circuit (Analog part) with I2C(HOST ID 0x69) and chose internal voltage as sampling source // Config ADC circuit (Analog part) with I2C(HOST ID 0x69) and chose internal voltage as sampling source
adc_ll_enable_encal_ref(ADC_UNIT_1, true); adc_ll_enable_calibration_ref(ADC_UNIT_1, true);
adc_ll_enable_encal_ref(ADC_UNIT_2, true); adc_ll_enable_calibration_ref(ADC_UNIT_2, true);
} }
/** /**
@@ -712,8 +712,8 @@ static inline void adc_ll_regi2c_adc_deinit(void)
{ {
adc_ll_set_dtest_param(0); adc_ll_set_dtest_param(0);
adc_ll_set_ent_param(0); adc_ll_set_ent_param(0);
adc_ll_enable_encal_ref(ADC_UNIT_1, false); adc_ll_enable_calibration_ref(ADC_UNIT_1, false);
adc_ll_enable_encal_ref(ADC_UNIT_2, false); adc_ll_enable_calibration_ref(ADC_UNIT_2, false);
} }
/*--------------------------------------------------------------- /*---------------------------------------------------------------

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@@ -129,19 +129,19 @@ static inline void regi2c_ctrl_ll_i2c_periph_disable(void)
} }
/** /**
* @brief Set regi2c reset * @brief Enter / Exit reset state
*
* @param enter True to reset mode, false to normal working mode
*/ */
static inline void regi2c_ctrl_ll_i2c_reset_set(void) static inline void regi2c_ctrl_ll_reset(bool reset_on)
{ {
SET_PERI_REG_MASK(PMU_RF_PWC_REG, PMU_PERIF_I2C_RSTB); if (reset_on) {
} // Reset mode
CLEAR_PERI_REG_MASK(PMU_RF_PWC_REG, PMU_PERIF_I2C_RSTB);
/** } else {
* @brief Clear regi2c reset // Normal working mode
*/ SET_PERI_REG_MASK(PMU_RF_PWC_REG, PMU_PERIF_I2C_RSTB);
static inline void regi2c_ctrl_ll_i2c_reset_clear(void) }
{
CLEAR_PERI_REG_MASK(PMU_RF_PWC_REG, PMU_PERIF_I2C_RSTB);
} }
#ifdef __cplusplus #ifdef __cplusplus

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@@ -727,7 +727,7 @@ static inline void adc_ll_enable_tout_bus(adc_unit_t adc_n, bool en)
* Init regi2c SARADC registers * Init regi2c SARADC registers
*/ */
__attribute__((always_inline)) __attribute__((always_inline))
static inline void adc_ll_regi2c_adc_init(void) static inline void adc_ll_regi2c_init(void)
{ {
adc_ll_set_dtest_param(0); adc_ll_set_dtest_param(0);
adc_ll_set_ent_param(1); adc_ll_set_ent_param(1);