forked from espressif/esp-idf
fix(pmu): enable all func clock icg during retention
This should only increase a tiny amount of the power consumption in the retention process, but save debug time since some module register read/write relies not only APB but also func clock.
This commit is contained in:
@@ -291,18 +291,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
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.hp_sleep2active_backup_en = 0, \
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.hp_modem2active_backup_en = 0, \
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}, \
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.backup_clk = ( \
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BIT(PMU_ICG_FUNC_ENA_REGDMA) | \
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BIT(PMU_ICG_FUNC_ENA_GDMA) | \
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BIT(PMU_ICG_FUNC_ENA_TG0) | \
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BIT(PMU_ICG_FUNC_ENA_TG1) | \
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BIT(PMU_ICG_FUNC_ENA_HPBUS) | \
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BIT(PMU_ICG_FUNC_ENA_MSPI) | \
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BIT(PMU_ICG_FUNC_ENA_IOMUX) | \
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BIT(PMU_ICG_FUNC_ENA_SPI2) | \
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BIT(PMU_ICG_FUNC_ENA_UART0) | \
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BIT(PMU_ICG_FUNC_ENA_SYSTIMER) \
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) \
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.backup_clk = 0xffffffff, \
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}
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#define PMU_HP_MODEM_RETENTION_CONFIG_DEFAULT() { \
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@@ -314,17 +303,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
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.hp_sleep2modem_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 1), \
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.hp_sleep2modem_backup_en = 0, \
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}, \
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.backup_clk = ( \
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BIT(PMU_ICG_FUNC_ENA_REGDMA) | \
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BIT(PMU_ICG_FUNC_ENA_TG0) | \
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BIT(PMU_ICG_FUNC_ENA_TG1) | \
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BIT(PMU_ICG_FUNC_ENA_HPBUS) | \
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BIT(PMU_ICG_FUNC_ENA_MSPI) | \
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BIT(PMU_ICG_FUNC_ENA_IOMUX) | \
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BIT(PMU_ICG_FUNC_ENA_SPI2) | \
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BIT(PMU_ICG_FUNC_ENA_UART0) | \
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BIT(PMU_ICG_FUNC_ENA_SYSTIMER) \
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) \
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.backup_clk = 0xffffffff, \
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}
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#define PMU_HP_SLEEP_RETENTION_CONFIG_DEFAULT() { \
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@@ -341,17 +320,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
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.hp_modem2sleep_backup_en = 0, \
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.hp_active2sleep_backup_en = 0, \
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}, \
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.backup_clk = ( \
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BIT(PMU_ICG_FUNC_ENA_REGDMA) | \
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BIT(PMU_ICG_FUNC_ENA_TG0) | \
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BIT(PMU_ICG_FUNC_ENA_TG1) | \
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BIT(PMU_ICG_FUNC_ENA_HPBUS) | \
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BIT(PMU_ICG_FUNC_ENA_MSPI) | \
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BIT(PMU_ICG_FUNC_ENA_IOMUX) | \
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BIT(PMU_ICG_FUNC_ENA_SPI2) | \
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BIT(PMU_ICG_FUNC_ENA_UART0) | \
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BIT(PMU_ICG_FUNC_ENA_SYSTIMER) \
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) \
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.backup_clk = 0xffffffff, \
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}
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const pmu_hp_system_retention_param_t * pmu_hp_system_retention_param_default(pmu_hp_mode_t mode)
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@@ -87,7 +87,7 @@ const pmu_hp_system_analog_param_t* pmu_hp_system_analog_param_default(pmu_hp_mo
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typedef struct {
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pmu_hp_backup_reg_t retention;
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uint32_t backup_clk;
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uint32_t backup_clk; // icg_func
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} pmu_hp_system_retention_param_t;
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const pmu_hp_system_retention_param_t* pmu_hp_system_retention_param_default(pmu_hp_mode_t mode);
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@@ -291,18 +291,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
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.hp_sleep2active_backup_en = 0, \
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.hp_modem2active_backup_en = 0, \
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}, \
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.backup_clk = ( \
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BIT(PMU_ICG_FUNC_ENA_GDMA) | \
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BIT(PMU_ICG_FUNC_ENA_REGDMA) | \
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BIT(PMU_ICG_FUNC_ENA_TG0) | \
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BIT(PMU_ICG_FUNC_ENA_TG1) | \
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BIT(PMU_ICG_FUNC_ENA_HPBUS) | \
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BIT(PMU_ICG_FUNC_ENA_MSPI) | \
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BIT(PMU_ICG_FUNC_ENA_IOMUX) | \
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BIT(PMU_ICG_FUNC_ENA_SPI2) | \
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BIT(PMU_ICG_FUNC_ENA_UART0) | \
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BIT(PMU_ICG_FUNC_ENA_SYSTIMER) \
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) \
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.backup_clk = 0xffffffff, \
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}
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#define PMU_HP_MODEM_RETENTION_CONFIG_DEFAULT() { \
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@@ -314,17 +303,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
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.hp_sleep2modem_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 1), \
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.hp_sleep2modem_backup_en = 0, \
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}, \
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.backup_clk = ( \
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BIT(PMU_ICG_FUNC_ENA_REGDMA) | \
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BIT(PMU_ICG_FUNC_ENA_TG0) | \
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BIT(PMU_ICG_FUNC_ENA_TG1) | \
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BIT(PMU_ICG_FUNC_ENA_HPBUS) | \
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BIT(PMU_ICG_FUNC_ENA_MSPI) | \
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BIT(PMU_ICG_FUNC_ENA_IOMUX) | \
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BIT(PMU_ICG_FUNC_ENA_SPI2) | \
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BIT(PMU_ICG_FUNC_ENA_UART0) | \
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BIT(PMU_ICG_FUNC_ENA_SYSTIMER) \
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) \
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.backup_clk = 0xffffffff, \
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}
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#define PMU_HP_SLEEP_RETENTION_CONFIG_DEFAULT() { \
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@@ -341,18 +320,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
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.hp_modem2sleep_backup_en = 0, \
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.hp_active2sleep_backup_en = 0, \
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}, \
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.backup_clk = ( \
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BIT(PMU_ICG_FUNC_ENA_GDMA) | \
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BIT(PMU_ICG_FUNC_ENA_REGDMA) | \
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BIT(PMU_ICG_FUNC_ENA_TG0) | \
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BIT(PMU_ICG_FUNC_ENA_TG1) | \
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BIT(PMU_ICG_FUNC_ENA_HPBUS) | \
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BIT(PMU_ICG_FUNC_ENA_MSPI) | \
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BIT(PMU_ICG_FUNC_ENA_IOMUX) | \
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BIT(PMU_ICG_FUNC_ENA_SPI2) | \
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BIT(PMU_ICG_FUNC_ENA_UART0) | \
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BIT(PMU_ICG_FUNC_ENA_SYSTIMER) \
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) \
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.backup_clk = 0xffffffff, \
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}
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const pmu_hp_system_retention_param_t * pmu_hp_system_retention_param_default(pmu_hp_mode_t mode)
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@@ -92,7 +92,7 @@ const pmu_hp_system_analog_param_t* pmu_hp_system_analog_param_default(pmu_hp_mo
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typedef struct {
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pmu_hp_backup_reg_t retention;
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uint32_t backup_clk;
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uint32_t backup_clk; // icg_func
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} pmu_hp_system_retention_param_t;
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const pmu_hp_system_retention_param_t* pmu_hp_system_retention_param_default(pmu_hp_mode_t mode);
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@@ -290,18 +290,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
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.hp_sleep2active_backup_en = 0, \
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.hp_modem2active_backup_en = 0, \
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}, \
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.backup_clk = ( \
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BIT(PMU_ICG_FUNC_ENA_REGDMA) | \
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BIT(PMU_ICG_FUNC_ENA_GDMA) | \
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BIT(PMU_ICG_FUNC_ENA_TG0) | \
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BIT(PMU_ICG_FUNC_ENA_TG1) | \
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BIT(PMU_ICG_FUNC_ENA_HPBUS) | \
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BIT(PMU_ICG_FUNC_ENA_MSPI) | \
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BIT(PMU_ICG_FUNC_ENA_IOMUX) | \
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BIT(PMU_ICG_FUNC_ENA_SPI2) | \
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BIT(PMU_ICG_FUNC_ENA_UART0) | \
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BIT(PMU_ICG_FUNC_ENA_SYSTIMER) \
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) \
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.backup_clk = 0xffffffff, \
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}
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#define PMU_HP_MODEM_RETENTION_CONFIG_DEFAULT() { \
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@@ -313,17 +302,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
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.hp_sleep2modem_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 1), \
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.hp_sleep2modem_backup_en = 0, \
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}, \
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.backup_clk = ( \
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BIT(PMU_ICG_FUNC_ENA_REGDMA) | \
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BIT(PMU_ICG_FUNC_ENA_TG0) | \
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BIT(PMU_ICG_FUNC_ENA_TG1) | \
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BIT(PMU_ICG_FUNC_ENA_HPBUS) | \
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BIT(PMU_ICG_FUNC_ENA_MSPI) | \
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BIT(PMU_ICG_FUNC_ENA_IOMUX) | \
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BIT(PMU_ICG_FUNC_ENA_SPI2) | \
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BIT(PMU_ICG_FUNC_ENA_UART0) | \
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BIT(PMU_ICG_FUNC_ENA_SYSTIMER) \
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) \
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.backup_clk = 0xffffffff, \
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}
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#define PMU_HP_SLEEP_RETENTION_CONFIG_DEFAULT() { \
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@@ -340,17 +319,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
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.hp_modem2sleep_backup_en = 0, \
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.hp_active2sleep_backup_en = 0, \
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}, \
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.backup_clk = ( \
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BIT(PMU_ICG_FUNC_ENA_REGDMA) | \
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BIT(PMU_ICG_FUNC_ENA_TG0) | \
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BIT(PMU_ICG_FUNC_ENA_TG1) | \
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BIT(PMU_ICG_FUNC_ENA_HPBUS) | \
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BIT(PMU_ICG_FUNC_ENA_MSPI) | \
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BIT(PMU_ICG_FUNC_ENA_IOMUX) | \
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BIT(PMU_ICG_FUNC_ENA_SPI2) | \
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BIT(PMU_ICG_FUNC_ENA_UART0) | \
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BIT(PMU_ICG_FUNC_ENA_SYSTIMER) \
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) \
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.backup_clk = 0xffffffff, \
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}
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const pmu_hp_system_retention_param_t * pmu_hp_system_retention_param_default(pmu_hp_mode_t mode)
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@@ -90,7 +90,7 @@ const pmu_hp_system_analog_param_t* pmu_hp_system_analog_param_default(pmu_hp_mo
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typedef struct {
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pmu_hp_backup_reg_t retention;
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uint32_t backup_clk;
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uint32_t backup_clk; // icg_func
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} pmu_hp_system_retention_param_t;
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const pmu_hp_system_retention_param_t* pmu_hp_system_retention_param_default(pmu_hp_mode_t mode);
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@@ -290,18 +290,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
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.hp_sleep2active_backup_en = 0, \
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.hp_modem2active_backup_en = 0, \
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}, \
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.backup_clk = ( \
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BIT(PMU_ICG_FUNC_ENA_GDMA) \
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| BIT(PMU_ICG_FUNC_ENA_REGDMA) \
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| BIT(PMU_ICG_FUNC_ENA_TG0) \
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| BIT(PMU_ICG_FUNC_ENA_HPBUS) \
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| BIT(PMU_ICG_FUNC_ENA_MSPI) \
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| BIT(PMU_ICG_FUNC_ENA_IOMUX) \
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| BIT(PMU_ICG_FUNC_ENA_SPI2) \
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| BIT(PMU_ICG_FUNC_ENA_SEC) \
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| BIT(PMU_ICG_FUNC_ENA_PWM) \
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| BIT(PMU_ICG_FUNC_ENA_SYSTIMER) \
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| BIT(PMU_ICG_FUNC_ENA_UART0)), \
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.backup_clk = 0xffffffff, \
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}
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#define PMU_HP_MODEM_RETENTION_CONFIG_DEFAULT() { \
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@@ -313,16 +302,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
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.hp_sleep2modem_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 1), \
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.hp_sleep2modem_backup_en = 0, \
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}, \
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.backup_clk = (BIT(PMU_ICG_FUNC_ENA_REGDMA) \
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| BIT(PMU_ICG_FUNC_ENA_TG0) \
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| BIT(PMU_ICG_FUNC_ENA_HPBUS) \
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| BIT(PMU_ICG_FUNC_ENA_MSPI) \
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| BIT(PMU_ICG_FUNC_ENA_IOMUX) \
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| BIT(PMU_ICG_FUNC_ENA_SPI2) \
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| BIT(PMU_ICG_FUNC_ENA_SEC) \
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| BIT(PMU_ICG_FUNC_ENA_PWM) \
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| BIT(PMU_ICG_FUNC_ENA_SYSTIMER) \
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| BIT(PMU_ICG_FUNC_ENA_UART0)), \
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.backup_clk = 0xffffffff, \
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}
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#define PMU_HP_SLEEP_RETENTION_CONFIG_DEFAULT() { \
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@@ -339,18 +319,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
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.hp_modem2sleep_backup_en = 0, \
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.hp_active2sleep_backup_en = 0, \
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}, \
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.backup_clk = ( \
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BIT(PMU_ICG_FUNC_ENA_GDMA) \
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| BIT(PMU_ICG_FUNC_ENA_REGDMA) \
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| BIT(PMU_ICG_FUNC_ENA_TG0) \
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| BIT(PMU_ICG_FUNC_ENA_HPBUS) \
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| BIT(PMU_ICG_FUNC_ENA_MSPI) \
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| BIT(PMU_ICG_FUNC_ENA_IOMUX) \
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| BIT(PMU_ICG_FUNC_ENA_SPI2) \
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| BIT(PMU_ICG_FUNC_ENA_SEC) \
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| BIT(PMU_ICG_FUNC_ENA_PWM) \
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| BIT(PMU_ICG_FUNC_ENA_SYSTIMER) \
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| BIT(PMU_ICG_FUNC_ENA_UART0)), \
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.backup_clk = 0xffffffff, \
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}
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const pmu_hp_system_retention_param_t * pmu_hp_system_retention_param_default(pmu_hp_mode_t mode)
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@@ -85,7 +85,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
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typedef struct {
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pmu_hp_backup_reg_t retention;
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uint32_t backup_clk;
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uint32_t backup_clk; // icg_func
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} pmu_hp_system_retention_param_t;
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const pmu_hp_system_retention_param_t * pmu_hp_system_retention_param_default(pmu_hp_mode_t mode);
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@@ -407,7 +407,7 @@ typedef struct {
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typedef struct pmu_sleep_machine_constant {
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struct {
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uint16_t min_slp_time_us; /* Mininum sleep protection time (unit: microsecond) */
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uint16_t min_slp_time_us; /* Minimum sleep protection time (unit: microsecond) */
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uint8_t reserved0;
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uint16_t reserved1;
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uint16_t analog_wait_time_us; /* LP LDO power up wait time (unit: microsecond) */
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@@ -418,7 +418,7 @@ typedef struct pmu_sleep_machine_constant {
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uint16_t power_up_wait_time_us; /* (unit: microsecond) */
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} lp;
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struct {
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uint16_t min_slp_time_us; /* Mininum sleep protection time (unit: microsecond) */
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uint16_t min_slp_time_us; /* Minimum sleep protection time (unit: microsecond) */
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uint16_t analog_wait_time_us; /* HP LDO power up wait time (unit: microsecond) */
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uint16_t power_supply_wait_time_us; /* (unit: microsecond) */
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uint16_t power_up_wait_time_us; /* (unit: microsecond) */
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@@ -208,18 +208,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
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.hp_sleep2active_backup_en = 0, \
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.hp_modem2active_backup_en = 0, \
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}, \
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.backup_clk = ( \
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BIT(PMU_ICG_FUNC_ENA_L2MEM_MEM) | \
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BIT(PMU_ICG_FUNC_ENA_L2MEM_SYS) | \
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BIT(PMU_ICG_FUNC_ENA_REGDMA) | \
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BIT(PMU_ICG_FUNC_ENA_HP_CLKRST) | \
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BIT(PMU_ICG_FUNC_ENA_SYSREG_APB) | \
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BIT(PMU_ICG_FUNC_ENA_ICM_CPU) | \
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BIT(PMU_ICG_FUNC_ENA_ICM_APB) | \
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BIT(PMU_ICG_FUNC_ENA_ICM_SYS) | \
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BIT(PMU_ICG_FUNC_ENA_ICM_MEM) | \
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BIT(PMU_ICG_FUNC_ENA_INTRMTX_APB) \
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) \
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.backup_clk = 0xffffffff, \
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}
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#define PMU_HP_SLEEP_RETENTION_CONFIG_DEFAULT() { \
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@@ -236,18 +225,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
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.hp_modem2sleep_backup_en = 0, \
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.hp_active2sleep_backup_en = 0, \
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}, \
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.backup_clk = ( \
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BIT(PMU_ICG_FUNC_ENA_L2MEM_MEM) | \
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BIT(PMU_ICG_FUNC_ENA_L2MEM_SYS) | \
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BIT(PMU_ICG_FUNC_ENA_REGDMA) | \
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BIT(PMU_ICG_FUNC_ENA_HP_CLKRST) | \
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BIT(PMU_ICG_FUNC_ENA_SYSREG_APB) | \
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BIT(PMU_ICG_FUNC_ENA_ICM_CPU) | \
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BIT(PMU_ICG_FUNC_ENA_ICM_APB) | \
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BIT(PMU_ICG_FUNC_ENA_ICM_SYS) | \
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BIT(PMU_ICG_FUNC_ENA_ICM_MEM) | \
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BIT(PMU_ICG_FUNC_ENA_INTRMTX_APB) \
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) \
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.backup_clk = 0xffffffff, \
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}
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const pmu_hp_system_retention_param_t * pmu_hp_system_retention_param_default(pmu_hp_mode_t mode)
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@@ -86,7 +86,7 @@ const pmu_hp_system_analog_param_t* pmu_hp_system_analog_param_default(pmu_hp_mo
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typedef struct {
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pmu_hp_backup_reg_t retention;
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uint32_t backup_clk;
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uint32_t backup_clk; // icg_func
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} pmu_hp_system_retention_param_t;
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const pmu_hp_system_retention_param_t* pmu_hp_system_retention_param_default(pmu_hp_mode_t mode);
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||||
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Reference in New Issue
Block a user