Merge branch 'fix/crypto_periphs_use_rcc_atomic_blocks' into 'master'

Use rcc atomic blocks to enable/reset crypto peripherals

See merge request espressif/esp-idf!25811

components/esp_hw_support/esp_ds.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -14,6 +14,7 @@
 #include "esp_timer.h"
 #include "esp_ds.h"
 #include "esp_crypto_lock.h"
+#include "esp_private/esp_crypto_lock_internal.h"
 #include "esp_hmac.h"
 #include "esp_memory_utils.h"
 #if CONFIG_IDF_TARGET_ESP32S2
@@ -26,6 +27,7 @@
 #include "hal/ds_hal.h"
 #include "hal/ds_ll.h"
 #include "hal/hmac_hal.h"
+#include "hal/hmac_ll.h"
 #endif /* !CONFIG_IDF_TARGET_ESP32S2 */
 
 #if CONFIG_IDF_TARGET_ESP32S2
@@ -258,9 +260,17 @@ static void ds_acquire_enable(void)
     esp_crypto_mpi_lock_acquire();
 #endif
     // We also enable SHA and HMAC here. SHA is used by HMAC, HMAC is used by DS.
-    periph_module_enable(PERIPH_HMAC_MODULE);
+    HMAC_RCC_ATOMIC() {
+        hmac_ll_enable_bus_clock(true);
+        hmac_ll_reset_register();
+    }
+
     periph_module_enable(PERIPH_SHA_MODULE);
-    periph_module_enable(PERIPH_DS_MODULE);
+
+    DS_RCC_ATOMIC() {
+        ds_ll_enable_bus_clock(true);
+        ds_ll_reset_register();
+    }
 
     hmac_hal_start();
 }
@@ -269,9 +279,15 @@ static void ds_disable_release(void)
 {
     ds_hal_finish();
 
-    periph_module_disable(PERIPH_DS_MODULE);
+    DS_RCC_ATOMIC() {
+        ds_ll_enable_bus_clock(false);
+    }
+
     periph_module_disable(PERIPH_SHA_MODULE);
-    periph_module_disable(PERIPH_HMAC_MODULE);
+
+    HMAC_RCC_ATOMIC() {
+        hmac_ll_enable_bus_clock(false);
+    }
 
 #if CONFIG_IDF_TARGET_ESP32S3
     esp_crypto_mpi_lock_release();
@@ -414,12 +430,12 @@ esp_err_t esp_ds_encrypt_params(esp_ds_data_t *data,
 
     esp_err_t result = ESP_OK;
 
-    esp_crypto_ds_lock_acquire();
+    // The `esp_ds_encrypt_params` operation does not use the Digital Signature peripheral,
+    // but just the AES and SHA peripherals, so acquiring locks just for these peripherals
+    // would be enough rather than acquiring a lock for the Digital Signature peripheral.
+    esp_crypto_sha_aes_lock_acquire();
     periph_module_enable(PERIPH_AES_MODULE);
-    periph_module_enable(PERIPH_DS_MODULE);
     periph_module_enable(PERIPH_SHA_MODULE);
-    periph_module_enable(PERIPH_HMAC_MODULE);
-    periph_module_enable(PERIPH_RSA_MODULE);
 
     ets_ds_data_t *ds_data = (ets_ds_data_t *) data;
     const ets_ds_p_data_t *ds_plain_data = (const ets_ds_p_data_t *) p_data;
@@ -430,12 +446,9 @@ esp_err_t esp_ds_encrypt_params(esp_ds_data_t *data,
         result = ESP_ERR_INVALID_ARG;
     }
 
-    periph_module_disable(PERIPH_RSA_MODULE);
-    periph_module_disable(PERIPH_HMAC_MODULE);
     periph_module_disable(PERIPH_SHA_MODULE);
-    periph_module_disable(PERIPH_DS_MODULE);
     periph_module_disable(PERIPH_AES_MODULE);
-    esp_crypto_ds_lock_release();
+    esp_crypto_sha_aes_lock_release();
 
     return result;
 }

components/esp_hw_support/esp_hmac.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -13,11 +13,14 @@
 #include "esp_hmac.h"
 #include "esp_log.h"
 #include "esp_crypto_lock.h"
+#include "esp_private/esp_crypto_lock_internal.h"
 #include "soc/hwcrypto_reg.h"
 #include "soc/system_reg.h"
 
 #if !CONFIG_IDF_TARGET_ESP32S2
+#include "hal/ds_ll.h"
 #include "hal/hmac_hal.h"
+#include "hal/hmac_ll.h"
 #include "esp_private/periph_ctrl.h"
 #endif
 
@@ -67,9 +70,17 @@ esp_err_t esp_hmac_calculate(hmac_key_id_t key_id,
     esp_crypto_hmac_lock_acquire();
 
     // We also enable SHA and DS here. SHA is used by HMAC, DS will otherwise hold SHA in reset state.
-    periph_module_enable(PERIPH_HMAC_MODULE);
+    HMAC_RCC_ATOMIC() {
+        hmac_ll_enable_bus_clock(true);
+        hmac_ll_reset_register();
+    }
+
     periph_module_enable(PERIPH_SHA_MODULE);
-    periph_module_enable(PERIPH_DS_MODULE);
+
+    DS_RCC_ATOMIC() {
+        ds_ll_enable_bus_clock(true);
+        ds_ll_reset_register();
+    }
 
     hmac_hal_start();
 
@@ -131,9 +142,15 @@ esp_err_t esp_hmac_calculate(hmac_key_id_t key_id,
     // Read back result (bit swapped)
     hmac_hal_read_result_256(hmac);
 
-    periph_module_disable(PERIPH_DS_MODULE);
+    DS_RCC_ATOMIC() {
+        ds_ll_enable_bus_clock(false);
+    }
+
     periph_module_disable(PERIPH_SHA_MODULE);
-    periph_module_disable(PERIPH_HMAC_MODULE);
+
+    HMAC_RCC_ATOMIC() {
+        hmac_ll_enable_bus_clock(false);
+    }
 
     esp_crypto_hmac_lock_release();
 

components/esp_hw_support/include/esp_private/esp_crypto_lock_internal.h

@@ -0,0 +1,32 @@
+/*
+ * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "esp_private/periph_ctrl.h"
+#include "soc/soc_caps.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if SOC_RCC_IS_INDEPENDENT
+#define MPI_RCC_ATOMIC()
+#define ECC_RCC_ATOMIC()
+#define HMAC_RCC_ATOMIC()
+#define DS_RCC_ATOMIC()
+#define ECDSA_RCC_ATOMIC()
+#else /* !SOC_RCC_IS_INDEPENDENT */
+#define MPI_RCC_ATOMIC() PERIPH_RCC_ATOMIC()
+#define ECC_RCC_ATOMIC() PERIPH_RCC_ATOMIC()
+#define HMAC_RCC_ATOMIC() PERIPH_RCC_ATOMIC()
+#define DS_RCC_ATOMIC() PERIPH_RCC_ATOMIC()
+#define ECDSA_RCC_ATOMIC() PERIPH_RCC_ATOMIC()
+#endif /* SOC_RCC_IS_INDEPENDENT */
+
+#ifdef __cplusplus
+}
+#endif

components/hal/esp32/include/hal/mpi_ll.h

@@ -19,6 +19,40 @@ extern "C" {
 #endif
 
 
+/**
+ * @brief Enable the bus clock for MPI peripheral module
+ *
+ * @param enable true to enable the module, false to disable the module
+ */
+static inline void mpi_ll_enable_bus_clock(bool enable)
+{
+    if (enable) {
+        DPORT_SET_PERI_REG_MASK(DPORT_PERI_CLK_EN_REG, DPORT_PERI_EN_RSA);
+    } else {
+        DPORT_CLEAR_PERI_REG_MASK(DPORT_PERI_CLK_EN_REG, DPORT_PERI_EN_RSA);
+    }
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define mpi_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; mpi_ll_enable_bus_clock(__VA_ARGS__)
+
+/**
+ * @brief Reset the MPI peripheral module
+ */
+static inline void mpi_ll_reset_register(void)
+{
+    DPORT_SET_PERI_REG_MASK(DPORT_PERI_RST_EN_REG, DPORT_PERI_EN_RSA);
+    DPORT_CLEAR_PERI_REG_MASK(DPORT_PERI_RST_EN_REG, DPORT_PERI_EN_RSA);
+
+    // Clear reset on digital signature also, otherwise RSA is held in reset
+    DPORT_CLEAR_PERI_REG_MASK(DPORT_PERI_RST_EN_REG, DPORT_PERI_EN_DIGITAL_SIGNATURE);
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define mpi_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; mpi_ll_reset_register(__VA_ARGS__)
+
 /* Round up number of words to nearest
    512 bit (16 word) block count.
 */

components/hal/esp32c2/include/hal/ecc_ll.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -10,6 +10,7 @@
 #include "hal/assert.h"
 #include "hal/ecc_types.h"
 #include "soc/ecc_mult_reg.h"
+#include "soc/system_struct.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -21,6 +22,33 @@ typedef enum {
     ECC_PARAM_K,
 } ecc_ll_param_t;
 
+/**
+ * @brief Enable the bus clock for ECC peripheral module
+ *
+ * @param true to enable the module, false to disable the module
+ */
+static inline void ecc_ll_enable_bus_clock(bool enable)
+{
+    SYSTEM.perip_clk_en1.crypto_ecc_clk_en = enable;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define ecc_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; ecc_ll_enable_bus_clock(__VA_ARGS__)
+
+/**
+ * @brief Reset the ECC peripheral module
+ */
+static inline void ecc_ll_reset_register(void)
+{
+    SYSTEM.perip_rst_en1.crypto_ecc_rst = 1;
+    SYSTEM.perip_rst_en1.crypto_ecc_rst = 0;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define ecc_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; ecc_ll_reset_register(__VA_ARGS__)
+
 static inline void ecc_ll_enable_interrupt(void)
 {
     REG_SET_FIELD(ECC_MULT_INT_ENA_REG, ECC_MULT_CALC_DONE_INT_ENA, 1);

components/hal/esp32c3/include/hal/ds_ll.h

@@ -17,12 +17,40 @@
 
 #include "soc/hwcrypto_reg.h"
 #include "soc/soc_caps.h"
+#include "soc/system_struct.h"
 #include "hal/ds_types.h"
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+/**
+ * @brief Enable the bus clock for Digital Signature peripheral module
+ *
+ * @param true to enable the module, false to disable the module
+ */
+static inline void ds_ll_enable_bus_clock(bool enable)
+{
+    SYSTEM.perip_clk_en1.reg_crypto_ds_clk_en = enable;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define ds_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; ds_ll_enable_bus_clock(__VA_ARGS__)
+
+/**
+ * @brief Reset the Digital Signature peripheral module
+ */
+static inline void ds_ll_reset_register(void)
+{
+    SYSTEM.perip_rst_en1.reg_crypto_ds_rst = 1;
+    SYSTEM.perip_rst_en1.reg_crypto_ds_rst = 0;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define ds_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; ds_ll_reset_register(__VA_ARGS__)
+
 static inline void ds_ll_start(void)
 {
     REG_WRITE(DS_SET_START_REG, 1);

components/hal/esp32c3/include/hal/hmac_ll.h

@@ -12,9 +12,11 @@
 
 #pragma once
 
+#include <stdbool.h>
 #include <string.h>
 
 #include "soc/system_reg.h"
+#include "soc/system_struct.h"
 #include "soc/hwcrypto_reg.h"
 #include "hal/hmac_types.h"
 
@@ -30,6 +32,33 @@
 extern "C" {
 #endif
 
+/**
+ * @brief Enable the bus clock for HMAC peripheral module
+ *
+ * @param true to enable the module, false to disable the module
+ */
+static inline void hmac_ll_enable_bus_clock(bool enable)
+{
+    SYSTEM.perip_clk_en1.reg_crypto_hmac_clk_en = enable;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define hmac_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; hmac_ll_enable_bus_clock(__VA_ARGS__)
+
+/**
+ * @brief Reset the HMAC peripheral module
+ */
+static inline void hmac_ll_reset_register(void)
+{
+    SYSTEM.perip_rst_en1.reg_crypto_hmac_rst = 1;
+    SYSTEM.perip_rst_en1.reg_crypto_hmac_rst = 0;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define hmac_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; hmac_ll_reset_register(__VA_ARGS__)
+
 /**
  * Makes the peripheral ready for use, after enabling it.
  */

components/hal/esp32c3/include/hal/mpi_ll.h

@@ -12,6 +12,7 @@
 #include "hal/mpi_types.h"
 #include "soc/hwcrypto_periph.h"
 #include "soc/system_reg.h"
+#include "soc/system_struct.h"
 #include "soc/mpi_periph.h"
 
 #ifdef __cplusplus
@@ -19,6 +20,36 @@ extern "C" {
 #endif
 
 
+/**
+ * @brief Enable the bus clock for MPI peripheral module
+ *
+ * @param enable true to enable the module, false to disable the module
+ */
+static inline void mpi_ll_enable_bus_clock(bool enable)
+{
+    SYSTEM.perip_clk_en1.reg_crypto_rsa_clk_en = enable;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define mpi_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; mpi_ll_enable_bus_clock(__VA_ARGS__)
+
+/**
+ * @brief Reset the MPI peripheral module
+ */
+static inline void mpi_ll_reset_register(void)
+{
+    SYSTEM.perip_rst_en1.reg_crypto_rsa_rst = 1;
+    SYSTEM.perip_rst_en1.reg_crypto_rsa_rst = 0;
+
+    // Clear reset on digital signature also, otherwise RSA is held in reset
+    SYSTEM.perip_rst_en1.reg_crypto_ds_rst = 0;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define mpi_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; mpi_ll_reset_register(__VA_ARGS__)
+
 static inline size_t mpi_ll_calculate_hardware_words(size_t words)
 {
     return words;

components/hal/esp32c6/include/hal/ds_ll.h

@@ -17,6 +17,7 @@
 
 #include "soc/hwcrypto_reg.h"
 #include "soc/soc_caps.h"
+#include "soc/pcr_struct.h"
 #include "hal/ds_types.h"
 
 
@@ -24,6 +25,25 @@
 extern "C" {
 #endif
 
+/**
+ * @brief Enable the bus clock for Digital Signature peripheral module
+ *
+ * @param true to enable the module, false to disable the module
+ */
+static inline void ds_ll_enable_bus_clock(bool enable)
+{
+    PCR.ds_conf.ds_clk_en = enable;
+}
+
+/**
+ * @brief Reset the Digital Signature peripheral module
+ */
+static inline void ds_ll_reset_register(void)
+{
+    PCR.ds_conf.ds_rst_en = 1;
+    PCR.ds_conf.ds_rst_en = 0;
+}
+
 static inline void ds_ll_start(void)
 {
     REG_WRITE(DS_SET_START_REG, 1);

components/hal/esp32c6/include/hal/ecc_ll.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -10,6 +10,7 @@
 #include "hal/assert.h"
 #include "hal/ecc_types.h"
 #include "soc/ecc_mult_reg.h"
+#include "soc/pcr_struct.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -21,6 +22,25 @@ typedef enum {
     ECC_PARAM_K,
 } ecc_ll_param_t;
 
+/**
+ * @brief Enable the bus clock for ECC peripheral module
+ *
+ * @param true to enable the module, false to disable the module
+ */
+static inline void ecc_ll_enable_bus_clock(bool enable)
+{
+    PCR.ecc_conf.ecc_clk_en = enable;
+}
+
+/**
+ * @brief Reset the ECC peripheral module
+ */
+static inline void ecc_ll_reset_register(void)
+{
+    PCR.ecc_conf.ecc_rst_en = 1;
+    PCR.ecc_conf.ecc_rst_en = 0;
+}
+
 static inline void ecc_ll_enable_interrupt(void)
 {
     REG_SET_FIELD(ECC_MULT_INT_ENA_REG, ECC_MULT_CALC_DONE_INT_ENA, 1);

components/hal/esp32c6/include/hal/hmac_ll.h

@@ -13,9 +13,11 @@
 #pragma once
 
 #include <string.h>
+#include <stdbool.h>
 
 #include "soc/system_reg.h"
 #include "soc/hwcrypto_reg.h"
+#include "soc/pcr_struct.h"
 #include "hal/hmac_types.h"
 
 #define SHA256_BLOCK_SZ 64
@@ -30,6 +32,25 @@
 extern "C" {
 #endif
 
+/**
+ * @brief Enable the bus clock for HMAC peripheral module
+ *
+ * @param true to enable the module, false to disable the module
+ */
+static inline void hmac_ll_enable_bus_clock(bool enable)
+{
+    PCR.hmac_conf.hmac_clk_en = enable;
+}
+
+/**
+ * @brief Reset the HMAC peripheral module
+ */
+static inline void hmac_ll_reset_register(void)
+{
+    PCR.hmac_conf.hmac_rst_en = 1;
+    PCR.hmac_conf.hmac_rst_en = 0;
+}
+
 /**
  * Makes the peripheral ready for use, after enabling it.
  */

components/hal/esp32c6/include/hal/mpi_ll.h

@@ -11,6 +11,7 @@
 #include "hal/assert.h"
 #include "hal/mpi_types.h"
 #include "soc/pcr_reg.h"
+#include "soc/pcr_struct.h"
 #include "soc/rsa_reg.h"
 #include "soc/mpi_periph.h"
 
@@ -19,6 +20,28 @@ extern "C" {
 #endif
 
 
+/**
+ * @brief Enable the bus clock for MPI peripheral module
+ *
+ * @param enable true to enable the module, false to disable the module
+ */
+static inline void mpi_ll_enable_bus_clock(bool enable)
+{
+    PCR.rsa_conf.rsa_clk_en = enable;
+}
+
+/**
+ * @brief Reset the MPI peripheral module
+ */
+static inline void mpi_ll_reset_register(void)
+{
+    PCR.rsa_conf.rsa_rst_en = 1;
+    PCR.rsa_conf.rsa_rst_en = 0;
+
+    // Clear reset on digital signature also, otherwise RSA is held in reset
+    PCR.ds_conf.ds_rst_en = 0;
+}
+
 static inline size_t mpi_ll_calculate_hardware_words(size_t words)
 {
     return words;

components/hal/esp32h2/include/hal/ds_ll.h

@@ -17,12 +17,32 @@
 
 #include "soc/hwcrypto_reg.h"
 #include "soc/soc_caps.h"
+#include "soc/pcr_struct.h"
 #include "hal/ds_types.h"
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+/**
+ * @brief Enable the bus clock for Digital Signature peripheral module
+ *
+ * @param true to enable the module, false to disable the module
+ */
+static inline void ds_ll_enable_bus_clock(bool enable)
+{
+    PCR.ds_conf.ds_clk_en = enable;
+}
+
+/**
+ * @brief Reset the Digital Signature peripheral module
+ */
+static inline void ds_ll_reset_register(void)
+{
+    PCR.ds_conf.ds_rst_en = 1;
+    PCR.ds_conf.ds_rst_en = 0;
+}
+
 static inline void ds_ll_start(void)
 {
     REG_WRITE(DS_SET_START_REG, 1);

components/hal/esp32h2/include/hal/ecc_ll.h

@@ -10,6 +10,7 @@
 #include "hal/assert.h"
 #include "hal/ecc_types.h"
 #include "soc/ecc_mult_reg.h"
+#include "soc/pcr_struct.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -24,6 +25,28 @@ typedef enum {
     ECC_PARAM_QZ,
 } ecc_ll_param_t;
 
+/**
+ * @brief Enable the bus clock for ECC peripheral module
+ *
+ * @param true to enable the module, false to disable the module
+ */
+static inline void ecc_ll_enable_bus_clock(bool enable)
+{
+    PCR.ecc_conf.ecc_clk_en = enable;
+}
+
+/**
+ * @brief Reset the ECC peripheral module
+ */
+static inline void ecc_ll_reset_register(void)
+{
+    PCR.ecc_conf.ecc_rst_en = 1;
+    PCR.ecc_conf.ecc_rst_en = 0;
+
+    // Clear reset on ECDSA, otherwise ECC is held in reset
+    PCR.ecdsa_conf.ecdsa_rst_en = 0;
+}
+
 static inline void ecc_ll_enable_interrupt(void)
 {
     REG_SET_FIELD(ECC_MULT_INT_ENA_REG, ECC_MULT_CALC_DONE_INT_ENA, 1);

components/hal/esp32h2/include/hal/ecdsa_ll.h

@@ -9,6 +9,7 @@
 #include <string.h>
 #include "hal/assert.h"
 #include "soc/ecdsa_reg.h"
+#include "soc/pcr_struct.h"
 #include "hal/ecdsa_types.h"
 
 #ifdef __cplusplus
@@ -70,6 +71,25 @@ typedef enum {
     ECDSA_MODE_SHA_CONTINUE
 } ecdsa_ll_sha_mode_t;
 
+/**
+ * @brief Enable the bus clock for ECDSA peripheral module
+ *
+ * @param true to enable the module, false to disable the module
+ */
+static inline void ecdsa_ll_enable_bus_clock(bool enable)
+{
+    PCR.ecdsa_conf.ecdsa_clk_en = enable;
+}
+
+/**
+ * @brief Reset the ECDSA peripheral module
+ */
+static inline void ecdsa_ll_reset_register(void)
+{
+    PCR.ecdsa_conf.ecdsa_rst_en = 1;
+    PCR.ecdsa_conf.ecdsa_rst_en = 0;
+}
+
 /**
  * @brief Enable interrupt of a given type
  *

components/hal/esp32h2/include/hal/hmac_ll.h

@@ -13,9 +13,11 @@
 #pragma once
 
 #include <string.h>
+#include <stdbool.h>
 
 #include "soc/system_reg.h"
 #include "soc/hwcrypto_reg.h"
+#include "soc/pcr_struct.h"
 #include "hal/hmac_types.h"
 
 #define SHA256_BLOCK_SZ 64
@@ -30,6 +32,25 @@
 extern "C" {
 #endif
 
+/**
+ * @brief Enable the bus clock for HMAC peripheral module
+ *
+ * @param true to enable the module, false to disable the module
+ */
+static inline void hmac_ll_enable_bus_clock(bool enable)
+{
+    PCR.hmac_conf.hmac_clk_en = enable;
+}
+
+/**
+ * @brief Reset the HMAC peripheral module
+ */
+static inline void hmac_ll_reset_register(void)
+{
+    PCR.hmac_conf.hmac_rst_en = 1;
+    PCR.hmac_conf.hmac_rst_en = 0;
+}
+
 /**
  * Makes the peripheral ready for use, after enabling it.
  */

components/hal/esp32h2/include/hal/mpi_ll.h

@@ -11,6 +11,7 @@
 #include "hal/assert.h"
 #include "hal/mpi_types.h"
 #include "soc/pcr_reg.h"
+#include "soc/pcr_struct.h"
 #include "soc/rsa_reg.h"
 #include "soc/mpi_periph.h"
 
@@ -19,6 +20,29 @@ extern "C" {
 #endif
 
 
+/**
+ * @brief Enable the bus clock for MPI peripheral module
+ *
+ * @param enable true to enable the module, false to disable the module
+ */
+static inline void mpi_ll_enable_bus_clock(bool enable)
+{
+    PCR.rsa_conf.rsa_clk_en = enable;
+}
+
+/**
+ * @brief Reset the MPI peripheral module
+ */
+static inline void mpi_ll_reset_register(void)
+{
+    PCR.rsa_conf.rsa_rst_en = 1;
+    PCR.rsa_conf.rsa_rst_en = 0;
+
+    // Clear reset on digital signature also, otherwise RSA is held in reset
+    PCR.ds_conf.ds_rst_en = 0;
+    PCR.ecdsa_conf.ecdsa_rst_en = 0;
+}
+
 static inline size_t mpi_ll_calculate_hardware_words(size_t words)
 {
     return words;

components/hal/esp32p4/include/hal/ds_ll.h

@@ -16,6 +16,7 @@
 #include <string.h>
 
 #include "soc/hwcrypto_reg.h"
+#include "soc/hp_sys_clkrst_struct.h"
 #include "soc/soc_caps.h"
 #include "hal/ds_types.h"
 
@@ -24,6 +25,35 @@
 extern "C" {
 #endif
 
+/**
+ * @brief Enable the bus clock for DS peripheral module
+ *
+ * @param true to enable the module, false to disable the module
+ */
+static inline void ds_ll_enable_bus_clock(bool enable)
+{
+    HP_SYS_CLKRST.peri_clk_ctrl25.reg_crypto_ds_clk_en = enable;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define ds_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; ds_ll_enable_bus_clock(__VA_ARGS__)
+
+/**
+ * @brief Reset the DS peripheral module
+ */
+static inline void ds_ll_reset_register(void)
+{
+    HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_ds = 1;
+    HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_ds = 0;
+    HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_crypto = 1;
+    HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_crypto = 0;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define ds_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; ds_ll_reset_register(__VA_ARGS__)
+
 static inline void ds_ll_start(void)
 {
     REG_WRITE(DS_SET_START_REG, 1);

components/hal/esp32p4/include/hal/ecc_ll.h

@@ -10,6 +10,7 @@
 #include "hal/assert.h"
 #include "hal/ecc_types.h"
 #include "soc/ecc_mult_reg.h"
+#include "soc/hp_sys_clkrst_struct.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -24,6 +25,38 @@ typedef enum {
     ECC_PARAM_QZ,
 } ecc_ll_param_t;
 
+/**
+ * @brief Enable the bus clock for ECC peripheral module
+ *
+ * @param true to enable the module, false to disable the module
+ */
+static inline void ecc_ll_enable_bus_clock(bool enable)
+{
+    HP_SYS_CLKRST.peri_clk_ctrl25.reg_crypto_ecc_clk_en = enable;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define ecc_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; ecc_ll_enable_bus_clock(__VA_ARGS__)
+
+/**
+ * @brief Reset the ECC peripheral module
+ */
+static inline void ecc_ll_reset_register(void)
+{
+    HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_ecc = 1;
+    HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_ecc = 0;
+    HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_crypto = 1;
+    HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_crypto = 0;
+
+    // Clear reset on ECDSA, otherwise ECC is held in reset
+    HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_ecdsa = 0;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define ecc_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; ecc_ll_reset_register(__VA_ARGS__)
+
 static inline void ecc_ll_enable_interrupt(void)
 {
     REG_SET_FIELD(ECC_MULT_INT_ENA_REG, ECC_MULT_CALC_DONE_INT_ENA, 1);

components/hal/esp32p4/include/hal/ecdsa_ll.h

@@ -9,6 +9,7 @@
 #include <string.h>
 #include "hal/assert.h"
 #include "soc/ecdsa_reg.h"
+#include "soc/hp_sys_clkrst_struct.h"
 #include "hal/ecdsa_types.h"
 
 #ifdef __cplusplus
@@ -70,6 +71,31 @@ typedef enum {
     ECDSA_MODE_SHA_CONTINUE
 } ecdsa_ll_sha_mode_t;
 
+/**
+ * @brief Enable the bus clock for ECDSA peripheral module
+ *
+ * @param true to enable the module, false to disable the module
+ */
+static inline void ecdsa_ll_enable_bus_clock(bool enable)
+{
+    HP_SYS_CLKRST.peri_clk_ctrl25.reg_crypto_ecdsa_clk_en = enable;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define ecdsa_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; ecdsa_ll_enable_bus_clock(__VA_ARGS__)
+
+/**
+ * @brief Reset the ECDSA peripheral module
+ */
+static inline void ecdsa_ll_reset_register(void)
+{
+    HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_ecdsa = 1;
+    HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_ecdsa = 0;
+    HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_crypto = 1;
+    HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_crypto = 0;
+}
+
 /**
  * @brief Enable interrupt of a given type
  *

components/hal/esp32p4/include/hal/hmac_ll.h

@@ -13,9 +13,11 @@
 #pragma once
 
 #include <string.h>
+#include <stdbool.h>
 
 #include "soc/system_reg.h"
 #include "soc/hwcrypto_reg.h"
+#include "soc/hp_sys_clkrst_struct.h"
 #include "hal/hmac_hal.h"
 
 #define SHA256_BLOCK_SZ 64
@@ -30,6 +32,35 @@
 extern "C" {
 #endif
 
+/**
+ * @brief Enable the bus clock for HMAC peripheral module
+ *
+ * @param true to enable the module, false to disable the module
+ */
+static inline void hmac_ll_enable_bus_clock(bool enable)
+{
+    HP_SYS_CLKRST.peri_clk_ctrl25.reg_crypto_hmac_clk_en = enable;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define hmac_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; hmac_ll_enable_bus_clock(__VA_ARGS__)
+
+/**
+ * @brief Reset the HMAC peripheral module
+ */
+static inline void hmac_ll_reset_register(void)
+{
+    HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_hmac = 1;
+    HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_hmac = 0;
+    HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_crypto = 1;
+    HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_crypto = 0;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define hmac_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; hmac_ll_reset_register(__VA_ARGS__)
+
 /**
  * Makes the peripheral ready for use, after enabling it.
  */

components/hal/esp32p4/include/hal/mpi_ll.h

@@ -10,13 +10,46 @@
 #include <sys/param.h>
 #include "hal/assert.h"
 #include "hal/mpi_types.h"
-#include "soc/rsa_reg.h"
+#include "soc/hp_sys_clkrst_struct.h"
 #include "soc/mpi_periph.h"
+#include "soc/rsa_reg.h"
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+/**
+ * @brief Enable the bus clock for MPI peripheral module
+ *
+ * @param enable true to enable the module, false to disable the module
+ */
+static inline void mpi_ll_enable_bus_clock(bool enable)
+{
+    HP_SYS_CLKRST.peri_clk_ctrl25.reg_crypto_rsa_clk_en = enable;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define mpi_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; mpi_ll_enable_bus_clock(__VA_ARGS__)
+
+/**
+ * @brief Reset the MPI peripheral module
+ */
+static inline void mpi_ll_reset_register(void)
+{
+    HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_rsa = 1;
+    HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_rsa = 0;
+    HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_crypto = 1;
+    HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_crypto = 0;
+
+    // Clear reset on digital signature and ECDSA, otherwise RSA is held in reset
+    HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_ds = 0;
+    HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_ecdsa = 0;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define mpi_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; mpi_ll_reset_register(__VA_ARGS__)
 
 static inline size_t mpi_ll_calculate_hardware_words(size_t words)
 {

components/hal/esp32s2/include/hal/mpi_ll.h

@@ -19,6 +19,40 @@ extern "C" {
 #endif
 
 
+/**
+ * @brief Enable the bus clock for MPI peripheral module
+ *
+ * @param enable true to enable the module, false to disable the module
+ */
+static inline void mpi_ll_enable_bus_clock(bool enable)
+{
+    if (enable) {
+        SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN1_REG, DPORT_CRYPTO_RSA_CLK_EN);
+    } else {
+        CLEAR_PERI_REG_MASK(DPORT_PERIP_CLK_EN1_REG, DPORT_CRYPTO_RSA_CLK_EN);
+    }
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define mpi_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; mpi_ll_enable_bus_clock(__VA_ARGS__)
+
+/**
+ * @brief Reset the MPI peripheral module
+ */
+static inline void mpi_ll_reset_register(void)
+{
+    SET_PERI_REG_MASK(DPORT_PERIP_RST_EN1_REG, DPORT_CRYPTO_RSA_RST);
+    CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN1_REG, DPORT_CRYPTO_RSA_RST);
+
+    // Clear reset on digital signature also, otherwise RSA is held in reset
+    CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN1_REG, DPORT_CRYPTO_DS_RST);
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define mpi_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; mpi_ll_reset_register(__VA_ARGS__)
+
 static inline size_t mpi_ll_calculate_hardware_words(size_t words)
 {
     return words;

components/hal/esp32s3/include/hal/ds_ll.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -12,12 +12,40 @@
 
 #include "soc/hwcrypto_reg.h"
 #include "soc/soc_caps.h"
+#include "soc/system_struct.h"
 #include "hal/ds_types.h"
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+/**
+ * @brief Enable the bus clock for Digital Signature peripheral module
+ *
+ * @param true to enable the module, false to disable the module
+ */
+static inline void ds_ll_enable_bus_clock(bool enable)
+{
+    SYSTEM.perip_clk_en1.crypto_ds_clk_en = enable;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define ds_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; ds_ll_enable_bus_clock(__VA_ARGS__)
+
+/**
+ * @brief Reset the Digital Signature peripheral module
+ */
+static inline void ds_ll_reset_register(void)
+{
+    SYSTEM.perip_rst_en1.crypto_ds_rst = 1;
+    SYSTEM.perip_rst_en1.crypto_ds_rst = 0;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define ds_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; ds_ll_reset_register(__VA_ARGS__)
+
 static inline void ds_ll_start(void)
 {
     REG_WRITE(DS_SET_START_REG, 1);

components/hal/esp32s3/include/hal/hmac_ll.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -13,7 +13,10 @@
 #pragma once
 
 #include <stddef.h> /* For size_t type */
+#include <stdbool.h>
+
 #include "soc/hwcrypto_reg.h"
+#include "soc/system_struct.h"
 #include "hal/hmac_types.h"
 
 #define SHA256_BLOCK_SZ 64
@@ -28,6 +31,33 @@
 extern "C" {
 #endif
 
+/**
+ * @brief Enable the bus clock for HMAC peripheral module
+ *
+ * @param true to enable the module, false to disable the module
+ */
+static inline void hmac_ll_enable_bus_clock(bool enable)
+{
+    SYSTEM.perip_clk_en1.crypto_hmac_clk_en = enable;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define hmac_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; hmac_ll_enable_bus_clock(__VA_ARGS__)
+
+/**
+ * @brief Reset the HMAC peripheral module
+ */
+static inline void hmac_ll_reset_register(void)
+{
+    SYSTEM.perip_rst_en1.crypto_hmac_rst = 1;
+    SYSTEM.perip_rst_en1.crypto_hmac_rst = 0;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define hmac_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; hmac_ll_reset_register(__VA_ARGS__)
+
 /**
  * Makes the peripheral ready for use, after enabling it.
  */

components/hal/esp32s3/include/hal/mpi_ll.h

@@ -13,12 +13,43 @@
 #include "soc/hwcrypto_periph.h"
 #include "soc/dport_reg.h"
 #include "soc/mpi_periph.h"
+#include "soc/system_struct.h"
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
 
+/**
+ * @brief Enable the bus clock for MPI peripheral module
+ *
+ * @param enable true to enable the module, false to disable the module
+ */
+static inline void mpi_ll_enable_bus_clock(bool enable)
+{
+    SYSTEM.perip_clk_en1.crypto_rsa_clk_en = enable;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define mpi_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; mpi_ll_enable_bus_clock(__VA_ARGS__)
+
+/**
+ * @brief Reset the MPI peripheral module
+ */
+static inline void mpi_ll_reset_register(void)
+{
+    SYSTEM.perip_rst_en1.crypto_rsa_rst = 1;
+    SYSTEM.perip_rst_en1.crypto_rsa_rst = 0;
+
+    // Clear reset on digital signature also, otherwise RSA is held in reset
+    SYSTEM.perip_rst_en1.crypto_ds_rst = 0;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define mpi_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; mpi_ll_reset_register(__VA_ARGS__)
+
 static inline size_t mpi_ll_calculate_hardware_words(size_t words)
 {
     return words;

components/hal/test_apps/crypto/main/ds/test_ds.c

@@ -7,6 +7,7 @@
 #include <string.h>
 #include <assert.h>
 
+#include "esp_private/esp_crypto_lock_internal.h"
 #include "memory_checks.h"
 #include "unity_fixture.h"
 
@@ -127,22 +128,39 @@ _Static_assert(NUM_RESULTS == NUM_MESSAGES, "expected_results size should be the
 #include "hal/ds_hal.h"
 #include "hal/ds_ll.h"
 #include "hal/hmac_hal.h"
+#include "hal/hmac_ll.h"
 
 
 static void ds_acquire_enable(void)
 {
-    periph_module_enable(PERIPH_HMAC_MODULE);
+    HMAC_RCC_ATOMIC() {
+        hmac_ll_enable_bus_clock(true);
+        hmac_ll_reset_register();
+    }
+
     periph_module_enable(PERIPH_SHA_MODULE);
-    periph_module_enable(PERIPH_DS_MODULE);
+
+    DS_RCC_ATOMIC() {
+        ds_ll_enable_bus_clock(true);
+        ds_ll_reset_register();
+    }
+
     hmac_hal_start();
 }
 
 static void ds_disable_release(void)
 {
     ds_hal_finish();
-    periph_module_disable(PERIPH_DS_MODULE);
+
+    DS_RCC_ATOMIC() {
+        ds_ll_enable_bus_clock(false);
+    }
+
     periph_module_disable(PERIPH_SHA_MODULE);
-    periph_module_disable(PERIPH_HMAC_MODULE);
+
+    HMAC_RCC_ATOMIC() {
+        hmac_ll_enable_bus_clock(false);
+    }
 }
 
 
@@ -222,10 +240,7 @@ static esp_err_t esp_ds_encrypt_params(esp_ds_data_t *data,
     esp_err_t result = ESP_OK;
 
     periph_module_enable(PERIPH_AES_MODULE);
-    periph_module_enable(PERIPH_DS_MODULE);
     periph_module_enable(PERIPH_SHA_MODULE);
-    periph_module_enable(PERIPH_HMAC_MODULE);
-    periph_module_enable(PERIPH_RSA_MODULE);
 
     ets_ds_data_t *ds_data = (ets_ds_data_t *) data;
     const ets_ds_p_data_t *ds_plain_data = (const ets_ds_p_data_t *) p_data;
@@ -236,10 +251,7 @@ static esp_err_t esp_ds_encrypt_params(esp_ds_data_t *data,
         result = ESP_ERR_INVALID_ARG;
     }
 
-    periph_module_disable(PERIPH_RSA_MODULE);
-    periph_module_disable(PERIPH_HMAC_MODULE);
     periph_module_disable(PERIPH_SHA_MODULE);
-    periph_module_disable(PERIPH_DS_MODULE);
     periph_module_disable(PERIPH_AES_MODULE);
 
     return result;

components/hal/test_apps/crypto/main/ecc/test_ecc.c

@@ -8,11 +8,12 @@
 #include <stdbool.h>
 #include <string.h>
 #include "sdkconfig.h"
+#include "esp_private/esp_crypto_lock_internal.h"
 #include "esp_log.h"
 #include "ecc_params.h"
 #include "soc/soc_caps.h"
 #include "hal/ecc_hal.h"
-#include "hal/clk_gate_ll.h"
+#include "hal/ecc_ll.h"
 
 #include "memory_checks.h"
 #include "unity_fixture.h"
@@ -43,7 +44,17 @@ static void ecc_be_to_le(const uint8_t* be_point, uint8_t *le_point, uint8_t len
 
 static void ecc_enable_and_reset(void)
 {
-    periph_ll_enable_clk_clear_rst(PERIPH_ECC_MODULE);
+    ECC_RCC_ATOMIC() {
+        ecc_ll_enable_bus_clock(true);
+        ecc_ll_reset_register();
+    }
+}
+
+static void ecc_disable(void)
+{
+    ECC_RCC_ATOMIC() {
+        ecc_ll_enable_bus_clock(false);
+    }
 }
 
 
@@ -80,6 +91,7 @@ static void ecc_point_mul(const uint8_t *k_le, const uint8_t *x_le, const uint8_
     }
 
     ecc_hal_read_mul_result(res_x_le, res_y_le, len);
+    ecc_disable();
 }
 
 static void test_ecc_point_mul_inner(bool verify_first)
@@ -161,7 +173,10 @@ static int ecc_point_verify(const uint8_t *x_le, const uint8_t *y_le, uint8_t le
         ;
     }
 
-   return ecc_hal_read_verify_result();
+    int ret = ecc_hal_read_verify_result();
+    ecc_disable();
+
+    return ret;
 }
 
 TEST(ecc, ecc_point_verification_on_SECP192R1_and_SECP256R1)
@@ -222,6 +237,7 @@ static void ecc_point_inv_mul(const uint8_t *num_le, const uint8_t *deno_le, uin
     }
 
     ecc_hal_read_mul_result(zero, res_le, len);
+    ecc_disable();
 }
 
 TEST(ecc, ecc_inverse_multiplication_or_mod_division_using_SECP192R1_and_SECP256R1_order_of_curve)
@@ -254,6 +270,7 @@ static void ecc_jacob_mul(uint8_t *k_le, uint8_t *x_le, uint8_t *y_le, uint8_t l
     }
 
     ecc_hal_read_jacob_mul_result(res_x_le, res_y_le, res_z_le, len);
+    ecc_disable();
 }
 
 static void test_ecc_jacob_mul_inner(bool verify_first)
@@ -314,7 +331,10 @@ static int ecc_jacob_verify(const uint8_t *x_le, const uint8_t *y_le, const uint
         ;
     }
 
-   return ecc_hal_read_verify_result();
+    int ret = ecc_hal_read_verify_result();
+    ecc_disable();
+
+    return ret;
 }
 
 TEST(ecc, ecc_jacobian_point_verification_on_SECP192R1_and_SECP256R1)
@@ -355,6 +375,7 @@ static void ecc_point_addition(uint8_t *px_le, uint8_t *py_le, uint8_t *qx_le, u
     }
 
     ecc_hal_read_point_add_result(x_res_le, y_res_le, z_res_le, len, jacob_output);
+    ecc_disable();
 }
 
 TEST(ecc, ecc_point_addition_on_SECP192R1_and_SECP256R1)
@@ -426,6 +447,7 @@ static void ecc_mod_op(ecc_mode_t mode, const uint8_t *a, const uint8_t *b, uint
     }
 
     ecc_hal_read_mod_op_result(res_le, len);
+    ecc_disable();
 }
 #endif
 

components/hal/test_apps/crypto/main/ecdsa/test_ecdsa.c

@@ -8,10 +8,11 @@
 #include <stdbool.h>
 #include <string.h>
 
-#include "esp_private/periph_ctrl.h"
+#include "esp_private/esp_crypto_lock_internal.h"
 #include "esp_random.h"
 #include "hal/clk_gate_ll.h"
 #include "hal/ecdsa_hal.h"
+#include "hal/ecdsa_ll.h"
 #include "hal/ecdsa_types.h"
 
 #include "memory_checks.h"
@@ -19,15 +20,19 @@
 
 #include "ecdsa_params.h"
 
-
 static void ecdsa_enable_and_reset(void)
 {
-    periph_ll_enable_clk_clear_rst(PERIPH_ECDSA_MODULE);
+    ECDSA_RCC_ATOMIC() {
+        ecdsa_ll_enable_bus_clock(true);
+        ecdsa_ll_reset_register();
+    }
 }
 
-static void ecdsa_disable_and_reset(void)
+static void ecdsa_disable(void)
 {
-    periph_ll_disable_clk_set_rst(PERIPH_ECDSA_MODULE);
+    ECDSA_RCC_ATOMIC() {
+        ecdsa_ll_enable_bus_clock(false);
+    }
 }
 
 static void ecc_be_to_le(const uint8_t* be_point, uint8_t *le_point, uint8_t len)
@@ -62,7 +67,7 @@ static int test_ecdsa_verify(bool is_p256, uint8_t* sha, uint8_t* r_le, uint8_t*
 
     ecdsa_enable_and_reset();
     int ret = ecdsa_hal_verify_signature(&conf, sha_le, r_le, s_le, pub_x, pub_y, len);
-    ecdsa_disable_and_reset();
+    ecdsa_disable();
     return ret;
 }
 
@@ -142,7 +147,7 @@ static void test_ecdsa_sign(bool is_p256, uint8_t* sha, uint8_t* r_le, uint8_t*
         ecdsa_hal_gen_signature(&conf, NULL, sha_le, r_le, s_le, len);
     } while(!memcmp(r_le, zeroes, len) || !memcmp(s_le, zeroes, len));
 
-    ecdsa_disable_and_reset();
+    ecdsa_disable();
 }
 
 static void test_ecdsa_sign_and_verify(bool is_p256, uint8_t* sha, uint8_t* pub_x, uint8_t* pub_y, bool use_km_key)
@@ -191,7 +196,7 @@ static void test_ecdsa_export_pubkey(bool is_p256, bool use_km_key)
         TEST_ASSERT_EQUAL_HEX8_ARRAY(ecdsa192_pub_y, pub_y, len);
     }
 
-    ecdsa_disable_and_reset();
+    ecdsa_disable();
 }
 #endif /* SOC_ECDSA_SUPPORT_EXPORT_PUBKEY */
 

components/hal/test_apps/crypto/main/hmac/test_hmac.c

@@ -5,6 +5,7 @@
  */
 
 #include <string.h>
+#include "esp_private/esp_crypto_lock_internal.h"
 #include "esp_log.h"
 #include "memory_checks.h"
 #include "unity_fixture.h"
@@ -39,6 +40,8 @@ static esp_err_t hmac_jtag_disable(void)
 #if !CONFIG_IDF_TARGET_ESP32S2
 
 #include "hal/hmac_hal.h"
+#include "hal/hmac_ll.h"
+#include "hal/ds_ll.h"
 #include "esp_private/periph_ctrl.h"
 
 #define SHA256_BLOCK_SZ 64
@@ -70,9 +73,17 @@ static esp_err_t hmac_calculate(hmac_key_id_t key_id, const void *message, size_
 {
     const uint8_t *message_bytes = (const uint8_t *)message;
 
-    periph_module_enable(PERIPH_HMAC_MODULE);
+    HMAC_RCC_ATOMIC() {
+        hmac_ll_enable_bus_clock(true);
+        hmac_ll_reset_register();
+    }
+
     periph_module_enable(PERIPH_SHA_MODULE);
-    periph_module_enable(PERIPH_DS_MODULE);
+
+    DS_RCC_ATOMIC() {
+        ds_ll_enable_bus_clock(true);
+        ds_ll_reset_register();
+    }
 
     hmac_hal_start();
 
@@ -124,9 +135,15 @@ static esp_err_t hmac_calculate(hmac_key_id_t key_id, const void *message, size_
 
     hmac_hal_read_result_256(hmac);
 
-    periph_module_disable(PERIPH_DS_MODULE);
+    DS_RCC_ATOMIC() {
+        ds_ll_enable_bus_clock(false);
+    }
+
     periph_module_disable(PERIPH_SHA_MODULE);
-    periph_module_disable(PERIPH_HMAC_MODULE);
+
+    HMAC_RCC_ATOMIC() {
+        hmac_ll_enable_bus_clock(false);
+    }
 
     return ESP_OK;
 }

components/hal/test_apps/crypto/main/mpi/test_mpi.c

@@ -6,8 +6,8 @@
 #include <stdio.h>
 #include <string.h>
 
+#include "esp_private/esp_crypto_lock_internal.h"
 #include "esp_log.h"
-#include "esp_private/periph_ctrl.h"
 #include "esp_heap_caps.h"
 #include "memory_checks.h"
 #include "unity_fixture.h"
@@ -17,15 +17,18 @@
 #endif
 
 #include "hal/mpi_hal.h"
+#include "hal/mpi_ll.h"
 #include "mpi_params.h"
 
 #define _DEBUG_ 0
 
-
 static void esp_mpi_enable_hardware_hw_op( void )
 {
     /* Enable RSA hardware */
-    periph_module_enable(PERIPH_RSA_MODULE);
+    MPI_RCC_ATOMIC() {
+        mpi_ll_enable_bus_clock(true);
+        mpi_ll_reset_register();
+    }
 
     mpi_hal_enable_hardware_hw_op();
 }
@@ -36,7 +39,9 @@ static void esp_mpi_disable_hardware_hw_op( void )
     mpi_hal_disable_hardware_hw_op();
 
     /* Disable RSA hardware */
-    periph_module_disable(PERIPH_RSA_MODULE);
+    MPI_RCC_ATOMIC() {
+        mpi_ll_enable_bus_clock(false);
+    }
 }
 
 

components/mbedtls/port/bignum/bignum_alt.c

@@ -4,19 +4,22 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 #include "esp_crypto_lock.h"
-#include "esp_private/periph_ctrl.h"
 #include "bignum_impl.h"
 #include "mbedtls/bignum.h"
+#include "esp_private/esp_crypto_lock_internal.h"
 
 #include "hal/mpi_hal.h"
-
+#include "hal/mpi_ll.h"
 
 void esp_mpi_enable_hardware_hw_op( void )
 {
     esp_crypto_mpi_lock_acquire();
 
     /* Enable RSA hardware */
-    periph_module_enable(PERIPH_RSA_MODULE);
+    MPI_RCC_ATOMIC() {
+        mpi_ll_enable_bus_clock(true);
+        mpi_ll_reset_register();
+    }
 
     mpi_hal_enable_hardware_hw_op();
 }
@@ -27,7 +30,9 @@ void esp_mpi_disable_hardware_hw_op( void )
     mpi_hal_disable_hardware_hw_op();
 
     /* Disable RSA hardware */
-    periph_module_disable(PERIPH_RSA_MODULE);
+    MPI_RCC_ATOMIC() {
+        mpi_ll_enable_bus_clock(false);
+    }
 
     esp_crypto_mpi_lock_release();
 }

components/mbedtls/port/ecc/esp_ecc.c

@@ -8,20 +8,26 @@
 #include <stdio.h>
 
 #include "esp_crypto_lock.h"
-#include "esp_private/periph_ctrl.h"
+#include "esp_private/esp_crypto_lock_internal.h"
 #include "ecc_impl.h"
 #include "hal/ecc_hal.h"
+#include "hal/ecc_ll.h"
 
 static void esp_ecc_acquire_hardware(void)
 {
     esp_crypto_ecc_lock_acquire();
 
-    periph_module_enable(PERIPH_ECC_MODULE);
+    ECC_RCC_ATOMIC() {
+        ecc_ll_enable_bus_clock(true);
+        ecc_ll_reset_register();
+    }
 }
 
 static void esp_ecc_release_hardware(void)
 {
-    periph_module_disable(PERIPH_ECC_MODULE);
+    ECC_RCC_ATOMIC() {
+        ecc_ll_enable_bus_clock(false);
+    }
 
     esp_crypto_ecc_lock_release();
 }

components/mbedtls/port/ecdsa/ecdsa_alt.c

@@ -4,14 +4,15 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 #include <string.h>
+#include "hal/ecdsa_ll.h"
 #include "hal/ecdsa_hal.h"
 #include "esp_crypto_lock.h"
 #include "esp_efuse.h"
+#include "esp_private/esp_crypto_lock_internal.h"
 #include "mbedtls/error.h"
 #include "mbedtls/ecdsa.h"
 #include "mbedtls/asn1write.h"
 #include "mbedtls/platform_util.h"
-#include "esp_private/periph_ctrl.h"
 #include "ecdsa/ecdsa_alt.h"
 
 #define ECDSA_KEY_MAGIC             (short) 0xECD5A
@@ -24,12 +25,17 @@ static void esp_ecdsa_acquire_hardware(void)
 {
     esp_crypto_ecdsa_lock_acquire();
 
-    periph_module_enable(PERIPH_ECDSA_MODULE);
+    ECDSA_RCC_ATOMIC() {
+        ecdsa_ll_enable_bus_clock(true);
+        ecdsa_ll_reset_register();
+    }
 }
 
 static void esp_ecdsa_release_hardware(void)
 {
-    periph_module_disable(PERIPH_ECDSA_MODULE);
+    ECDSA_RCC_ATOMIC() {
+        ecdsa_ll_enable_bus_clock(false);
+    }
 
     esp_crypto_ecdsa_lock_release();
 }