feedc0de/esp-idf
1
0
Fork 0
forked from espressif/esp-idf
Code Pull Requests Activity

Merge branch 'fix/i2s_iram_safe_issue_while_use_psram' into 'master'

Browse Source 
fix(i2s): fixed failure when dma is iram_safe but i2s not

Closes IDFGH-14800

See merge request espressif/esp-idf!37670
This commit is contained in:
Kevin (Lao Kaiyao)
2025-03-20 14:31:45 +08:00
parent 991acde4f7 511a4a89ce
commit 87aa9ec5f0
2 changed files with 2 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
components/esp_driver_i2s/Kconfig
View File

@@ -3,6 +3,7 @@ menu "ESP-Driver:I2S Configurations"
config I2S_ISR_IRAM_SAFE config I2S_ISR_IRAM_SAFE
bool "I2S ISR IRAM-Safe" bool "I2S ISR IRAM-Safe"
default n default n
select GDMA_ISR_IRAM_SAFE if SOC_GDMA_SUPPORTED
help help
Ensure the I2S interrupt is IRAM-Safe by allowing the interrupt handler to be Ensure the I2S interrupt is IRAM-Safe by allowing the interrupt handler to be
executable when the cache is disabled (e.g. SPI Flash write). executable when the cache is disabled (e.g. SPI Flash write).

2
components/esp_driver_i2s/i2s_private.h
View File

@@ -40,7 +40,7 @@ extern "C" {
// If ISR handler is allowed to run whilst cache is disabled, // If ISR handler is allowed to run whilst cache is disabled,
// Make sure all the code and related variables used by the handler are in the SRAM // Make sure all the code and related variables used by the handler are in the SRAM
#if CONFIG_I2S_ISR_IRAM_SAFE #if CONFIG_I2S_ISR_IRAM_SAFE || CONFIG_GDMA_ISR_IRAM_SAFE
#define I2S_INTR_ALLOC_FLAGS (ESP_INTR_FLAG_IRAM | ESP_INTR_FLAG_INTRDISABLED | ESP_INTR_FLAG_SHARED) #define I2S_INTR_ALLOC_FLAGS (ESP_INTR_FLAG_IRAM | ESP_INTR_FLAG_INTRDISABLED | ESP_INTR_FLAG_SHARED)
#define I2S_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT) #define I2S_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
#else #else