From 891df4eff9b2d1c545b3270297bf2492ef63413b Mon Sep 17 00:00:00 2001 From: Mahavir Jain Date: Fri, 10 Mar 2023 10:08:24 +0530 Subject: [PATCH] Cleanup soc_memprot_types.h for C6/H2 This header is not required as there is no PMS peripheral in C6/H2 Closes IDF-6332 --- .../esp_private/esp_memprot_internal.h | 5 +- .../include/soc/esp32c6/soc_memprot_types.h | 175 ------------------ .../include/soc/esp32h2/soc_memprot_types.h | 24 --- components/soc/esp32c6/include/soc/soc_caps.h | 3 - .../esp32h2/include/soc/Kconfig.soc_caps.in | 8 - components/soc/esp32h2/include/soc/soc_caps.h | 6 - 6 files changed, 4 insertions(+), 217 deletions(-) delete mode 100644 components/esp_hw_support/include/soc/esp32c6/soc_memprot_types.h delete mode 100644 components/esp_hw_support/include/soc/esp32h2/soc_memprot_types.h diff --git a/components/esp_hw_support/include/esp_private/esp_memprot_internal.h b/components/esp_hw_support/include/esp_private/esp_memprot_internal.h index 8a000c1aa8..7240d7ee1c 100644 --- a/components/esp_hw_support/include/esp_private/esp_memprot_internal.h +++ b/components/esp_hw_support/include/esp_private/esp_memprot_internal.h @@ -11,8 +11,11 @@ #include "esp_err.h" #include "esp_memprot_err.h" #include "hal/memprot_types.h" -#include "soc_memprot_types.h" #include "esp_memprot_types.h" +#include "sdkconfig.h" +#if CONFIG_ESP_SYSTEM_MEMPROT_FEATURE +#include "soc_memprot_types.h" +#endif #ifdef __cplusplus extern "C" { diff --git a/components/esp_hw_support/include/soc/esp32c6/soc_memprot_types.h b/components/esp_hw_support/include/soc/esp32c6/soc_memprot_types.h deleted file mode 100644 index c45dc31dc9..0000000000 --- a/components/esp_hw_support/include/soc/esp32c6/soc_memprot_types.h +++ /dev/null @@ -1,175 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -////////////////////////////////////////////////////////// -// ESP32-C6 PMS memory protection types -// - -#pragma once - -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief Memory types recognized by PMS - */ -typedef enum { - MEMPROT_TYPE_NONE = 0x00000000, - MEMPROT_TYPE_IRAM0_SRAM = 0x00000001, - MEMPROT_TYPE_DRAM0_SRAM = 0x00000002, - MEMPROT_TYPE_IRAM0_RTCFAST = 0x00000004, - MEMPROT_TYPE_ALL = 0x7FFFFFFF, - MEMPROT_TYPE_INVALID = 0x80000000, - MEMPROT_TYPE_IRAM0_ANY = MEMPROT_TYPE_IRAM0_SRAM | MEMPROT_TYPE_IRAM0_RTCFAST -} esp_mprot_mem_t; - -/** - * @brief Splitting address (line) type - */ -typedef enum { - MEMPROT_SPLIT_ADDR_NONE = 0x00000000, - MEMPROT_SPLIT_ADDR_IRAM0_DRAM0 = 0x00000001, - MEMPROT_SPLIT_ADDR_IRAM0_LINE_0 = 0x00000002, - MEMPROT_SPLIT_ADDR_IRAM0_LINE_1 = 0x00000004, - MEMPROT_SPLIT_ADDR_DRAM0_DMA_LINE_0 = 0x00000008, - MEMPROT_SPLIT_ADDR_DRAM0_DMA_LINE_1 = 0x00000010, - MEMPROT_SPLIT_ADDR_ALL = 0x7FFFFFFF, - MEMPROT_SPLIT_ADDR_INVALID = 0x80000000, - MEMPROT_SPLIT_ADDR_MAIN = MEMPROT_SPLIT_ADDR_IRAM0_DRAM0 -} esp_mprot_split_addr_t; - -/** - * @brief PMS area type (memory space between adjacent splitting addresses or above/below the main splt.address) - */ -typedef enum { - MEMPROT_PMS_AREA_NONE = 0x00000000, - MEMPROT_PMS_AREA_IRAM0_0 = 0x00000001, - MEMPROT_PMS_AREA_IRAM0_1 = 0x00000002, - MEMPROT_PMS_AREA_IRAM0_2 = 0x00000004, - MEMPROT_PMS_AREA_IRAM0_3 = 0x00000008, - MEMPROT_PMS_AREA_DRAM0_0 = 0x00000010, - MEMPROT_PMS_AREA_DRAM0_1 = 0x00000020, - MEMPROT_PMS_AREA_DRAM0_2 = 0x00000040, - MEMPROT_PMS_AREA_DRAM0_3 = 0x00000080, - MEMPROT_PMS_AREA_IRAM0_RTCFAST_LO = 0x00000100, - MEMPROT_PMS_AREA_IRAM0_RTCFAST_HI = 0x00000200, - MEMPROT_PMS_AREA_ALL = 0x7FFFFFFF, - MEMPROT_PMS_AREA_INVALID = 0x80000000 -} esp_mprot_pms_area_t; - -/** -* @brief Memory protection configuration -*/ -typedef struct { - bool invoke_panic_handler; /*!< Register PMS violation interrupt for panic-handling */ - bool lock_feature; /*!< Lock all PMS settings */ - void *split_addr; /*!< Main I/D splitting address */ - uint32_t mem_type_mask; /*!< Memory types required to protect. See esp_mprot_mem_t enum */ -} esp_memp_config_t; - -#define ESP_MEMPROT_DEFAULT_CONFIG() { \ - .invoke_panic_handler = true, \ - .lock_feature = true, \ - .split_addr = NULL, \ - .mem_type_mask = MEMPROT_TYPE_ALL \ -} - -/** - * @brief Converts Memory protection type to string - * - * @param mem_type Memory protection type - */ -static inline const char *esp_mprot_mem_type_to_str(const esp_mprot_mem_t mem_type) -{ - switch (mem_type) { - case MEMPROT_TYPE_NONE: - return "NONE"; - case MEMPROT_TYPE_IRAM0_SRAM: - return "IRAM0_SRAM"; - case MEMPROT_TYPE_DRAM0_SRAM: - return "DRAM0_SRAM"; - case MEMPROT_TYPE_IRAM0_RTCFAST: - return "IRAM0_RTCFAST"; - case MEMPROT_TYPE_IRAM0_ANY: - return "IRAM0_ANY"; - case MEMPROT_TYPE_ALL: - return "ALL"; - default: - return "INVALID"; - } -} - -/** - * @brief Converts Splitting address type to string - * - * @param line_type Split line type - */ -static inline const char *esp_mprot_split_addr_to_str(const esp_mprot_split_addr_t line_type) -{ - switch (line_type) { - case MEMPROT_SPLIT_ADDR_NONE: - return "SPLIT_ADDR_NONE"; - case MEMPROT_SPLIT_ADDR_IRAM0_DRAM0: - return "SPLIT_ADDR_IRAM0_DRAM0"; - case MEMPROT_SPLIT_ADDR_IRAM0_LINE_0: - return "SPLIT_ADDR_IRAM0_LINE_0"; - case MEMPROT_SPLIT_ADDR_IRAM0_LINE_1: - return "SPLIT_ADDR_IRAM0_LINE_1"; - case MEMPROT_SPLIT_ADDR_DRAM0_DMA_LINE_0: - return "SPLIT_ADDR_DRAM0_DMA_LINE_0"; - case MEMPROT_SPLIT_ADDR_DRAM0_DMA_LINE_1: - return "SPLIT_ADDR_DRAM0_DMA_LINE_1"; - case MEMPROT_SPLIT_ADDR_ALL: - return "SPLIT_ADDR_ALL"; - default: - return "SPLIT_ADDR_INVALID"; - } -} - -/** - * @brief Converts PMS Area type to string - * - * @param area_type PMS Area type - */ -static inline const char *esp_mprot_pms_area_to_str(const esp_mprot_pms_area_t area_type) -{ - switch (area_type) { - case MEMPROT_PMS_AREA_NONE: - return "PMS_AREA_NONE"; - case MEMPROT_PMS_AREA_IRAM0_0: - return "PMS_AREA_IRAM0_0"; - case MEMPROT_PMS_AREA_IRAM0_1: - return "PMS_AREA_IRAM0_1"; - case MEMPROT_PMS_AREA_IRAM0_2: - return "PMS_AREA_IRAM0_2"; - case MEMPROT_PMS_AREA_IRAM0_3: - return "PMS_AREA_IRAM0_3"; - case MEMPROT_PMS_AREA_DRAM0_0: - return "PMS_AREA_DRAM0_0"; - case MEMPROT_PMS_AREA_DRAM0_1: - return "PMS_AREA_DRAM0_1"; - case MEMPROT_PMS_AREA_DRAM0_2: - return "PMS_AREA_DRAM0_2"; - case MEMPROT_PMS_AREA_DRAM0_3: - return "PMS_AREA_DRAM0_3"; - case MEMPROT_PMS_AREA_IRAM0_RTCFAST_LO: - return "PMS_AREA_IRAM0_RTCFAST_LO"; - case MEMPROT_PMS_AREA_IRAM0_RTCFAST_HI: - return "PMS_AREA_IRAM0_RTCFAST_HI"; - case MEMPROT_PMS_AREA_ALL: - return "PMS_AREA_ALL"; - default: - return "PMS_AREA_INVALID"; - } -} - -#ifdef __cplusplus -} -#endif diff --git a/components/esp_hw_support/include/soc/esp32h2/soc_memprot_types.h b/components/esp_hw_support/include/soc/esp32h2/soc_memprot_types.h deleted file mode 100644 index 885fb1ce82..0000000000 --- a/components/esp_hw_support/include/soc/esp32h2/soc_memprot_types.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -////////////////////////////////////////////////////////// -// ESP32-H2 PMS memory protection types -// - -#pragma once - -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -// ESP32H2-TODO: IDF-6332 - -#ifdef __cplusplus -} -#endif diff --git a/components/soc/esp32c6/include/soc/soc_caps.h b/components/soc/esp32c6/include/soc/soc_caps.h index ef0d583a8c..6f12018405 100644 --- a/components/soc/esp32c6/include/soc/soc_caps.h +++ b/components/soc/esp32c6/include/soc/soc_caps.h @@ -416,9 +416,6 @@ #define SOC_FLASH_ENCRYPTION_XTS_AES 1 #define SOC_FLASH_ENCRYPTION_XTS_AES_128 1 -/*-------------------------- MEMPROT CAPS ------------------------------------*/ - - /*-------------------------- UART CAPS ---------------------------------------*/ // ESP32-C6 has 2 UARTs #define SOC_UART_NUM (2) diff --git a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in index b565f90969..fb80504c82 100644 --- a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in @@ -991,14 +991,6 @@ config SOC_FLASH_ENCRYPTION_XTS_AES_128 bool default y -config SOC_MEMPROT_CPU_PREFETCH_PAD_SIZE - int - default 16 - -config SOC_MEMPROT_MEM_ALIGN_SIZE - int - default 512 - config SOC_UART_NUM int default 2 diff --git a/components/soc/esp32h2/include/soc/soc_caps.h b/components/soc/esp32h2/include/soc/soc_caps.h index deefa9d2a6..089f266636 100644 --- a/components/soc/esp32h2/include/soc/soc_caps.h +++ b/components/soc/esp32h2/include/soc/soc_caps.h @@ -234,7 +234,6 @@ #define SOC_LEDC_GAMMA_CURVE_FADE_RANGE_MAX (16) #define SOC_LEDC_FADE_PARAMS_BIT_WIDTH (10) -// TODO: IDF-6332 (Copy from esp32c6, need check) /*-------------------------- MPU CAPS ----------------------------------------*/ #define SOC_MPU_CONFIGURABLE_REGIONS_SUPPORTED 0 #define SOC_MPU_MIN_REGION_SIZE 0x20000000U @@ -418,11 +417,6 @@ #define SOC_FLASH_ENCRYPTION_XTS_AES 1 #define SOC_FLASH_ENCRYPTION_XTS_AES_128 1 -// TODO: IDF-6332 (Copy from esp32c6, need check) -/*-------------------------- MEMPROT CAPS ------------------------------------*/ -#define SOC_MEMPROT_CPU_PREFETCH_PAD_SIZE 16 -#define SOC_MEMPROT_MEM_ALIGN_SIZE 512 - /*-------------------------- UART CAPS ---------------------------------------*/ // ESP32-H2 has 2 UARTs #define SOC_UART_NUM (2)