test(uhci): enable the psram test in CI

This commit is contained in:
morris
2025-04-30 10:40:29 +08:00
parent 852466ea0e
commit 8af9bb624e
10 changed files with 27 additions and 12 deletions

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@ -16,6 +16,7 @@ menu "ESP-Driver:UHCI Configurations"
config UHCI_ISR_HANDLER_IN_IRAM config UHCI_ISR_HANDLER_IN_IRAM
bool "Place UHCI ISR function into IRAM" bool "Place UHCI ISR function into IRAM"
default n default n
select GDMA_CTRL_FUNC_IN_IRAM if SOC_GDMA_SUPPORTED
help help
If this option is not selected, UHCI interrupt will be disabled for a long time and If this option is not selected, UHCI interrupt will be disabled for a long time and
may cause data lost when doing spi flash operation. may cause data lost when doing spi flash operation.

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@ -18,13 +18,10 @@ entries:
uhci: uhci_gdma_tx_callback_eof (noflash) uhci: uhci_gdma_tx_callback_eof (noflash)
uhci: uhci_do_transmit (noflash) uhci: uhci_do_transmit (noflash)
[mapping:uhci_driver_gdma] [mapping:uhci_driver_gdma_link]
archive: libesp_hw_support.a archive: libesp_hw_support.a
entries: entries:
if UHCI_ISR_HANDLER_IN_IRAM = y: if UHCI_ISR_HANDLER_IN_IRAM = y:
gdma_link: gdma_link_count_buffer_size_till_eof (noflash) gdma_link: gdma_link_count_buffer_size_till_eof (noflash)
gdma_link: gdma_link_mount_buffers (noflash) gdma_link: gdma_link_mount_buffers (noflash)
gdma_link: gdma_link_get_head_addr (noflash) gdma_link: gdma_link_get_head_addr (noflash)
gdma: gdma_start (noflash)
gdma: gdma_stop (noflash)
gdma: gdma_reset (noflash)

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@ -539,7 +539,7 @@ esp_err_t uhci_register_event_callbacks(uhci_controller_handle_t uhci_ctrl, cons
{ {
ESP_RETURN_ON_FALSE(uhci_ctrl && cbs, ESP_ERR_INVALID_ARG, TAG, "invalid argument"); ESP_RETURN_ON_FALSE(uhci_ctrl && cbs, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
#if CONFIG_UHCI_ISR_CACHE_SAFE #if CONFIG_UHCI_ISR_HANDLER_IN_IRAM
if (cbs->on_rx_trans_event) { if (cbs->on_rx_trans_event) {
ESP_RETURN_ON_FALSE(esp_ptr_in_iram(cbs->on_rx_trans_event), ESP_ERR_INVALID_ARG, TAG, "on_rx_trans_event callback not in IRAM"); ESP_RETURN_ON_FALSE(esp_ptr_in_iram(cbs->on_rx_trans_event), ESP_ERR_INVALID_ARG, TAG, "on_rx_trans_event callback not in IRAM");
} }

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@ -32,6 +32,5 @@ components/esp_driver_uart/test_apps/uart_vfs:
components/esp_driver_uart/test_apps/uhci: components/esp_driver_uart/test_apps/uhci:
disable: disable:
- if: SOC_UHCI_SUPPORTED != 1 - if: SOC_UHCI_SUPPORTED != 1
- if: CONFIG_NAME == "psram" and SOC_AHB_GDMA_SUPPORT_PSRAM != 1
depends_components: depends_components:
- esp_driver_uart - esp_driver_uart

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@ -121,7 +121,7 @@ static void uhci_receive_test(void *arg)
uhci_controller_handle_t uhci_ctrl = ((uhci_controller_handle_t *)arg)[0]; uhci_controller_handle_t uhci_ctrl = ((uhci_controller_handle_t *)arg)[0];
SemaphoreHandle_t exit_sema = ((SemaphoreHandle_t *)arg)[1]; SemaphoreHandle_t exit_sema = ((SemaphoreHandle_t *)arg)[1];
uhci_context_t *ctx = calloc(1, sizeof(uhci_context_t)); uhci_context_t *ctx = heap_caps_calloc(1, sizeof(uhci_context_t), MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
assert(ctx); assert(ctx);
ctx->uhci_queue = xQueueCreate(15, sizeof(uhci_event_t)); ctx->uhci_queue = xQueueCreate(15, sizeof(uhci_event_t));
assert(ctx->uhci_queue); assert(ctx->uhci_queue);
@ -252,7 +252,7 @@ static void uhci_receive_test_in_psram(void *arg)
uhci_controller_handle_t uhci_ctrl = ((uhci_controller_handle_t *)arg)[0]; uhci_controller_handle_t uhci_ctrl = ((uhci_controller_handle_t *)arg)[0];
SemaphoreHandle_t exit_sema = ((SemaphoreHandle_t *)arg)[1]; SemaphoreHandle_t exit_sema = ((SemaphoreHandle_t *)arg)[1];
uhci_context_t *ctx = calloc(1, sizeof(uhci_context_t)); uhci_context_t *ctx = heap_caps_calloc(1, sizeof(uhci_context_t), MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
assert(ctx); assert(ctx);
ctx->uhci_queue = xQueueCreate(15, sizeof(uhci_event_t)); ctx->uhci_queue = xQueueCreate(15, sizeof(uhci_event_t));
assert(ctx->uhci_queue); assert(ctx->uhci_queue);

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@ -3,7 +3,6 @@
import pytest import pytest
from pytest_embedded import Dut from pytest_embedded import Dut
from pytest_embedded_idf.utils import idf_parametrize from pytest_embedded_idf.utils import idf_parametrize
from pytest_embedded_idf.utils import soc_filtered_targets
@pytest.mark.generic @pytest.mark.generic
@ -15,6 +14,20 @@ from pytest_embedded_idf.utils import soc_filtered_targets
], ],
indirect=True, indirect=True,
) )
@idf_parametrize('target', soc_filtered_targets('SOC_UHCI_SUPPORTED == 1'), indirect=['target']) @idf_parametrize('target', ['esp32c3', 'esp32c5', 'esp32c6', 'esp32h2', 'esp32p4'], indirect=['target'])
def test_uhci(dut: Dut) -> None: def test_uhci(dut: Dut) -> None:
dut.run_all_single_board_cases() dut.run_all_single_board_cases()
@pytest.mark.octal_psram
@pytest.mark.parametrize(
'config',
[
'cache_safe',
'release',
],
indirect=True,
)
@idf_parametrize('target', ['esp32s3'], indirect=['target'])
def test_uhci_psram_s3(dut: Dut) -> None:
dut.run_all_single_board_cases()

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@ -6,6 +6,5 @@ CONFIG_COMPILER_OPTIMIZATION_NONE=y
CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH=y CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH=y
# silent the error check, as the error string are stored in rodata, causing RTL check failure # silent the error check, as the error string are stored in rodata, causing RTL check failure
CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT=y CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT=y
CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y
CONFIG_HAL_ASSERTION_SILENT=y CONFIG_HAL_ASSERTION_SILENT=y
CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE=y CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE=y

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@ -1 +0,0 @@
CONFIG_SPIRAM=y

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@ -0,0 +1,3 @@
CONFIG_SPIRAM=y
CONFIG_SPIRAM_SPEED_40M=y
CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL=0

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@ -0,0 +1,4 @@
CONFIG_SPIRAM=y
CONFIG_SPIRAM_MODE_OCT=y
CONFIG_SPIRAM_SPEED_80M=y
CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL=0