soc esp32s2: Use constant for XTAL value

ESP32-S2 only supports a 40MHz crystal.

components/esp_hw_support/port/esp32s2/rtc_clk.c

@@ -305,7 +305,7 @@ bool rtc_clk_cpu_freq_mhz_to_config(uint32_t freq_mhz, rtc_cpu_freq_config_t* ou
     uint32_t divider;
     uint32_t real_freq_mhz;
 
-    uint32_t xtal_freq = (uint32_t) rtc_clk_xtal_freq_get();
+    uint32_t xtal_freq = RTC_XTAL_FREQ;
     if (freq_mhz <= xtal_freq) {
         divider = xtal_freq / freq_mhz;
         real_freq_mhz = (xtal_freq + divider / 2) / divider; /* round */
@@ -346,10 +346,9 @@ bool rtc_clk_cpu_freq_mhz_to_config(uint32_t freq_mhz, rtc_cpu_freq_config_t* ou
 
 void rtc_clk_cpu_freq_set_config(const rtc_cpu_freq_config_t* config)
 {
-    rtc_xtal_freq_t xtal_freq = rtc_clk_xtal_freq_get();
     uint32_t soc_clk_sel = REG_GET_FIELD(DPORT_SYSCLK_CONF_REG, DPORT_SOC_CLK_SEL);
     if (soc_clk_sel != DPORT_SOC_CLK_SEL_XTAL) {
-        rtc_clk_cpu_freq_to_xtal(xtal_freq, 1);
+        rtc_clk_cpu_freq_to_xtal(RTC_XTAL_FREQ, 1);
     }
     if (soc_clk_sel == DPORT_SOC_CLK_SEL_PLL && config->source_freq_mhz != s_cur_pll_freq) {
         rtc_clk_bbpll_disable();
@@ -360,7 +359,7 @@ void rtc_clk_cpu_freq_set_config(const rtc_cpu_freq_config_t* config)
         }
     } else if (config->source == RTC_CPU_FREQ_SRC_PLL) {
         rtc_clk_bbpll_enable();
-        rtc_clk_bbpll_configure(rtc_clk_xtal_freq_get(), config->source_freq_mhz);
+        rtc_clk_bbpll_configure(RTC_XTAL_FREQ, config->source_freq_mhz);
         rtc_clk_cpu_freq_to_pll_mhz(config->freq_mhz);
     } else if (config->source == RTC_CPU_FREQ_SRC_8M) {
         rtc_clk_cpu_freq_to_8m();
@@ -378,7 +377,7 @@ void rtc_clk_cpu_freq_get_config(rtc_cpu_freq_config_t* out_config)
         case DPORT_SOC_CLK_SEL_XTAL: {
             source = RTC_CPU_FREQ_SRC_XTAL;
             div = REG_GET_FIELD(DPORT_SYSCLK_CONF_REG, DPORT_PRE_DIV_CNT) + 1;
-            source_freq_mhz = (uint32_t) rtc_clk_xtal_freq_get();
+            source_freq_mhz = RTC_XTAL_FREQ;
             freq_mhz = source_freq_mhz / div;
         }
         break;
@@ -437,10 +436,8 @@ void rtc_clk_cpu_freq_set_config_fast(const rtc_cpu_freq_config_t* config)
 
 void rtc_clk_cpu_freq_set_xtal(void)
 {
-    int freq_mhz = (int) rtc_clk_xtal_freq_get();
-
-    rtc_clk_cpu_freq_to_xtal(freq_mhz, 1);
     /* BBPLL is kept enabled */
+    rtc_clk_cpu_freq_to_xtal(RTC_XTAL_FREQ, 1);
 }
 
 /**
@@ -475,17 +472,8 @@ static void rtc_clk_cpu_freq_to_8m(void)
 
 rtc_xtal_freq_t rtc_clk_xtal_freq_get(void)
 {
-    uint32_t xtal_freq_reg = READ_PERI_REG(RTC_XTAL_FREQ_REG);
+    // Note, inside esp32s2-only code it's better to use RTC_XTAL_FREQ constant
-    if (!clk_val_is_valid(xtal_freq_reg)) {
+    return RTC_XTAL_FREQ;
-        SOC_LOGW(TAG, "invalid RTC_XTAL_FREQ_REG value: 0x%08x", xtal_freq_reg);
-        return RTC_XTAL_FREQ_40M;
-    }
-    return reg_val_to_clk_val(xtal_freq_reg);
-}
-
-void rtc_clk_xtal_freq_update(rtc_xtal_freq_t xtal_freq)
-{
-    WRITE_PERI_REG(RTC_XTAL_FREQ_REG, clk_val_to_reg_val(xtal_freq));
 }
 
 void rtc_clk_apb_freq_update(uint32_t apb_freq)

components/esp_hw_support/port/esp32s2/rtc_clk_init.c

@@ -58,7 +58,6 @@ void rtc_clk_init(rtc_clk_config_t cfg)
 
     rtc_xtal_freq_t xtal_freq = cfg.xtal_freq;
     esp_rom_uart_tx_wait_idle(0);
-    rtc_clk_xtal_freq_update(xtal_freq);
     rtc_clk_apb_freq_update(xtal_freq * MHZ);
 
     /* Set CPU frequency */

components/soc/esp32s2/include/soc/rtc.h

@@ -143,6 +143,13 @@ typedef enum {
     RTC_XTAL_FREQ_40M = 40,     //!< 40 MHz XTAL
 } rtc_xtal_freq_t;
 
+/** @brief Fixed crystal frequency for this SoC
+
+    On an SoC where only one crystal frequency is supported,
+    using this macro is an alternative to calling rtc_clk_xtal_freq_get()
+ */
+#define RTC_XTAL_FREQ RTC_XTAL_FREQ_40M
+
 /**
  * @brief CPU frequency values
  */
@@ -315,23 +322,16 @@ void rtc_clk_init(rtc_clk_config_t cfg);
 /**
  * @brief Get main XTAL frequency
  *
- * This is the value stored in RTC register RTC_XTAL_FREQ_REG by the bootloader. As passed to
+ * Result is a constant as XTAL frequency is fixed.
- * rtc_clk_init function
  *
- * @return XTAL frequency, one of rtc_xtal_freq_t
+ * @note Function is included for ESP32 compatible code only. Code which only
+ * needs to support this SoC can use the macro RTC_XTAL_FREQ for this SoC's
+ * fixed crystal value.
+ *
+ * @return XTAL frequency in MHz, RTC_XTAL_FREQ_40M
  */
 rtc_xtal_freq_t rtc_clk_xtal_freq_get(void);
 
-/**
- * @brief Update XTAL frequency
- *
- * Updates the XTAL value stored in RTC_XTAL_FREQ_REG. Usually this value is ignored
- * after startup.
- *
- * @param xtal_freq New frequency value
- */
-void rtc_clk_xtal_freq_update(rtc_xtal_freq_t xtal_freq);
-
 /**
  * @brief Enable or disable 32 kHz XTAL oscillator
  * @param en  true to enable, false to disable