diff --git a/components/bootloader_support/src/bootloader_console.c b/components/bootloader_support/src/bootloader_console.c index 0de00bb51c..2408d0a093 100644 --- a/components/bootloader_support/src/bootloader_console.c +++ b/components/bootloader_support/src/bootloader_console.c @@ -13,7 +13,6 @@ #include "soc/gpio_periph.h" #include "soc/gpio_sig_map.h" #include "soc/rtc.h" -#include "hal/clk_gate_ll.h" #include "hal/gpio_hal.h" #if CONFIG_IDF_TARGET_ESP32S2 #include "esp32s2/rom/usb/cdc_acm.h" diff --git a/components/driver/test_apps/legacy_i2c_driver/main/test_i2c.c b/components/driver/test_apps/legacy_i2c_driver/main/test_i2c.c index 43eed52043..26fe72b1e3 100644 --- a/components/driver/test_apps/legacy_i2c_driver/main/test_i2c.c +++ b/components/driver/test_apps/legacy_i2c_driver/main/test_i2c.c @@ -16,6 +16,7 @@ #include "esp_system.h" #include "soc/uart_struct.h" #include "esp_private/periph_ctrl.h" +#include "esp_private/uart_share_hw_ctrl.h" #include "esp_rom_gpio.h" #include "hal/gpio_hal.h" #include "hal/uart_ll.h" @@ -678,7 +679,10 @@ static void uart_aut_baud_det_init(int rxd_io_num) gpio_set_direction(rxd_io_num, GPIO_MODE_INPUT_OUTPUT); esp_rom_gpio_connect_out_signal(rxd_io_num, i2c_periph_signal[0].scl_out_sig, 0, 0); esp_rom_gpio_connect_in_signal(rxd_io_num, UART_PERIPH_SIGNAL(1, SOC_UART_RX_PIN_IDX), 0); - periph_module_enable(PERIPH_UART1_MODULE); + HP_UART_BUS_CLK_ATOMIC() { + uart_ll_enable_bus_clock(1, true); + uart_ll_reset_register(1); + } /* Reset all the bits */ uart_ll_disable_intr_mask(&UART1, ~0); uart_ll_clr_intsts_mask(&UART1, ~0); @@ -710,7 +714,9 @@ static void i2c_scl_freq_cal(void) printf("\nSCL high period %.3f (us), SCL low_period %.3f (us)\n\n", (float)(i2c_cource_clk_period * high_period_cnt), (float)(i2c_cource_clk_period * low_period_cnt)); uart_ll_set_autobaud_en(&UART1, false); - periph_module_disable(PERIPH_UART1_MODULE); + HP_UART_BUS_CLK_ATOMIC() { + uart_ll_enable_bus_clock(1, false); + } } TEST_CASE("I2C SCL freq test (local test)", "[i2c][ignore]") diff --git a/components/esp_hw_support/include/esp_private/periph_ctrl.h b/components/esp_hw_support/include/esp_private/periph_ctrl.h index 99ee3d6d99..4f714c987b 100644 --- a/components/esp_hw_support/include/esp_private/periph_ctrl.h +++ b/components/esp_hw_support/include/esp_private/periph_ctrl.h @@ -1,11 +1,12 @@ /* - * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ #pragma once #include +#include "sdkconfig.h" #include "soc/periph_defs.h" #ifdef __cplusplus @@ -68,6 +69,24 @@ void periph_rcc_exit(void); /************************************************************************************************************* * @note The following APIs are no longer supported since ESP32P4, please use the RCC lock macros instead. *************************************************************************************************************/ +// allow the following targets to use the legacy periph_module_xyz APIs, to maintain backward compatibility, +// because periph_module_xyz is also used outside of the ESP-IDF +#if defined(CONFIG_IDF_TARGET_ESP32) || \ + defined(CONFIG_IDF_TARGET_ESP32S2) || \ + defined(CONFIG_IDF_TARGET_ESP32S3) || \ + defined(CONFIG_IDF_TARGET_ESP32C2) || \ + defined(CONFIG_IDF_TARGET_ESP32C3) || \ + defined(CONFIG_IDF_TARGET_ESP32C6) || \ + defined(CONFIG_IDF_TARGET_ESP32H2) +#define __PERIPH_CTRL_ALLOW_LEGACY_API +#endif + +#ifdef __PERIPH_CTRL_ALLOW_LEGACY_API +#define __PERIPH_CTRL_DEPRECATE_ATTR +#else +#define __PERIPH_CTRL_DEPRECATE_ATTR __attribute__((deprecated("This function is not functional on "CONFIG_IDF_TARGET))) +#endif + /** * @brief Enable peripheral module by un-gating the clock and de-asserting the reset signal. * @@ -77,6 +96,7 @@ void periph_rcc_exit(void); * @c periph_module_disable() has to be called the same number of times, * in order to put the peripheral into disabled state. */ +__PERIPH_CTRL_DEPRECATE_ATTR void periph_module_enable(periph_module_t periph); /** @@ -88,6 +108,7 @@ void periph_module_enable(periph_module_t periph); * @c periph_module_disable() has to be called the same number of times, * in order to put the peripheral into disabled state. */ +__PERIPH_CTRL_DEPRECATE_ATTR void periph_module_disable(periph_module_t periph); /** @@ -97,6 +118,7 @@ void periph_module_disable(periph_module_t periph); * * @note Calling this function does not enable or disable the clock for the module. */ +__PERIPH_CTRL_DEPRECATE_ATTR void periph_module_reset(periph_module_t periph); /** @@ -131,6 +153,8 @@ void wifi_module_enable(void); */ void wifi_module_disable(void); +#undef __PERIPH_CTRL_DEPRECATE_ATTR + #ifdef __cplusplus } #endif diff --git a/components/esp_hw_support/lowpower/cpu_retention/port/esp32c5/sleep_cpu.c b/components/esp_hw_support/lowpower/cpu_retention/port/esp32c5/sleep_cpu.c index 5adaad5c83..c5dbd92233 100644 --- a/components/esp_hw_support/lowpower/cpu_retention/port/esp32c5/sleep_cpu.c +++ b/components/esp_hw_support/lowpower/cpu_retention/port/esp32c5/sleep_cpu.c @@ -36,7 +36,6 @@ #if CONFIG_PM_CHECK_SLEEP_RETENTION_FRAME #include "esp_private/system_internal.h" -#include "hal/clk_gate_ll.h" #include "hal/uart_hal.h" #endif diff --git a/components/esp_hw_support/lowpower/cpu_retention/port/esp32c6/sleep_cpu.c b/components/esp_hw_support/lowpower/cpu_retention/port/esp32c6/sleep_cpu.c index 7378d2b48f..200aab0ea4 100644 --- a/components/esp_hw_support/lowpower/cpu_retention/port/esp32c6/sleep_cpu.c +++ b/components/esp_hw_support/lowpower/cpu_retention/port/esp32c6/sleep_cpu.c @@ -36,7 +36,6 @@ #if CONFIG_PM_CHECK_SLEEP_RETENTION_FRAME #include "esp_private/system_internal.h" -#include "hal/clk_gate_ll.h" #include "hal/uart_hal.h" #endif diff --git a/components/esp_hw_support/lowpower/cpu_retention/port/esp32h2/sleep_cpu.c b/components/esp_hw_support/lowpower/cpu_retention/port/esp32h2/sleep_cpu.c index bfcd95b4dd..d07a311325 100644 --- a/components/esp_hw_support/lowpower/cpu_retention/port/esp32h2/sleep_cpu.c +++ b/components/esp_hw_support/lowpower/cpu_retention/port/esp32h2/sleep_cpu.c @@ -36,7 +36,6 @@ #if CONFIG_PM_CHECK_SLEEP_RETENTION_FRAME #include "esp_private/system_internal.h" -#include "hal/clk_gate_ll.h" #include "hal/uart_hal.h" #endif diff --git a/components/esp_hw_support/lowpower/cpu_retention/port/esp32p4/sleep_cpu.c b/components/esp_hw_support/lowpower/cpu_retention/port/esp32p4/sleep_cpu.c index 3b18daad91..71eabe600e 100644 --- a/components/esp_hw_support/lowpower/cpu_retention/port/esp32p4/sleep_cpu.c +++ b/components/esp_hw_support/lowpower/cpu_retention/port/esp32p4/sleep_cpu.c @@ -37,7 +37,6 @@ #if CONFIG_PM_CHECK_SLEEP_RETENTION_FRAME #include "esp_private/system_internal.h" -#include "hal/clk_gate_ll.h" #include "hal/uart_hal.h" #endif diff --git a/components/esp_hw_support/modem_clock.c b/components/esp_hw_support/modem_clock.c index 3f089170ae..19749c11ba 100644 --- a/components/esp_hw_support/modem_clock.c +++ b/components/esp_hw_support/modem_clock.c @@ -12,7 +12,6 @@ #include "soc/soc.h" #include "soc/soc_caps.h" #include "freertos/FreeRTOS.h" -#include "hal/clk_gate_ll.h" #include "esp_private/esp_modem_clock.h" #include "esp_private/esp_pmu.h" #include "esp_sleep.h" diff --git a/components/esp_hw_support/periph_ctrl.c b/components/esp_hw_support/periph_ctrl.c index a560cd2990..51aeb2ae48 100644 --- a/components/esp_hw_support/periph_ctrl.c +++ b/components/esp_hw_support/periph_ctrl.c @@ -1,13 +1,15 @@ /* - * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ #include "freertos/FreeRTOS.h" -#include "hal/clk_gate_ll.h" #include "esp_attr.h" #include "esp_private/periph_ctrl.h" #include "soc/soc_caps.h" +#ifdef __PERIPH_CTRL_ALLOW_LEGACY_API +#include "hal/clk_gate_ll.h" +#endif #if SOC_MODEM_CLOCK_IS_INDEPENDENT #include "esp_private/esp_modem_clock.h" @@ -55,6 +57,7 @@ void periph_rcc_release_exit(periph_module_t periph, uint8_t ref_count) void periph_module_enable(periph_module_t periph) { +#ifdef __PERIPH_CTRL_ALLOW_LEGACY_API assert(periph < PERIPH_MODULE_MAX); portENTER_CRITICAL_SAFE(&periph_spinlock); if (ref_counts[periph] == 0) { @@ -62,10 +65,12 @@ void periph_module_enable(periph_module_t periph) } ref_counts[periph]++; portEXIT_CRITICAL_SAFE(&periph_spinlock); +#endif } void periph_module_disable(periph_module_t periph) { +#ifdef __PERIPH_CTRL_ALLOW_LEGACY_API assert(periph < PERIPH_MODULE_MAX); portENTER_CRITICAL_SAFE(&periph_spinlock); ref_counts[periph]--; @@ -73,14 +78,17 @@ void periph_module_disable(periph_module_t periph) periph_ll_disable_clk_set_rst(periph); } portEXIT_CRITICAL_SAFE(&periph_spinlock); +#endif } void periph_module_reset(periph_module_t periph) { +#ifdef __PERIPH_CTRL_ALLOW_LEGACY_API assert(periph < PERIPH_MODULE_MAX); portENTER_CRITICAL_SAFE(&periph_spinlock); periph_ll_reset(periph); portEXIT_CRITICAL_SAFE(&periph_spinlock); +#endif } #if !SOC_IEEE802154_BLE_ONLY diff --git a/components/esp_hw_support/sleep_modes.c b/components/esp_hw_support/sleep_modes.c index e20f2f7d3e..e984d24d25 100644 --- a/components/esp_hw_support/sleep_modes.c +++ b/components/esp_hw_support/sleep_modes.c @@ -48,7 +48,6 @@ #if SOC_TOUCH_SENSOR_SUPPORTED #include "hal/touch_sensor_hal.h" #endif -#include "hal/clk_gate_ll.h" #include "sdkconfig.h" #include "esp_rom_uart.h" @@ -301,8 +300,8 @@ static void RTC_IRAM_ATTR __attribute__((used, noinline)) esp_wake_stub_start(vo /* We must have a default deep sleep wake stub entry function, which must be * located at the start address of the RTC fast memory, and its implementation - * must be simple enough to ensure that there is no litteral data before the - * wake stub entry, otherwise, the litteral data before the wake stub entry + * must be simple enough to ensure that there is no literal data before the + * wake stub entry, otherwise, the literal data before the wake stub entry * will not be CRC checked. */ static void __attribute__((section(".rtc.entry.text"))) esp_wake_stub_entry(void) { @@ -769,7 +768,7 @@ static esp_err_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags, esp_sleep_mode_t m if (!deep_sleep) { /* Enable sleep reject for faster return from this function, - * in case the wakeup is already triggerred. + * in case the wakeup is already triggered. */ reject_triggers |= sleep_modem_reject_triggers(); } @@ -1216,8 +1215,8 @@ esp_err_t esp_light_sleep_start(void) /* * Adjustment time consists of parts below: - * 1. Hardware time waiting for internal 8M oscilate clock and XTAL; - * 2. Hardware state swithing time of the rtc main state machine; + * 1. Hardware time waiting for internal 8M oscillate clock and XTAL; + * 2. Hardware state switching time of the rtc main state machine; * 3. Code execution time when clock is not stable; * 4. Code execution time which can be measured; */ diff --git a/components/esp_system/port/soc/esp32s2/clk.c b/components/esp_system/port/soc/esp32s2/clk.c index 65f4443d99..7da508fde7 100644 --- a/components/esp_system/port/soc/esp32s2/clk.c +++ b/components/esp_system/port/soc/esp32s2/clk.c @@ -26,7 +26,6 @@ #include "esp_private/esp_clk.h" #include "bootloader_clock.h" #include "soc/syscon_reg.h" -#include "hal/clk_gate_ll.h" static const char *TAG = "clk"; diff --git a/components/hal/esp32p4/include/hal/clk_gate_ll.h b/components/hal/esp32p4/include/hal/clk_gate_ll.h deleted file mode 100644 index caf46ad96e..0000000000 --- a/components/hal/esp32p4/include/hal/clk_gate_ll.h +++ /dev/null @@ -1,189 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#pragma once - -#include -#include -#include "soc/periph_defs.h" -#include "soc/soc.h" -#include "soc/hp_sys_clkrst_reg.h" -#include "soc/lp_clkrst_reg.h" -#include "esp_attr.h" - -#ifdef __cplusplus -extern "C" { -#endif - -static inline uint32_t periph_ll_get_clk_en_mask(periph_module_t periph) -{ - switch (periph) { - case PERIPH_EMAC_MODULE: - return LP_CLKRST_HP_PAD_EMAC_TXRX_CLK_EN | LP_CLKRST_HP_PAD_EMAC_RX_CLK_EN | LP_CLKRST_HP_PAD_EMAC_TX_CLK_EN; - case PERIPH_I3C_MODULE: - return HP_SYS_CLKRST_REG_I3C_MST_CLK_EN; - case PERIPH_SARADC_MODULE: - return HP_SYS_CLKRST_REG_ADC_CLK_EN; - case PERIPH_PVT_MODULE: - return HP_SYS_CLKRST_REG_PVT_CLK_EN; - case PERIPH_AES_MODULE: - return HP_SYS_CLKRST_REG_CRYPTO_AES_CLK_EN; - case PERIPH_DS_MODULE: - return HP_SYS_CLKRST_REG_CRYPTO_DS_CLK_EN; - case PERIPH_ECC_MODULE: - return HP_SYS_CLKRST_REG_CRYPTO_ECC_CLK_EN; - case PERIPH_HMAC_MODULE: - return HP_SYS_CLKRST_REG_CRYPTO_HMAC_CLK_EN; - case PERIPH_RSA_MODULE: - return HP_SYS_CLKRST_REG_CRYPTO_RSA_CLK_EN; - case PERIPH_SEC_MODULE: - return HP_SYS_CLKRST_REG_CRYPTO_SEC_CLK_EN; - case PERIPH_SHA_MODULE: - return HP_SYS_CLKRST_REG_CRYPTO_SHA_CLK_EN; - case PERIPH_ECDSA_MODULE: - return HP_SYS_CLKRST_REG_CRYPTO_ECDSA_CLK_EN; - case PERIPH_ISP_MODULE: - return HP_SYS_CLKRST_REG_ISP_CLK_EN; - default: - return 0; - } -} - -static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool enable) -{ - uint32_t ret; - switch (periph) { - case PERIPH_PVT_MODULE: - return HP_SYS_CLKRST_REG_RST_EN_PVT_TOP; - case PERIPH_ISP_MODULE: - return HP_SYS_CLKRST_REG_RST_EN_ISP; - case PERIPH_UHCI_MODULE: - return HP_SYS_CLKRST_REG_RST_EN_UHCI; - case PERIPH_I3C_MODULE: - return HP_SYS_CLKRST_REG_RST_EN_I3CMST | HP_SYS_CLKRST_REG_RST_EN_I3CSLV; - case PERIPH_SARADC_MODULE: - return HP_SYS_CLKRST_REG_RST_EN_ADC; - case PERIPH_AES_MODULE: - ret = HP_SYS_CLKRST_REG_RST_EN_AES; - if (enable == true) { - // Clear reset on digital signature, otherwise AES unit is held in reset - ret |= HP_SYS_CLKRST_REG_RST_EN_DS; - } - return ret; - case PERIPH_DS_MODULE: - return HP_SYS_CLKRST_REG_RST_EN_DS; - case PERIPH_ECC_MODULE: - ret = HP_SYS_CLKRST_REG_RST_EN_ECC; - if (enable == true) { - ret |= HP_SYS_CLKRST_REG_RST_EN_ECDSA; - } - return ret; - case PERIPH_HMAC_MODULE: - return HP_SYS_CLKRST_REG_RST_EN_HMAC; - case PERIPH_RSA_MODULE: - ret = HP_SYS_CLKRST_REG_RST_EN_RSA; - if (enable == true) { - // Clear reset on digital signature, and ECDSA, otherwise RSA is held in reset - ret |= HP_SYS_CLKRST_REG_RST_EN_DS | HP_SYS_CLKRST_REG_RST_EN_ECDSA; - } - return ret; - case PERIPH_SEC_MODULE: - return HP_SYS_CLKRST_REG_RST_EN_SEC; - case PERIPH_SHA_MODULE: - ret = HP_SYS_CLKRST_REG_RST_EN_SHA; - if (enable == true) { - // Clear reset on digital signature, HMAC and ECDSA, otherwise SHA is held in reset - ret |= (HP_SYS_CLKRST_REG_RST_EN_HMAC | HP_SYS_CLKRST_REG_RST_EN_DS | HP_SYS_CLKRST_REG_RST_EN_ECDSA); - } - return ret; - case PERIPH_ECDSA_MODULE: - return HP_SYS_CLKRST_REG_RST_EN_ECDSA; - case PERIPH_EMAC_MODULE: - return LP_CLKRST_RST_EN_EMAC; - default: - return 0; - } -} - -static inline uint32_t periph_ll_get_clk_en_reg(periph_module_t periph) -{ - switch (periph) { - case PERIPH_I3C_MODULE: - case PERIPH_SARADC_MODULE: - return HP_SYS_CLKRST_PERI_CLK_CTRL22_REG; - case PERIPH_PVT_MODULE: - case PERIPH_AES_MODULE: - case PERIPH_DS_MODULE: - case PERIPH_ECC_MODULE: - case PERIPH_HMAC_MODULE: - case PERIPH_RSA_MODULE: - case PERIPH_SEC_MODULE: - case PERIPH_SHA_MODULE: - case PERIPH_ECDSA_MODULE: - return HP_SYS_CLKRST_PERI_CLK_CTRL24_REG; - case PERIPH_ISP_MODULE: - return HP_SYS_CLKRST_PERI_CLK_CTRL25_REG; - case PERIPH_EMAC_MODULE: - return LP_CLKRST_HP_CLK_CTRL_REG; - default: - abort(); - return 0; - } -} - -static inline uint32_t periph_ll_get_rst_en_reg(periph_module_t periph) -{ - switch (periph) { - case PERIPH_PVT_MODULE: - case PERIPH_ISP_MODULE: - return HP_SYS_CLKRST_HP_RST_EN0_REG; - case PERIPH_UHCI_MODULE: - case PERIPH_I3C_MODULE: - case PERIPH_SARADC_MODULE: - case PERIPH_AES_MODULE: - case PERIPH_DS_MODULE: - case PERIPH_ECC_MODULE: - case PERIPH_HMAC_MODULE: - case PERIPH_RSA_MODULE: - case PERIPH_SEC_MODULE: - case PERIPH_SHA_MODULE: - case PERIPH_ECDSA_MODULE: - return HP_SYS_CLKRST_HP_RST_EN2_REG; - case PERIPH_EMAC_MODULE: - return LP_CLKRST_HP_SDMMC_EMAC_RST_CTRL_REG; - default: - abort(); - return 0; - } -} - -static inline void periph_ll_enable_clk_clear_rst(periph_module_t periph) -{ - SET_PERI_REG_MASK(periph_ll_get_clk_en_reg(periph), periph_ll_get_clk_en_mask(periph)); - CLEAR_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, true)); -} - -static inline void periph_ll_disable_clk_set_rst(periph_module_t periph) -{ - CLEAR_PERI_REG_MASK(periph_ll_get_clk_en_reg(periph), periph_ll_get_clk_en_mask(periph)); - SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false)); -} - -static inline void periph_ll_reset(periph_module_t periph) -{ - SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false)); - CLEAR_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false)); -} - -static inline bool IRAM_ATTR periph_ll_periph_enabled(periph_module_t periph) -{ - return REG_GET_BIT(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false)) == 0 && - REG_GET_BIT(periph_ll_get_clk_en_reg(periph), periph_ll_get_clk_en_mask(periph)) != 0; -} - -#ifdef __cplusplus -} -#endif diff --git a/components/hal/test_apps/crypto/main/ecdsa/test_ecdsa.c b/components/hal/test_apps/crypto/main/ecdsa/test_ecdsa.c index 4564581967..ee30352c4b 100644 --- a/components/hal/test_apps/crypto/main/ecdsa/test_ecdsa.c +++ b/components/hal/test_apps/crypto/main/ecdsa/test_ecdsa.c @@ -12,7 +12,6 @@ #include "esp_efuse_chip.h" #include "esp_private/esp_crypto_lock_internal.h" #include "esp_random.h" -#include "hal/clk_gate_ll.h" #include "hal/ecc_ll.h" #include "hal/ecdsa_hal.h" #include "hal/ecdsa_ll.h" @@ -97,7 +96,7 @@ static void test_ecdsa_corrupt_data(bool is_p256, uint8_t* sha, uint8_t* r_le, u len = 24; } - // Randomly select a bit and corrupt its correpsonding value + // Randomly select a bit and corrupt its corresponding value uint16_t r_bit = esp_random() % len * 8; printf("Corrupting SHA bit %d...\n", r_bit);