diff --git a/components/esp_hw_support/include/esp_sleep.h b/components/esp_hw_support/include/esp_sleep.h index 3ac440e8cd..f40f94ae3c 100644 --- a/components/esp_hw_support/include/esp_sleep.h +++ b/components/esp_hw_support/include/esp_sleep.h @@ -286,7 +286,7 @@ esp_err_t esp_sleep_enable_ext0_wakeup(gpio_num_t gpio_num, int level); * @note Call this func will reset the previous ext1 configuration. * * @note This function will be deprecated in release/v6.0. Please switch to use `esp_sleep_enable_ext1_wakeup_io` and `esp_sleep_disable_ext1_wakeup_io` - * + * @note On ESP32-H2, although GPIO7 is an RTC GPIO, it is not led out for external wakeup. * @param io_mask Bit mask of GPIO numbers which will cause wakeup. Only GPIOs * which have RTC functionality can be used in this bit map. * For different SoCs, the related GPIOs are: @@ -335,7 +335,7 @@ esp_err_t esp_sleep_enable_ext1_wakeup(uint64_t io_mask, esp_sleep_ext1_wakeup_m * we will use the HOLD feature to maintain the pull-up and pull-down on * the pins during sleep. HOLD feature will be acted on the pin internally * before the system entering sleep, and this can further reduce power consumption. - * + * @note On ESP32-H2, although GPIO7 is an RTC GPIO, it is not led out for external wakeup. * @param io_mask Bit mask of GPIO numbers which will cause wakeup. Only GPIOs * which have RTC functionality can be used in this bit map. * For different SoCs, the related GPIOs are: @@ -362,6 +362,7 @@ esp_err_t esp_sleep_enable_ext1_wakeup_io(uint64_t io_mask, esp_sleep_ext1_wakeu /** * @brief Disable ext1 wakeup pins with IO masks. This will remove selected IOs from the wakeup IOs. + * @note On ESP32-H2, although GPIO7 is an RTC GPIO, it is not led out for external wakeup. * @param io_mask Bit mask of GPIO numbers which will cause wakeup. Only GPIOs * which have RTC functionality can be used in this bit map. * If value is zero, this func will remove all previous ext1 configuration. @@ -401,12 +402,12 @@ esp_err_t esp_sleep_disable_ext1_wakeup_io(uint64_t io_mask); * we will use the HOLD feature to maintain the pull-up and pull-down on * the pins during sleep. HOLD feature will be acted on the pin internally * before the system entering sleep, and this can further reduce power consumption. - * + * @note On ESP32-H2, although GPIO7 is an RTC GPIO, it is not led out for external wakeup. * @param io_mask Bit mask of GPIO numbers which will cause wakeup. Only GPIOs * which have RTC functionality can be used in this bit map. * For different SoCs, the related GPIOs are: - * - ESP32-C6: 0-7. - * - ESP32-H2: 7-14. + * - ESP32-C6: 0-7 + * - ESP32-H2: 7-14 * @param level_mask Select logic function used to determine wakeup condition per pin. * Each bit of the level_mask corresponds to the respective GPIO. Each bit's corresponding * position is set to 0, the wakeup level will be low, on the contrary, diff --git a/docs/en/api-reference/peripherals/gpio/esp32h2.inc b/docs/en/api-reference/peripherals/gpio/esp32h2.inc index 99f8d2327b..8dab35578b 100644 --- a/docs/en/api-reference/peripherals/gpio/esp32h2.inc +++ b/docs/en/api-reference/peripherals/gpio/esp32h2.inc @@ -138,7 +138,7 @@ The table below provides more information on pin usage, and please note the comm - Strapping pin: GPIO2, GPIO3, GPIO8, GPIO9, and GPIO25 are strapping pins. For more information, please refer to `ESP32H2 datasheet <{IDF_TARGET_DATASHEET_EN_URL}>`_. - SPI0/1: GPIO15-21 are usually used for SPI flash and not recommended for other uses. - USB-Serial-JTAG: GPIO 26 and 27 are used by USB-Serial-JTAG by default. In order to use them as GPIOs, USB-Serial-JTAG will be disabled by the drivers. - - For chip variants with an SiP flash built in, GPIO15 ~ GPIO21 are dedicated to connecting the SiP flash and are not fan-out to the external pins. In addition, GPIO6 ~ GPIO7 are also not fan-out to the external pins. In conclusion, only GPIO0~ GPIO5, GPIO8~ GPIO14, GPIO22~ GPIO27 are available to users. - - RTC: GPIO7-14 can be used to wake up the chip from Deep-sleep mode. Other GPIOs can only wake up the chip from Light-sleep mode. For more information, please refer to Section :ref:`Wakeup Sources`. + - For chip variants with an SiP flash built in, GPIO15–GPIO21 are dedicated to connecting the SiP flash and are not fan-out to the external pins. In addition, GPIO6–GPIO7 are also not fan-out to the external pins. In conclusion, only GPIO0–GPIO5, GPIO8–GPIO14, GPIO22–GPIO27 are available to users. + - RTC: GPIO7–GPIO14 can be used to wake up the chip from Deep-sleep mode. Note that although GPIO7 is an RTC GPIO, it cannot be used for external wake-up since it is not led out. Other GPIOs can only wake up the chip from Light-sleep mode. For more information, please refer to Section :ref:`Wakeup Sources `. --- diff --git a/docs/zh_CN/api-reference/peripherals/gpio/esp32h2.inc b/docs/zh_CN/api-reference/peripherals/gpio/esp32h2.inc index b642377b61..481ddfbc7d 100644 --- a/docs/zh_CN/api-reference/peripherals/gpio/esp32h2.inc +++ b/docs/zh_CN/api-reference/peripherals/gpio/esp32h2.inc @@ -140,7 +140,7 @@ - Strapping 管脚： GPIO2、GPIO3、GPIO8、GPIO9 和 GPIO25 是 Strapping 管脚。更多信息请参考 `ESP32-H2 技术规格书 <{IDF_TARGET_DATASHEET_CN_URL}>`_。 - SPI0/1: GPIO15-21 通常用于 SPI flash, 不推荐用于其他用途。 - USB-Serial-JTAG: GPIO26 和 GPIO27 默认用于 USB-Serial-JTAG。用做 GPIO 时驱动程序将禁用 USB-Serial-JTAG。 - - 对于合封了 flash 的芯片型号， GPIO15 ~ GPIO21 专门用于连接该 flash, 并未引出至芯片管脚。且 GPIO6 ~ GPIO7 也未引出至芯片管脚，用户不可用。用户可配置使用其他剩余的 19 个 GPIO 管脚, 编号为: GPIO0 ~ GPIO5、GPIO8 ~ GPIO14、GPIO22 ~ GPIO27。 - - RTC：GPIO7-14 可用于将芯片从 Deep-sleep 模式中唤醒，其他 GPIO 仅能将芯片从 Light-sleep 模式中唤醒。更多信息请参考 :ref:`唤醒源` 章节。 + - 对于合封了 flash 的芯片型号， GPIO15–GPIO21 专门用于连接该 flash, 并未引出至芯片管脚。且 GPIO6–GPIO7 也未引出至芯片管脚，用户不可用。用户可配置使用其他剩余的 19 个 GPIO 管脚, 编号为: GPIO0–GPIO5、GPIO8–GPIO14、GPIO22–GPIO27。 + - RTC：GPIO7–GPIO14 可用于将芯片从 Deep-sleep 模式中唤。请注意，虽然 GPIO7 是一个 RTC GPIO，但由于未引出，无法用于外部唤醒。其他 GPIO 仅能将芯片从 Light-sleep 模式中唤醒。更多信息请参考 :ref:`唤醒源 ` 章节。 ---