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fix(efuse): Adds missing efuses fields for ESP32-H4

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This commit is contained in:
Konstantin Kondrashov
2025-03-05 14:07:37 +02:00
committed by Chen Jichang
parent bfac674769
commit 917adbb171
3 changed files with 30 additions and 5 deletions
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26
components/efuse/esp32h4/esp_efuse_table.c
View File

@@ -9,7 +9,7 @@
#include <assert.h> #include <assert.h>
#include "esp_efuse_table.h" #include "esp_efuse_table.h"
// md5_digest_table 6bfa2ae917ac6cbce5b70a55ea6a78bd // md5_digest_table 39c442690c2273d557b5bb0db99fbe04
// This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY. // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
// If you want to change some fields, you need to change esp_efuse_table.csv file // If you want to change some fields, you need to change esp_efuse_table.csv file
// then run `efuse_common_table` or `efuse_custom_table` command it will generate this file. // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@@ -183,6 +183,10 @@ static const esp_efuse_desc_t WR_DIS_HUK_GEN_STATE[] = {
{EFUSE_BLK0, 19, 1}, // [] wr_dis of HUK_GEN_STATE, {EFUSE_BLK0, 19, 1}, // [] wr_dis of HUK_GEN_STATE,
}; };
static const esp_efuse_desc_t WR_DIS_BLK1[] = {
{EFUSE_BLK0, 20, 1}, // [] wr_dis of BLOCK1,
};
static const esp_efuse_desc_t WR_DIS_MAC[] = { static const esp_efuse_desc_t WR_DIS_MAC[] = {
{EFUSE_BLK0, 20, 1}, // [WR_DIS.MAC_FACTORY] wr_dis of MAC, {EFUSE_BLK0, 20, 1}, // [WR_DIS.MAC_FACTORY] wr_dis of MAC,
}; };
@@ -227,6 +231,10 @@ static const esp_efuse_desc_t WR_DIS_FLASH_LDO_POWER_SEL[] = {
{EFUSE_BLK0, 20, 1}, // [] wr_dis of FLASH_LDO_POWER_SEL, {EFUSE_BLK0, 20, 1}, // [] wr_dis of FLASH_LDO_POWER_SEL,
}; };
static const esp_efuse_desc_t WR_DIS_SYS_DATA_PART1[] = {
{EFUSE_BLK0, 21, 1}, // [] wr_dis of BLOCK2,
};
static const esp_efuse_desc_t WR_DIS_BLOCK_USR_DATA[] = { static const esp_efuse_desc_t WR_DIS_BLOCK_USR_DATA[] = {
{EFUSE_BLK0, 22, 1}, // [WR_DIS.USER_DATA] wr_dis of BLOCK_USR_DATA, {EFUSE_BLK0, 22, 1}, // [WR_DIS.USER_DATA] wr_dis of BLOCK_USR_DATA,
}; };
@@ -521,7 +529,8 @@ static const esp_efuse_desc_t MAC[] = {
}; };
static const esp_efuse_desc_t MAC_EXT[] = { static const esp_efuse_desc_t MAC_EXT[] = {
{EFUSE_BLK1, 48, 16}, // [] Represents the extended bits of MAC address, {EFUSE_BLK1, 56, 8}, // [] Stores the extended bits of MAC address,
{EFUSE_BLK1, 48, 8}, // [] Stores the extended bits of MAC address,
}; };
static const esp_efuse_desc_t PVT_LIMIT[] = { static const esp_efuse_desc_t PVT_LIMIT[] = {
@@ -810,6 +819,11 @@ const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_HUK_GEN_STATE[] = {
NULL NULL
}; };
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLK1[] = {
&WR_DIS_BLK1[0], // [] wr_dis of BLOCK1
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_MAC[] = { const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_MAC[] = {
&WR_DIS_MAC[0], // [WR_DIS.MAC_FACTORY] wr_dis of MAC &WR_DIS_MAC[0], // [WR_DIS.MAC_FACTORY] wr_dis of MAC
NULL NULL
@@ -865,6 +879,11 @@ const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_FLASH_LDO_POWER_SEL[] = {
NULL NULL
}; };
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SYS_DATA_PART1[] = {
&WR_DIS_SYS_DATA_PART1[0], // [] wr_dis of BLOCK2
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_USR_DATA[] = { const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_USR_DATA[] = {
&WR_DIS_BLOCK_USR_DATA[0], // [WR_DIS.USER_DATA] wr_dis of BLOCK_USR_DATA &WR_DIS_BLOCK_USR_DATA[0], // [WR_DIS.USER_DATA] wr_dis of BLOCK_USR_DATA
NULL NULL
@@ -1231,7 +1250,8 @@ const esp_efuse_desc_t* ESP_EFUSE_MAC[] = {
}; };
const esp_efuse_desc_t* ESP_EFUSE_MAC_EXT[] = { const esp_efuse_desc_t* ESP_EFUSE_MAC_EXT[] = {
&MAC_EXT[0], // [] Represents the extended bits of MAC address &MAC_EXT[0], // [] Stores the extended bits of MAC address
&MAC_EXT[1], // [] Stores the extended bits of MAC address
NULL NULL
}; };

5
components/efuse/esp32h4/esp_efuse_table.csv
View File

@@ -53,6 +53,7 @@ WR_DIS.UART_PRINT_CONTROL, EFUSE_BLK0, 18, 1, [] wr_dis
WR_DIS.FORCE_SEND_RESUME, EFUSE_BLK0, 18, 1, [] wr_dis of FORCE_SEND_RESUME WR_DIS.FORCE_SEND_RESUME, EFUSE_BLK0, 18, 1, [] wr_dis of FORCE_SEND_RESUME
WR_DIS.SECURE_VERSION, EFUSE_BLK0, 18, 1, [] wr_dis of SECURE_VERSION WR_DIS.SECURE_VERSION, EFUSE_BLK0, 18, 1, [] wr_dis of SECURE_VERSION
WR_DIS.HUK_GEN_STATE, EFUSE_BLK0, 19, 1, [] wr_dis of HUK_GEN_STATE WR_DIS.HUK_GEN_STATE, EFUSE_BLK0, 19, 1, [] wr_dis of HUK_GEN_STATE
WR_DIS.BLK1, EFUSE_BLK0, 20, 1, [] wr_dis of BLOCK1
WR_DIS.MAC, EFUSE_BLK0, 20, 1, [WR_DIS.MAC_FACTORY] wr_dis of MAC WR_DIS.MAC, EFUSE_BLK0, 20, 1, [WR_DIS.MAC_FACTORY] wr_dis of MAC
WR_DIS.MAC_EXT, EFUSE_BLK0, 20, 1, [] wr_dis of MAC_EXT WR_DIS.MAC_EXT, EFUSE_BLK0, 20, 1, [] wr_dis of MAC_EXT
WR_DIS.PVT_LIMIT, EFUSE_BLK0, 20, 1, [] wr_dis of PVT_LIMIT WR_DIS.PVT_LIMIT, EFUSE_BLK0, 20, 1, [] wr_dis of PVT_LIMIT
@@ -64,6 +65,7 @@ WR_DIS.HYS_EN_PAD, EFUSE_BLK0, 20, 1, [] wr_dis
WR_DIS.PVT_GLITCH_CHARGE_RESET, EFUSE_BLK0, 20, 1, [] wr_dis of PVT_GLITCH_CHARGE_RESET WR_DIS.PVT_GLITCH_CHARGE_RESET, EFUSE_BLK0, 20, 1, [] wr_dis of PVT_GLITCH_CHARGE_RESET
WR_DIS.VDD_SPI_LDO_ADJUST, EFUSE_BLK0, 20, 1, [] wr_dis of VDD_SPI_LDO_ADJUST WR_DIS.VDD_SPI_LDO_ADJUST, EFUSE_BLK0, 20, 1, [] wr_dis of VDD_SPI_LDO_ADJUST
WR_DIS.FLASH_LDO_POWER_SEL, EFUSE_BLK0, 20, 1, [] wr_dis of FLASH_LDO_POWER_SEL WR_DIS.FLASH_LDO_POWER_SEL, EFUSE_BLK0, 20, 1, [] wr_dis of FLASH_LDO_POWER_SEL
WR_DIS.SYS_DATA_PART1, EFUSE_BLK0, 21, 1, [] wr_dis of BLOCK2
WR_DIS.BLOCK_USR_DATA, EFUSE_BLK0, 22, 1, [WR_DIS.USER_DATA] wr_dis of BLOCK_USR_DATA WR_DIS.BLOCK_USR_DATA, EFUSE_BLK0, 22, 1, [WR_DIS.USER_DATA] wr_dis of BLOCK_USR_DATA
WR_DIS.CUSTOM_MAC, EFUSE_BLK0, 22, 1, [WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM] wr_dis of CUSTOM_MAC WR_DIS.CUSTOM_MAC, EFUSE_BLK0, 22, 1, [WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM] wr_dis of CUSTOM_MAC
WR_DIS.BLOCK_KEY0, EFUSE_BLK0, 23, 1, [WR_DIS.KEY0] wr_dis of BLOCK_KEY0 WR_DIS.BLOCK_KEY0, EFUSE_BLK0, 23, 1, [WR_DIS.KEY0] wr_dis of BLOCK_KEY0
@@ -141,7 +143,8 @@ MAC, EFUSE_BLK1, 40, 8, [MAC_FACT
, EFUSE_BLK1, 16, 8, [MAC_FACTORY] MAC address , EFUSE_BLK1, 16, 8, [MAC_FACTORY] MAC address
, EFUSE_BLK1, 8, 8, [MAC_FACTORY] MAC address , EFUSE_BLK1, 8, 8, [MAC_FACTORY] MAC address
, EFUSE_BLK1, 0, 8, [MAC_FACTORY] MAC address , EFUSE_BLK1, 0, 8, [MAC_FACTORY] MAC address
MAC_EXT, EFUSE_BLK1, 48, 16, [] Represents the extended bits of MAC address MAC_EXT, EFUSE_BLK1, 56, 8, [] Stores the extended bits of MAC address
, EFUSE_BLK1, 48, 8, [] Stores the extended bits of MAC address
PVT_LIMIT, EFUSE_BLK1, 64, 16, [] Power glitch monitor threthold PVT_LIMIT, EFUSE_BLK1, 64, 16, [] Power glitch monitor threthold
PVT_CELL_SELECT, EFUSE_BLK1, 80, 7, [] Power glitch monitor PVT cell select PVT_CELL_SELECT, EFUSE_BLK1, 80, 7, [] Power glitch monitor PVT cell select
PVT_PUMP_LIMIT, EFUSE_BLK1, 87, 8, [] Use to configure voltage monitor limit for charge pump PVT_PUMP_LIMIT, EFUSE_BLK1, 87, 8, [] Use to configure voltage monitor limit for charge pump
Can't render this file because it contains an unexpected character in line 8 and column 53.

4
components/efuse/esp32h4/include/esp_efuse_table.h
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@@ -10,7 +10,7 @@ extern "C" {
#include "esp_efuse.h" #include "esp_efuse.h"
// md5_digest_table 6bfa2ae917ac6cbce5b70a55ea6a78bd // md5_digest_table 39c442690c2273d557b5bb0db99fbe04
// This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY. // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
// If you want to change some fields, you need to change esp_efuse_table.csv file // If you want to change some fields, you need to change esp_efuse_table.csv file
// then run `efuse_common_table` or `efuse_custom_table` command it will generate this file. // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@@ -65,6 +65,7 @@ extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_UART_PRINT_CONTROL[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_FORCE_SEND_RESUME[]; extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_FORCE_SEND_RESUME[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_VERSION[]; extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_VERSION[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_HUK_GEN_STATE[]; extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_HUK_GEN_STATE[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLK1[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_MAC[]; extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_MAC[];
#define ESP_EFUSE_WR_DIS_MAC_FACTORY ESP_EFUSE_WR_DIS_MAC #define ESP_EFUSE_WR_DIS_MAC_FACTORY ESP_EFUSE_WR_DIS_MAC
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_MAC_EXT[]; extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_MAC_EXT[];
@@ -77,6 +78,7 @@ extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_HYS_EN_PAD[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_PVT_GLITCH_CHARGE_RESET[]; extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_PVT_GLITCH_CHARGE_RESET[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_VDD_SPI_LDO_ADJUST[]; extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_VDD_SPI_LDO_ADJUST[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_FLASH_LDO_POWER_SEL[]; extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_FLASH_LDO_POWER_SEL[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SYS_DATA_PART1[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_USR_DATA[]; extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_USR_DATA[];
#define ESP_EFUSE_WR_DIS_USER_DATA ESP_EFUSE_WR_DIS_BLOCK_USR_DATA #define ESP_EFUSE_WR_DIS_USER_DATA ESP_EFUSE_WR_DIS_BLOCK_USR_DATA
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_CUSTOM_MAC[]; extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_CUSTOM_MAC[];