change: changed ble msys init for controller

This commit is contained in:
cjin
2023-08-08 10:15:47 +08:00
parent 574800b50a
commit 926695b000
7 changed files with 72 additions and 72 deletions

View File

@@ -523,3 +523,7 @@ config BT_LE_SCAN_DUPL_CACHE_REFRESH_PERIOD
add new device information. add new device information.
2. When the refresh period is up, the controller will clear all device information and start filtering 2. When the refresh period is up, the controller will clear all device information and start filtering
again. again.
config BT_LE_MSYS_INIT_IN_CONTROLLER
bool
default y

View File

@@ -77,7 +77,6 @@
#define ACL_DATA_MBUF_LEADINGSPCAE 4 #define ACL_DATA_MBUF_LEADINGSPCAE 4
#endif // CONFIG_BT_BLUEDROID_ENABLED #endif // CONFIG_BT_BLUEDROID_ENABLED
/* Types definition /* Types definition
************************************************************************ ************************************************************************
*/ */
@@ -137,19 +136,18 @@ extern int esp_ble_ll_set_public_addr(const uint8_t *addr);
extern int esp_register_npl_funcs (struct npl_funcs_t *p_npl_func); extern int esp_register_npl_funcs (struct npl_funcs_t *p_npl_func);
extern void esp_unregister_npl_funcs (void); extern void esp_unregister_npl_funcs (void);
extern void npl_freertos_mempool_deinit(void); extern void npl_freertos_mempool_deinit(void);
extern int os_msys_buf_alloc(void);
extern uint32_t r_os_cputime_get32(void); extern uint32_t r_os_cputime_get32(void);
extern uint32_t r_os_cputime_ticks_to_usecs(uint32_t ticks); extern uint32_t r_os_cputime_ticks_to_usecs(uint32_t ticks);
extern void ble_lll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg, extern void ble_lll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg,
void *w_arg, uint32_t us_to_enabled); void *w_arg, uint32_t us_to_enabled);
extern void r_ble_rtc_wake_up_state_clr(void); extern void r_ble_rtc_wake_up_state_clr(void);
extern int os_msys_init(void);
extern void os_msys_deinit(void);
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
extern const sleep_retention_entries_config_t *esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra); extern const sleep_retention_entries_config_t *esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra);
extern void esp_ble_set_wakeup_overhead(uint32_t overhead); extern void esp_ble_set_wakeup_overhead(uint32_t overhead);
#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */ #endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
extern void esp_ble_change_rtc_freq(uint32_t freq); extern void esp_ble_change_rtc_freq(uint32_t freq);
extern int os_msys_init(void);
extern void os_msys_buf_free(void);
extern int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x, extern int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x,
const uint8_t *peer_pub_key_y, const uint8_t *peer_pub_key_y,
const uint8_t *our_priv_key, uint8_t *out_dhkey); const uint8_t *our_priv_key, uint8_t *out_dhkey);
@@ -548,7 +546,7 @@ static void sleep_modem_ble_mac_modem_state_deinit(void)
void sleep_modem_light_sleep_overhead_set(uint32_t overhead) void sleep_modem_light_sleep_overhead_set(uint32_t overhead)
{ {
esp_ble_set_wakeup_overhead(overhead - 500); esp_ble_set_wakeup_overhead(overhead);
} }
#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */ #endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
@@ -694,7 +692,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
uint8_t mac[6]; uint8_t mac[6];
esp_err_t ret = ESP_OK; esp_err_t ret = ESP_OK;
ble_npl_count_info_t npl_info; ble_npl_count_info_t npl_info;
bool use_main_xtal = false; uint32_t slow_clk_freq = 0;
memset(&npl_info, 0, sizeof(ble_npl_count_info_t)); memset(&npl_info, 0, sizeof(ble_npl_count_info_t));
@@ -736,15 +734,6 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
goto free_mem; goto free_mem;
} }
/* Initialize the global memory pool */
ret = os_msys_buf_alloc();
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "os msys alloc failed");
goto free_mem;
}
os_msys_init();
#if CONFIG_BT_NIMBLE_ENABLED #if CONFIG_BT_NIMBLE_ENABLED
/* ble_npl_eventq_init() needs to use npl functions in rom and /* ble_npl_eventq_init() needs to use npl functions in rom and
* must be called after esp_bt_controller_init(). * must be called after esp_bt_controller_init().
@@ -756,21 +745,26 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
/* Select slow clock source for BT momdule */ /* Select slow clock source for BT momdule */
#if CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL #if CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL
esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL); esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL);
slow_clk_freq = 100000;
#else #else
#if CONFIG_RTC_CLK_SRC_INT_RC #if CONFIG_RTC_CLK_SRC_INT_RC
esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_RC_SLOW); esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_RC_SLOW);
slow_clk_freq = 30000;
#elif CONFIG_RTC_CLK_SRC_EXT_CRYS #elif CONFIG_RTC_CLK_SRC_EXT_CRYS
if (rtc_clk_slow_src_get() == SOC_RTC_SLOW_CLK_SRC_XTAL32K) { if (rtc_clk_slow_src_get() == SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_XTAL32K); esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_XTAL32K);
slow_clk_freq = 32768;
} else { } else {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "32.768kHz XTAL not detected, fall back to main XTAL as Bluetooth sleep clock"); ESP_LOGW(NIMBLE_PORT_LOG_TAG, "32.768kHz XTAL not detected, fall back to main XTAL as Bluetooth sleep clock");
esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL); esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL);
use_main_xtal = true; slow_clk_freq = 100000;
} }
#elif CONFIG_RTC_CLK_SRC_INT_RC32K #elif CONFIG_RTC_CLK_SRC_INT_RC32K
esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_RC32K); esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_RC32K);
slow_clk_freq = 32000;
#elif CONFIG_RTC_CLK_SRC_EXT_OSC #elif CONFIG_RTC_CLK_SRC_EXT_OSC
esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_EXT32K); esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_EXT32K);
slow_clk_freq = 32000;
#else #else
ESP_LOGE(NIMBLE_PORT_LOG_TAG, "Unsupported clock source"); ESP_LOGE(NIMBLE_PORT_LOG_TAG, "Unsupported clock source");
assert(0); assert(0);
@@ -794,10 +788,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
goto modem_deint; goto modem_deint;
} }
if (use_main_xtal) { esp_ble_change_rtc_freq(slow_clk_freq);
esp_ble_change_rtc_freq(100000);
}
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
interface_func_t bt_controller_log_interface; interface_func_t bt_controller_log_interface;
bt_controller_log_interface = esp_bt_controller_log_interface; bt_controller_log_interface = esp_bt_controller_log_interface;
@@ -814,6 +805,12 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
ble_controller_scan_duplicate_config(); ble_controller_scan_duplicate_config();
ret = os_msys_init();
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "msys_init failed %d", ret);
goto free_controller;
}
ret = controller_sleep_init(); ret = controller_sleep_init();
if (ret != ESP_OK) { if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "controller_sleep_init failed %d", ret); ESP_LOGW(NIMBLE_PORT_LOG_TAG, "controller_sleep_init failed %d", ret);
@@ -835,6 +832,7 @@ free_controller:
controller_init_err: controller_init_err:
ble_log_deinit_async(); ble_log_deinit_async();
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
os_msys_deinit();
ble_controller_deinit(); ble_controller_deinit();
modem_deint: modem_deint:
esp_phy_modem_deinit(); esp_phy_modem_deinit();
@@ -844,7 +842,6 @@ modem_deint:
ble_npl_eventq_deinit(nimble_port_get_dflt_eventq()); ble_npl_eventq_deinit(nimble_port_get_dflt_eventq());
#endif // CONFIG_BT_NIMBLE_ENABLED #endif // CONFIG_BT_NIMBLE_ENABLED
free_mem: free_mem:
os_msys_buf_free();
npl_freertos_mempool_deinit(); npl_freertos_mempool_deinit();
esp_unregister_npl_funcs(); esp_unregister_npl_funcs();
npl_freertos_funcs_deinit(); npl_freertos_funcs_deinit();
@@ -862,6 +859,8 @@ esp_err_t esp_bt_controller_deinit(void)
controller_sleep_deinit(); controller_sleep_deinit();
os_msys_deinit();
esp_phy_modem_deinit(); esp_phy_modem_deinit();
modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE); modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
modem_clock_module_disable(PERIPH_BT_MODULE); modem_clock_module_disable(PERIPH_BT_MODULE);
@@ -876,8 +875,6 @@ esp_err_t esp_bt_controller_deinit(void)
ble_npl_eventq_deinit(nimble_port_get_dflt_eventq()); ble_npl_eventq_deinit(nimble_port_get_dflt_eventq());
#endif // CONFIG_BT_NIMBLE_ENABLED #endif // CONFIG_BT_NIMBLE_ENABLED
os_msys_buf_free();
esp_unregister_npl_funcs(); esp_unregister_npl_funcs();
esp_unregister_ext_funcs(); esp_unregister_ext_funcs();

View File

@@ -196,17 +196,7 @@ extern "C" {
#define BLE_LL_CONN_DEF_AUTH_PYLD_TMO_N (3000) #define BLE_LL_CONN_DEF_AUTH_PYLD_TMO_N (3000)
#if CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL
#define RTC_FREQ_N (100000) /* in Hz */
#else
#if CONFIG_RTC_CLK_SRC_INT_RC
#define RTC_FREQ_N (30000) /* in Hz */
#elif CONFIG_RTC_CLK_SRC_EXT_CRYS
#define RTC_FREQ_N (32768) /* in Hz */ #define RTC_FREQ_N (32768) /* in Hz */
#else
#define RTC_FREQ_N (32000) /* in Hz */
#endif
#endif /* CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL */
#define BLE_LL_TX_PWR_DBM_N (9) #define BLE_LL_TX_PWR_DBM_N (9)

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@@ -525,3 +525,7 @@ config BT_LE_SCAN_DUPL_CACHE_REFRESH_PERIOD
add new device information. add new device information.
2. When the refresh period is up, the controller will clear all device information and start filtering 2. When the refresh period is up, the controller will clear all device information and start filtering
again. again.
config BT_LE_MSYS_INIT_IN_CONTROLLER
bool
default y

View File

@@ -75,7 +75,6 @@
#define ACL_DATA_MBUF_LEADINGSPCAE 4 #define ACL_DATA_MBUF_LEADINGSPCAE 4
#endif // CONFIG_BT_BLUEDROID_ENABLED #endif // CONFIG_BT_BLUEDROID_ENABLED
/* Types definition /* Types definition
************************************************************************ ************************************************************************
*/ */
@@ -134,19 +133,18 @@ extern int esp_ble_ll_set_public_addr(const uint8_t *addr);
extern int esp_register_npl_funcs (struct npl_funcs_t *p_npl_func); extern int esp_register_npl_funcs (struct npl_funcs_t *p_npl_func);
extern void esp_unregister_npl_funcs (void); extern void esp_unregister_npl_funcs (void);
extern void npl_freertos_mempool_deinit(void); extern void npl_freertos_mempool_deinit(void);
extern int os_msys_buf_alloc(void);
extern uint32_t r_os_cputime_get32(void); extern uint32_t r_os_cputime_get32(void);
extern uint32_t r_os_cputime_ticks_to_usecs(uint32_t ticks); extern uint32_t r_os_cputime_ticks_to_usecs(uint32_t ticks);
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
extern const sleep_retention_entries_config_t *esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra); extern const sleep_retention_entries_config_t *esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra);
extern void esp_ble_set_wakeup_overhead(uint32_t overhead); extern void esp_ble_set_wakeup_overhead(uint32_t overhead);
#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */ #endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
// extern void esp_ble_change_rtc_freq(uint32_t freq); extern void esp_ble_change_rtc_freq(uint32_t freq);
extern void ble_lll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg, extern void ble_lll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg,
void *w_arg, uint32_t us_to_enabled); void *w_arg, uint32_t us_to_enabled);
extern void r_ble_rtc_wake_up_state_clr(void); extern void r_ble_rtc_wake_up_state_clr(void);
extern int os_msys_init(void); extern int os_msys_init(void);
extern void os_msys_buf_free(void); extern void os_msys_deinit(void);
extern int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x, extern int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x,
const uint8_t *peer_pub_key_y, const uint8_t *peer_pub_key_y,
const uint8_t *our_priv_key, uint8_t *out_dhkey); const uint8_t *our_priv_key, uint8_t *out_dhkey);
@@ -539,7 +537,7 @@ static void sleep_modem_ble_mac_modem_state_deinit(void)
void sleep_modem_light_sleep_overhead_set(uint32_t overhead) void sleep_modem_light_sleep_overhead_set(uint32_t overhead)
{ {
esp_ble_set_wakeup_overhead(overhead - 500); esp_ble_set_wakeup_overhead(overhead);
} }
#endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE #endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
@@ -684,7 +682,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
uint8_t mac[6]; uint8_t mac[6];
esp_err_t ret = ESP_OK; esp_err_t ret = ESP_OK;
ble_npl_count_info_t npl_info; ble_npl_count_info_t npl_info;
bool use_main_xtal = false; uint32_t slow_clk_freq = 0;
memset(&npl_info, 0, sizeof(ble_npl_count_info_t)); memset(&npl_info, 0, sizeof(ble_npl_count_info_t));
if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) { if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
@@ -725,15 +723,6 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
goto free_mem; goto free_mem;
} }
/* Initialize the global memory pool */
ret = os_msys_buf_alloc();
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "os msys alloc failed");
goto free_mem;
}
os_msys_init();
#if CONFIG_BT_NIMBLE_ENABLED #if CONFIG_BT_NIMBLE_ENABLED
/* ble_npl_eventq_init() needs to use npl functions in rom and /* ble_npl_eventq_init() needs to use npl functions in rom and
* must be called after esp_bt_controller_init(). * must be called after esp_bt_controller_init().
@@ -745,21 +734,26 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
modem_clock_module_enable(PERIPH_BT_MODULE); modem_clock_module_enable(PERIPH_BT_MODULE);
#if CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL #if CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL
esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL); esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL);
slow_clk_freq = 100000;
#else #else
#if CONFIG_RTC_CLK_SRC_INT_RC #if CONFIG_RTC_CLK_SRC_INT_RC
esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_RC_SLOW); esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_RC_SLOW);
slow_clk_freq = 30000;
#elif CONFIG_RTC_CLK_SRC_EXT_CRYS #elif CONFIG_RTC_CLK_SRC_EXT_CRYS
if (rtc_clk_slow_src_get() == SOC_RTC_SLOW_CLK_SRC_XTAL32K) { if (rtc_clk_slow_src_get() == SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_XTAL32K); esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_XTAL32K);
slow_clk_freq = 32768;
} else { } else {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "32.768kHz XTAL not detected, fall back to main XTAL as Bluetooth sleep clock"); ESP_LOGW(NIMBLE_PORT_LOG_TAG, "32.768kHz XTAL not detected, fall back to main XTAL as Bluetooth sleep clock");
esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL); esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL);
use_main_xtal = true; slow_clk_freq = 100000;
} }
#elif CONFIG_RTC_CLK_SRC_INT_RC32K #elif CONFIG_RTC_CLK_SRC_INT_RC32K
esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_RC32K); esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_RC32K);
slow_clk_freq = 32000;
#elif CONFIG_RTC_CLK_SRC_EXT_OSC #elif CONFIG_RTC_CLK_SRC_EXT_OSC
esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_EXT32K); esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_EXT32K);
slow_clk_freq = 32000;
#else #else
ESP_LOGE(NIMBLE_PORT_LOG_TAG, "Unsupported clock source"); ESP_LOGE(NIMBLE_PORT_LOG_TAG, "Unsupported clock source");
assert(0); assert(0);
@@ -782,10 +776,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
goto modem_deint; goto modem_deint;
} }
if (use_main_xtal) { esp_ble_change_rtc_freq(slow_clk_freq);
// esp_ble_change_rtc_freq(100000);
}
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
interface_func_t bt_controller_log_interface; interface_func_t bt_controller_log_interface;
bt_controller_log_interface = esp_bt_controller_log_interface; bt_controller_log_interface = esp_bt_controller_log_interface;
@@ -802,6 +793,12 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
ble_controller_scan_duplicate_config(); ble_controller_scan_duplicate_config();
ret = os_msys_init();
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "msys_init failed %d", ret);
goto free_controller;
}
ret = controller_sleep_init(); ret = controller_sleep_init();
if (ret != ESP_OK) { if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "controller_sleep_init failed %d", ret); ESP_LOGW(NIMBLE_PORT_LOG_TAG, "controller_sleep_init failed %d", ret);
@@ -824,6 +821,7 @@ free_controller:
controller_init_err: controller_init_err:
ble_log_deinit_async(); ble_log_deinit_async();
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
os_msys_deinit();
ble_controller_deinit(); ble_controller_deinit();
modem_deint: modem_deint:
modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE); modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
@@ -832,7 +830,6 @@ modem_deint:
ble_npl_eventq_deinit(nimble_port_get_dflt_eventq()); ble_npl_eventq_deinit(nimble_port_get_dflt_eventq());
#endif // CONFIG_BT_NIMBLE_ENABLED #endif // CONFIG_BT_NIMBLE_ENABLED
free_mem: free_mem:
os_msys_buf_free();
npl_freertos_mempool_deinit(); npl_freertos_mempool_deinit();
esp_unregister_npl_funcs(); esp_unregister_npl_funcs();
npl_freertos_funcs_deinit(); npl_freertos_funcs_deinit();
@@ -850,6 +847,8 @@ esp_err_t esp_bt_controller_deinit(void)
controller_sleep_deinit(); controller_sleep_deinit();
os_msys_deinit();
modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE); modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
modem_clock_module_disable(PERIPH_BT_MODULE); modem_clock_module_disable(PERIPH_BT_MODULE);
@@ -863,8 +862,6 @@ esp_err_t esp_bt_controller_deinit(void)
ble_npl_eventq_deinit(nimble_port_get_dflt_eventq()); ble_npl_eventq_deinit(nimble_port_get_dflt_eventq());
#endif // CONFIG_BT_NIMBLE_ENABLED #endif // CONFIG_BT_NIMBLE_ENABLED
os_msys_buf_free();
esp_unregister_npl_funcs(); esp_unregister_npl_funcs();
esp_unregister_ext_funcs(); esp_unregister_ext_funcs();

View File

@@ -196,17 +196,7 @@ extern "C" {
#define BLE_LL_CONN_DEF_AUTH_PYLD_TMO_N (3000) #define BLE_LL_CONN_DEF_AUTH_PYLD_TMO_N (3000)
#if CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL
#define RTC_FREQ_N (100000) /* in Hz */
#else
#if CONFIG_RTC_CLK_SRC_INT_RC
#define RTC_FREQ_N (30000) /* in Hz */
#elif CONFIG_RTC_CLK_SRC_EXT_CRYS
#define RTC_FREQ_N (32768) /* in Hz */ #define RTC_FREQ_N (32768) /* in Hz */
#else
#define RTC_FREQ_N (32000) /* in Hz */
#endif
#endif /* CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL */
#define BLE_LL_TX_PWR_DBM_N (9) #define BLE_LL_TX_PWR_DBM_N (9)

View File

@@ -48,9 +48,12 @@ static STAILQ_HEAD(, os_mbuf_pool) g_msys_pool_list =
#define SYSINIT_MSYS_1_MEMPOOL_SIZE \ #define SYSINIT_MSYS_1_MEMPOOL_SIZE \
OS_MEMPOOL_SIZE(OS_MSYS_1_BLOCK_COUNT, \ OS_MEMPOOL_SIZE(OS_MSYS_1_BLOCK_COUNT, \
SYSINIT_MSYS_1_MEMBLOCK_SIZE) SYSINIT_MSYS_1_MEMBLOCK_SIZE)
#if !CONFIG_BT_LE_MSYS_INIT_IN_CONTROLLER
static os_membuf_t *os_msys_init_1_data; static os_membuf_t *os_msys_init_1_data;
static struct os_mbuf_pool os_msys_init_1_mbuf_pool; static struct os_mbuf_pool os_msys_init_1_mbuf_pool;
static struct os_mempool os_msys_init_1_mempool; static struct os_mempool os_msys_init_1_mempool;
#endif // !CONFIG_BT_LE_MSYS_INIT_IN_CONTROLLER
#endif #endif
#if OS_MSYS_2_BLOCK_COUNT > 0 #if OS_MSYS_2_BLOCK_COUNT > 0
@@ -59,18 +62,32 @@ static struct os_mempool os_msys_init_1_mempool;
#define SYSINIT_MSYS_2_MEMPOOL_SIZE \ #define SYSINIT_MSYS_2_MEMPOOL_SIZE \
OS_MEMPOOL_SIZE(OS_MSYS_2_BLOCK_COUNT, \ OS_MEMPOOL_SIZE(OS_MSYS_2_BLOCK_COUNT, \
SYSINIT_MSYS_2_MEMBLOCK_SIZE) SYSINIT_MSYS_2_MEMBLOCK_SIZE)
#if !CONFIG_BT_LE_MSYS_INIT_IN_CONTROLLER
static os_membuf_t *os_msys_init_2_data; static os_membuf_t *os_msys_init_2_data;
static struct os_mbuf_pool os_msys_init_2_mbuf_pool; static struct os_mbuf_pool os_msys_init_2_mbuf_pool;
static struct os_mempool os_msys_init_2_mempool; static struct os_mempool os_msys_init_2_mempool;
#endif // !CONFIG_BT_LE_MSYS_INIT_IN_CONTROLLER
#endif #endif
#define OS_MSYS_SANITY_ENABLED \ #if CONFIG_BT_LE_MSYS_INIT_IN_CONTROLLER
(OS_MSYS_1_SANITY_MIN_COUNT > 0 || \ extern int esp_ble_msys_init(uint16_t msys_size1, uint16_t msys_size2, uint16_t msys_cnt1, uint16_t msys_cnt2);
OS_MSYS_2_SANITY_MIN_COUNT > 0) extern void esp_ble_msys_deinit(void);
#if OS_MSYS_SANITY_ENABLED int os_msys_init(void)
static struct os_sanity_check os_msys_sc; {
#endif return esp_ble_msys_init(SYSINIT_MSYS_1_MEMBLOCK_SIZE,
SYSINIT_MSYS_2_MEMBLOCK_SIZE,
OS_MSYS_1_BLOCK_COUNT,
OS_MSYS_2_BLOCK_COUNT);
}
void os_msys_deinit(void)
{
esp_ble_msys_deinit();
}
#else // CONFIG_BT_LE_MSYS_INIT_IN_CONTROLLER
#if OS_MSYS_SANITY_ENABLED #if OS_MSYS_SANITY_ENABLED
@@ -208,3 +225,4 @@ void os_msys_init(void)
SYSINIT_PANIC_ASSERT(rc == 0); SYSINIT_PANIC_ASSERT(rc == 0);
#endif #endif
} }
#endif // CONFIG_BT_LE_MSYS_INIT_IN_CONTROLLER