From 92ed77933b290d864315e2bbf5906ae70eeca2b1 Mon Sep 17 00:00:00 2001 From: Song Ruo Jing Date: Tue, 6 Aug 2024 21:55:21 +0800 Subject: [PATCH] refactor(clk): deprecate SOC_RTC_FAST_CLK_SRC_XTAL_DIV --- .../src/bootloader_clock_init.c | 2 +- .../port/esp32/include/soc/rtc.h | 2 +- .../port/esp32c2/include/soc/rtc.h | 2 +- .../port/esp32c3/include/soc/rtc.h | 2 +- .../port/esp32c6/include/soc/rtc.h | 2 +- .../port/esp32h2/include/soc/rtc.h | 2 +- .../port/esp32s2/include/soc/rtc.h | 2 +- .../port/esp32s3/include/soc/rtc.h | 2 +- .../esp_hw_support/port/esp_clk_tree_common.c | 20 +++++++++---------- .../soc/esp32/include/soc/Kconfig.soc_caps.in | 4 ++++ .../soc/esp32/include/soc/clk_tree_defs.h | 7 +++++-- components/soc/esp32/include/soc/soc_caps.h | 2 ++ .../esp32c2/include/soc/Kconfig.soc_caps.in | 4 ++++ .../soc/esp32c2/include/soc/clk_tree_defs.h | 7 +++++-- components/soc/esp32c2/include/soc/soc_caps.h | 2 ++ .../esp32c3/include/soc/Kconfig.soc_caps.in | 4 ++++ .../soc/esp32c3/include/soc/clk_tree_defs.h | 7 +++++-- components/soc/esp32c3/include/soc/soc_caps.h | 2 ++ .../esp32c5/include/soc/Kconfig.soc_caps.in | 4 ++++ .../soc/esp32c5/include/soc/clk_tree_defs.h | 3 ++- components/soc/esp32c5/include/soc/soc_caps.h | 2 ++ .../esp32c6/include/soc/Kconfig.soc_caps.in | 4 ++++ .../soc/esp32c6/include/soc/clk_tree_defs.h | 5 ++++- components/soc/esp32c6/include/soc/soc_caps.h | 2 ++ .../esp32c61/include/soc/Kconfig.soc_caps.in | 4 ++++ .../soc/esp32c61/include/soc/clk_tree_defs.h | 3 ++- .../soc/esp32c61/include/soc/soc_caps.h | 2 ++ .../esp32h2/include/soc/Kconfig.soc_caps.in | 4 ++++ .../soc/esp32h2/include/soc/clk_tree_defs.h | 5 ++++- components/soc/esp32h2/include/soc/soc_caps.h | 3 ++- .../soc/esp32p4/include/soc/clk_tree_defs.h | 9 ++++++--- components/soc/esp32p4/include/soc/soc_caps.h | 1 - .../esp32s2/include/soc/Kconfig.soc_caps.in | 4 ++++ .../soc/esp32s2/include/soc/clk_tree_defs.h | 7 +++++-- components/soc/esp32s2/include/soc/soc_caps.h | 2 ++ .../esp32s3/include/soc/Kconfig.soc_caps.in | 4 ++++ .../soc/esp32s3/include/soc/clk_tree_defs.h | 7 +++++-- components/soc/esp32s3/include/soc/soc_caps.h | 2 ++ 38 files changed, 115 insertions(+), 37 deletions(-) diff --git a/components/bootloader_support/src/bootloader_clock_init.c b/components/bootloader_support/src/bootloader_clock_init.c index 8099aa4955..e5e258a44e 100644 --- a/components/bootloader_support/src/bootloader_clock_init.c +++ b/components/bootloader_support/src/bootloader_clock_init.c @@ -64,7 +64,7 @@ __attribute__((weak)) void bootloader_clock_configure(void) // RTC_FAST clock source will be switched to RC_FAST at application startup clk_cfg.fast_clk_src = rtc_clk_fast_src_get(); if (clk_cfg.fast_clk_src == SOC_RTC_FAST_CLK_SRC_INVALID) { - clk_cfg.fast_clk_src = SOC_RTC_FAST_CLK_SRC_XTAL_DIV; + clk_cfg.fast_clk_src = SOC_RTC_FAST_CLK_SRC_DEFAULT; } #if CONFIG_IDF_TARGET_ESP32C6 diff --git a/components/esp_hw_support/port/esp32/include/soc/rtc.h b/components/esp_hw_support/port/esp32/include/soc/rtc.h index 22f7cfe157..0c0afc20dd 100644 --- a/components/esp_hw_support/port/esp32/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32/include/soc/rtc.h @@ -726,7 +726,7 @@ typedef soc_rtc_slow_clk_src_t rtc_slow_freq_t; * @brief RTC FAST_CLK frequency values */ typedef soc_rtc_fast_clk_src_t rtc_fast_freq_t; -#define RTC_FAST_FREQ_XTALD4 SOC_RTC_FAST_CLK_SRC_XTAL_DIV //!< Main XTAL, divided by 4 +#define RTC_FAST_FREQ_XTALD4 SOC_RTC_FAST_CLK_SRC_XTAL_D4 //!< Main XTAL, divided by 4 #define RTC_FAST_FREQ_8M SOC_RTC_FAST_CLK_SRC_RC_FAST //!< Internal 8 MHz RC oscillator /** diff --git a/components/esp_hw_support/port/esp32c2/include/soc/rtc.h b/components/esp_hw_support/port/esp32c2/include/soc/rtc.h index 9f8d412f59..40f1c8a637 100644 --- a/components/esp_hw_support/port/esp32c2/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32c2/include/soc/rtc.h @@ -715,7 +715,7 @@ typedef soc_rtc_slow_clk_src_t rtc_slow_freq_t; * @brief RTC FAST_CLK frequency values */ typedef soc_rtc_fast_clk_src_t rtc_fast_freq_t; -#define RTC_FAST_FREQ_XTALD4 SOC_RTC_FAST_CLK_SRC_XTAL_DIV //!< Main XTAL, divided by 2 +#define RTC_FAST_FREQ_XTALD4 SOC_RTC_FAST_CLK_SRC_XTAL_D2 //!< Main XTAL, divided by 2 #define RTC_FAST_FREQ_8M SOC_RTC_FAST_CLK_SRC_RC_FAST //!< Internal 17.5 MHz RC oscillator /** diff --git a/components/esp_hw_support/port/esp32c3/include/soc/rtc.h b/components/esp_hw_support/port/esp32c3/include/soc/rtc.h index 58a26dd41e..e18fda176e 100644 --- a/components/esp_hw_support/port/esp32c3/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32c3/include/soc/rtc.h @@ -784,7 +784,7 @@ typedef soc_rtc_slow_clk_src_t rtc_slow_freq_t; * @brief RTC FAST_CLK frequency values */ typedef soc_rtc_fast_clk_src_t rtc_fast_freq_t; -#define RTC_FAST_FREQ_XTALD4 SOC_RTC_FAST_CLK_SRC_XTAL_DIV //!< Main XTAL, divided by 2 +#define RTC_FAST_FREQ_XTALD4 SOC_RTC_FAST_CLK_SRC_XTAL_D2 //!< Main XTAL, divided by 2 #define RTC_FAST_FREQ_8M SOC_RTC_FAST_CLK_SRC_RC_FAST //!< Internal 17.5 MHz RC oscillator /** diff --git a/components/esp_hw_support/port/esp32c6/include/soc/rtc.h b/components/esp_hw_support/port/esp32c6/include/soc/rtc.h index 3880b325e5..ae0a4ea43b 100644 --- a/components/esp_hw_support/port/esp32c6/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32c6/include/soc/rtc.h @@ -465,7 +465,7 @@ typedef soc_rtc_slow_clk_src_t rtc_slow_freq_t; * @brief RTC FAST_CLK frequency values */ typedef soc_rtc_fast_clk_src_t rtc_fast_freq_t; -#define RTC_FAST_FREQ_XTALD4 SOC_RTC_FAST_CLK_SRC_XTAL_DIV //!< Main XTAL, divided by 2 +#define RTC_FAST_FREQ_XTALD4 SOC_RTC_FAST_CLK_SRC_XTAL_D2 //!< Main XTAL, divided by 2 #define RTC_FAST_FREQ_8M SOC_RTC_FAST_CLK_SRC_RC_FAST //!< Internal 17.5 MHz RC oscillator /** diff --git a/components/esp_hw_support/port/esp32h2/include/soc/rtc.h b/components/esp_hw_support/port/esp32h2/include/soc/rtc.h index fa820b48d8..9934431037 100644 --- a/components/esp_hw_support/port/esp32h2/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32h2/include/soc/rtc.h @@ -462,7 +462,7 @@ typedef soc_rtc_slow_clk_src_t rtc_slow_freq_t; * @brief RTC FAST_CLK frequency values */ typedef soc_rtc_fast_clk_src_t rtc_fast_freq_t; -#define RTC_FAST_FREQ_XTALD4 SOC_RTC_FAST_CLK_SRC_XTAL_DIV //!< Main XTAL, divided by 2 +#define RTC_FAST_FREQ_XTALD4 SOC_RTC_FAST_CLK_SRC_XTAL_D2 //!< Main XTAL, divided by 2 #define RTC_FAST_FREQ_8M SOC_RTC_FAST_CLK_SRC_RC_FAST //!< Internal 8 MHz RC oscillator /** diff --git a/components/esp_hw_support/port/esp32s2/include/soc/rtc.h b/components/esp_hw_support/port/esp32s2/include/soc/rtc.h index 5a3dda4844..ca648bc782 100644 --- a/components/esp_hw_support/port/esp32s2/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32s2/include/soc/rtc.h @@ -864,7 +864,7 @@ typedef soc_rtc_slow_clk_src_t rtc_slow_freq_t; * @brief RTC FAST_CLK frequency values */ typedef soc_rtc_fast_clk_src_t rtc_fast_freq_t; -#define RTC_FAST_FREQ_XTALD4 SOC_RTC_FAST_CLK_SRC_XTAL_DIV //!< Main XTAL, divided by 4 +#define RTC_FAST_FREQ_XTALD4 SOC_RTC_FAST_CLK_SRC_XTAL_D4 //!< Main XTAL, divided by 4 #define RTC_FAST_FREQ_8M SOC_RTC_FAST_CLK_SRC_RC_FAST //!< Internal 8 MHz RC oscillator /** diff --git a/components/esp_hw_support/port/esp32s3/include/soc/rtc.h b/components/esp_hw_support/port/esp32s3/include/soc/rtc.h index 27a4845f5f..4f914d6e88 100644 --- a/components/esp_hw_support/port/esp32s3/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32s3/include/soc/rtc.h @@ -842,7 +842,7 @@ typedef soc_rtc_slow_clk_src_t rtc_slow_freq_t; * @brief RTC FAST_CLK frequency values */ typedef soc_rtc_fast_clk_src_t rtc_fast_freq_t; -#define RTC_FAST_FREQ_XTALD4 SOC_RTC_FAST_CLK_SRC_XTAL_DIV //!< Main XTAL, divided by 2 +#define RTC_FAST_FREQ_XTALD4 SOC_RTC_FAST_CLK_SRC_XTAL_D2 //!< Main XTAL, divided by 2 #define RTC_FAST_FREQ_8M SOC_RTC_FAST_CLK_SRC_RC_FAST //!< Internal 17.5 MHz RC oscillator /** diff --git a/components/esp_hw_support/port/esp_clk_tree_common.c b/components/esp_hw_support/port/esp_clk_tree_common.c index 6a971e2468..20012d4930 100644 --- a/components/esp_hw_support/port/esp_clk_tree_common.c +++ b/components/esp_hw_support/port/esp_clk_tree_common.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -177,23 +177,23 @@ uint32_t esp_clk_tree_rc_fast_get_freq_hz(esp_clk_tree_src_freq_precision_t prec uint32_t esp_clk_tree_lp_fast_get_freq_hz(esp_clk_tree_src_freq_precision_t precision) { switch (clk_ll_rtc_fast_get_src()) { - case SOC_RTC_FAST_CLK_SRC_XTAL_DIV: -#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 //SOC_RTC_FAST_CLK_SRC_XTAL_D4 - return clk_hal_xtal_get_freq_mhz() * MHZ >> 2; -#elif CONFIG_IDF_TARGET_ESP32P4 //SOC_RTC_FAST_CLK_SRC_XTAL - return clk_hal_xtal_get_freq_mhz() * MHZ; -#else //SOC_RTC_FAST_CLK_SRC_XTAL_D2 - return clk_hal_xtal_get_freq_mhz() * MHZ >> 1; -#endif case SOC_RTC_FAST_CLK_SRC_RC_FAST: return esp_clk_tree_rc_fast_get_freq_hz(precision) / clk_ll_rc_fast_get_divider(); #if SOC_CLK_LP_FAST_SUPPORT_LP_PLL case SOC_RTC_FAST_CLK_SRC_LP_PLL: return clk_ll_lp_pll_get_freq_mhz() * MHZ; #endif -#if SOC_CLK_LP_FAST_SUPPORT_XTAL && !CONFIG_IDF_TARGET_ESP32P4 // On P4 SOC_RTC_FAST_CLK_SRC_XTAL is an alias for SOC_RTC_FAST_CLK_SRC_XTAL_DIV +#if SOC_CLK_LP_FAST_SUPPORT_XTAL case SOC_RTC_FAST_CLK_SRC_XTAL: return clk_hal_xtal_get_freq_mhz() * MHZ; +#endif +#if SOC_CLK_LP_FAST_SUPPORT_XTAL_D2 + case SOC_RTC_FAST_CLK_SRC_XTAL_D2: + return clk_hal_xtal_get_freq_mhz() * MHZ >> 1; +#endif +#if SOC_CLK_LP_FAST_SUPPORT_XTAL_D4 + case SOC_RTC_FAST_CLK_SRC_XTAL_D4: + return clk_hal_xtal_get_freq_mhz() * MHZ >> 2; #endif default: // Invalid clock source diff --git a/components/soc/esp32/include/soc/Kconfig.soc_caps.in b/components/soc/esp32/include/soc/Kconfig.soc_caps.in index 625599f4a6..2279f424d1 100644 --- a/components/soc/esp32/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32/include/soc/Kconfig.soc_caps.in @@ -899,6 +899,10 @@ config SOC_CLK_XTAL32K_SUPPORTED bool default y +config SOC_CLK_LP_FAST_SUPPORT_XTAL_D4 + bool + default y + config SOC_SDMMC_USE_IOMUX bool default y diff --git a/components/soc/esp32/include/soc/clk_tree_defs.h b/components/soc/esp32/include/soc/clk_tree_defs.h index 9e843c28c4..c0b0a8d194 100644 --- a/components/soc/esp32/include/soc/clk_tree_defs.h +++ b/components/soc/esp32/include/soc/clk_tree_defs.h @@ -21,7 +21,7 @@ extern "C" { * * 2) External 2~40MHz Crystal Clock: XTAL * - * 3) Internal 150kHz RC Oscillator: RC_SLOW (usually referrred as RTC in TRM or reg. description) + * 3) Internal 150kHz RC Oscillator: RC_SLOW (usually referred as RTC in TRM or reg. description) * * This RC oscillator generates a ~150kHz clock signal output as the RC_SLOW_CLK. The exact frequency of this clock * can be computed in runtime through calibration. @@ -86,9 +86,12 @@ typedef enum { */ typedef enum { SOC_RTC_FAST_CLK_SRC_XTAL_D4 = 0, /*!< Select XTAL_D4_CLK (may referred as XTAL_CLK_DIV_4) as RTC_FAST_CLK source */ - SOC_RTC_FAST_CLK_SRC_XTAL_DIV = SOC_RTC_FAST_CLK_SRC_XTAL_D4, /*!< Alias name for `SOC_RTC_FAST_CLK_SRC_XTAL_D4` */ SOC_RTC_FAST_CLK_SRC_RC_FAST = 1, /*!< Select RC_FAST_CLK as RTC_FAST_CLK source */ SOC_RTC_FAST_CLK_SRC_INVALID, /*!< Invalid RTC_FAST_CLK source */ + + SOC_RTC_FAST_CLK_SRC_DEFAULT = SOC_RTC_FAST_CLK_SRC_XTAL_D4, /*!< XTAL_D4_CLK is the default clock source for RTC_FAST_CLK */ + + SOC_RTC_FAST_CLK_SRC_XTAL_DIV __attribute__((deprecated)) = SOC_RTC_FAST_CLK_SRC_XTAL_D4, /*!< Alias name for `SOC_RTC_FAST_CLK_SRC_XTAL_D4` */ } soc_rtc_fast_clk_src_t; /** diff --git a/components/soc/esp32/include/soc/soc_caps.h b/components/soc/esp32/include/soc/soc_caps.h index 4189522ce1..22364a4221 100644 --- a/components/soc/esp32/include/soc/soc_caps.h +++ b/components/soc/esp32/include/soc/soc_caps.h @@ -426,6 +426,8 @@ #define SOC_CLK_XTAL32K_SUPPORTED (1) /*!< Support to connect an external low frequency crystal */ +#define SOC_CLK_LP_FAST_SUPPORT_XTAL_D4 (1) /*!< Support XTAL_D4 clock as the LP_FAST clock source */ + /*-------------------------- SDMMC CAPS -----------------------------------------*/ /* On ESP32, clock/cmd/data pins use IO MUX. diff --git a/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in index 6bf5970c6c..47ff2ad605 100644 --- a/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in @@ -755,6 +755,10 @@ config SOC_CLK_OSC_SLOW_SUPPORTED bool default y +config SOC_CLK_LP_FAST_SUPPORT_XTAL_D2 + bool + default y + config SOC_WIFI_HW_TSF bool default y diff --git a/components/soc/esp32c2/include/soc/clk_tree_defs.h b/components/soc/esp32c2/include/soc/clk_tree_defs.h index 1d7a2cfe5f..9b9f1a46f3 100644 --- a/components/soc/esp32c2/include/soc/clk_tree_defs.h +++ b/components/soc/esp32c2/include/soc/clk_tree_defs.h @@ -21,7 +21,7 @@ extern "C" { * * 2) External 26/40MHz Crystal Clock: XTAL * - * 3) Internal 136kHz RC Oscillator: RC_SLOW (usually referrred as RTC in TRM or reg. description) + * 3) Internal 136kHz RC Oscillator: RC_SLOW (usually referred as RTC in TRM or reg. description) * * This RC oscillator generates a ~136kHz clock signal output as the RC_SLOW_CLK. The exact frequency of this clock * can be computed in runtime through calibration. @@ -82,9 +82,12 @@ typedef enum { */ typedef enum { SOC_RTC_FAST_CLK_SRC_XTAL_D2 = 0, /*!< Select XTAL_D2_CLK (may referred as XTAL_CLK_DIV_2) as RTC_FAST_CLK source */ - SOC_RTC_FAST_CLK_SRC_XTAL_DIV = SOC_RTC_FAST_CLK_SRC_XTAL_D2, /*!< Alias name for `SOC_RTC_FAST_CLK_SRC_XTAL_D2` */ SOC_RTC_FAST_CLK_SRC_RC_FAST = 1, /*!< Select RC_FAST_CLK as RTC_FAST_CLK source */ SOC_RTC_FAST_CLK_SRC_INVALID, /*!< Invalid RTC_FAST_CLK source */ + + SOC_RTC_FAST_CLK_SRC_DEFAULT = SOC_RTC_FAST_CLK_SRC_XTAL_D2, /*!< XTAL_D2_CLK is the default clock source for RTC_FAST_CLK */ + + SOC_RTC_FAST_CLK_SRC_XTAL_DIV __attribute__((deprecated)) = SOC_RTC_FAST_CLK_SRC_XTAL_D2, /*!< Alias name for `SOC_RTC_FAST_CLK_SRC_XTAL_D2` */ } soc_rtc_fast_clk_src_t; /** diff --git a/components/soc/esp32c2/include/soc/soc_caps.h b/components/soc/esp32c2/include/soc/soc_caps.h index 83b6c936e6..3cd251ac81 100644 --- a/components/soc/esp32c2/include/soc/soc_caps.h +++ b/components/soc/esp32c2/include/soc/soc_caps.h @@ -336,6 +336,8 @@ #define SOC_CLK_OSC_SLOW_SUPPORTED (1) /*!< ESP32C2 only supports to connect an external oscillator, not a crystal */ +#define SOC_CLK_LP_FAST_SUPPORT_XTAL_D2 (1) /*!< Support XTAL_D2 clock as the LP_FAST clock source */ + /*------------------------------------ WI-FI CAPS ------------------------------------*/ #define SOC_WIFI_HW_TSF (1) /*!< Support hardware TSF */ #define SOC_WIFI_FTM_SUPPORT (1) /*!< Support FTM */ diff --git a/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in index fd1b0f21b4..3ad7bc6afd 100644 --- a/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in @@ -1075,6 +1075,10 @@ config SOC_CLK_XTAL32K_SUPPORTED bool default y +config SOC_CLK_LP_FAST_SUPPORT_XTAL_D2 + bool + default y + config SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC bool default y diff --git a/components/soc/esp32c3/include/soc/clk_tree_defs.h b/components/soc/esp32c3/include/soc/clk_tree_defs.h index 4aa6e8f753..901f3fa513 100644 --- a/components/soc/esp32c3/include/soc/clk_tree_defs.h +++ b/components/soc/esp32c3/include/soc/clk_tree_defs.h @@ -21,7 +21,7 @@ extern "C" { * * 2) External 40MHz Crystal Clock: XTAL * - * 3) Internal 136kHz RC Oscillator: RC_SLOW (usually referrred as RTC in TRM or reg. description) + * 3) Internal 136kHz RC Oscillator: RC_SLOW (usually referred as RTC in TRM or reg. description) * * This RC oscillator generates a ~136kHz clock signal output as the RC_SLOW_CLK. The exact frequency of this clock * can be computed in runtime through calibration. @@ -83,9 +83,12 @@ typedef enum { */ typedef enum { SOC_RTC_FAST_CLK_SRC_XTAL_D2 = 0, /*!< Select XTAL_D2_CLK (may referred as XTAL_CLK_DIV_2) as RTC_FAST_CLK source */ - SOC_RTC_FAST_CLK_SRC_XTAL_DIV = SOC_RTC_FAST_CLK_SRC_XTAL_D2, /*!< Alias name for `SOC_RTC_FAST_CLK_SRC_XTAL_D2` */ SOC_RTC_FAST_CLK_SRC_RC_FAST = 1, /*!< Select RC_FAST_CLK as RTC_FAST_CLK source */ SOC_RTC_FAST_CLK_SRC_INVALID, /*!< Invalid RTC_FAST_CLK source */ + + SOC_RTC_FAST_CLK_SRC_DEFAULT = SOC_RTC_FAST_CLK_SRC_XTAL_D2, /*!< XTAL_D2_CLK is the default clock source for RTC_FAST_CLK */ + + SOC_RTC_FAST_CLK_SRC_XTAL_DIV __attribute__((deprecated)) = SOC_RTC_FAST_CLK_SRC_XTAL_D2, /*!< Alias name for `SOC_RTC_FAST_CLK_SRC_XTAL_D2` */ } soc_rtc_fast_clk_src_t; /** diff --git a/components/soc/esp32c3/include/soc/soc_caps.h b/components/soc/esp32c3/include/soc/soc_caps.h index ab7f7b9317..bbe96291fc 100644 --- a/components/soc/esp32c3/include/soc/soc_caps.h +++ b/components/soc/esp32c3/include/soc/soc_caps.h @@ -450,6 +450,8 @@ #define SOC_CLK_XTAL32K_SUPPORTED (1) /*!< Support to connect an external low frequency crystal */ +#define SOC_CLK_LP_FAST_SUPPORT_XTAL_D2 (1) /*!< Support XTAL_D2 clock as the LP_FAST clock source */ + /*-------------------------- Temperature Sensor CAPS -------------------------------------*/ #define SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC (1) #define SOC_TEMPERATURE_SENSOR_SUPPORT_XTAL (1) diff --git a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in index e1ceec5368..5ffc5c4e9c 100644 --- a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in @@ -1419,6 +1419,10 @@ config SOC_CLK_LP_FAST_SUPPORT_XTAL bool default y +config SOC_CLK_LP_FAST_SUPPORT_XTAL_D2 + bool + default y + config SOC_RCC_IS_INDEPENDENT bool default y diff --git a/components/soc/esp32c5/include/soc/clk_tree_defs.h b/components/soc/esp32c5/include/soc/clk_tree_defs.h index b1955e2225..2f7d2e9717 100644 --- a/components/soc/esp32c5/include/soc/clk_tree_defs.h +++ b/components/soc/esp32c5/include/soc/clk_tree_defs.h @@ -92,9 +92,10 @@ typedef enum { typedef enum { SOC_RTC_FAST_CLK_SRC_RC_FAST = 0, /*!< Select RC_FAST_CLK as RTC_FAST_CLK source */ SOC_RTC_FAST_CLK_SRC_XTAL_D2 = 1, /*!< Select XTAL_D2_CLK as RTC_FAST_CLK source */ - SOC_RTC_FAST_CLK_SRC_XTAL_DIV = SOC_RTC_FAST_CLK_SRC_XTAL_D2, /*!< Alias name for `SOC_RTC_FAST_CLK_SRC_XTAL_D2` */ SOC_RTC_FAST_CLK_SRC_XTAL = 2, /*!< Select XTAL_CLK as RTC_FAST_CLK source */ SOC_RTC_FAST_CLK_SRC_INVALID, /*!< Invalid RTC_FAST_CLK source */ + + SOC_RTC_FAST_CLK_SRC_DEFAULT = SOC_RTC_FAST_CLK_SRC_XTAL_D2, /*!< XTAL_D2_CLK is the default clock source for RTC_FAST_CLK */ } soc_rtc_fast_clk_src_t; /** diff --git a/components/soc/esp32c5/include/soc/soc_caps.h b/components/soc/esp32c5/include/soc/soc_caps.h index 584cac7d54..39ee77e59b 100644 --- a/components/soc/esp32c5/include/soc/soc_caps.h +++ b/components/soc/esp32c5/include/soc/soc_caps.h @@ -593,6 +593,8 @@ #define SOC_CLK_XTAL32K_SUPPORTED (1) /*!< Support to connect an external low frequency crystal */ #define SOC_CLK_OSC_SLOW_SUPPORTED (1) /*!< Support to connect an external oscillator, not a crystal */ #define SOC_CLK_LP_FAST_SUPPORT_XTAL (1) /*!< Support XTAL clock as the LP_FAST clock source */ +#define SOC_CLK_LP_FAST_SUPPORT_XTAL_D2 (1) /*!< Support XTAL_D2 clock as the LP_FAST clock source */ + #define SOC_RCC_IS_INDEPENDENT 1 /*!< Reset and Clock Control is independent, thanks to the PCR registers */ /*-------------------------- Temperature Sensor CAPS -------------------------------------*/ diff --git a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in index a7626d57a7..1bb9e76b8b 100644 --- a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in @@ -1463,6 +1463,10 @@ config SOC_CLK_RC32K_SUPPORTED bool default y +config SOC_CLK_LP_FAST_SUPPORT_XTAL_D2 + bool + default y + config SOC_RCC_IS_INDEPENDENT bool default y diff --git a/components/soc/esp32c6/include/soc/clk_tree_defs.h b/components/soc/esp32c6/include/soc/clk_tree_defs.h index dba6e79df4..599ccba664 100644 --- a/components/soc/esp32c6/include/soc/clk_tree_defs.h +++ b/components/soc/esp32c6/include/soc/clk_tree_defs.h @@ -96,8 +96,11 @@ typedef enum { typedef enum { SOC_RTC_FAST_CLK_SRC_RC_FAST = 0, /*!< Select RC_FAST_CLK as RTC_FAST_CLK source */ SOC_RTC_FAST_CLK_SRC_XTAL_D2 = 1, /*!< Select XTAL_D2_CLK as RTC_FAST_CLK source */ - SOC_RTC_FAST_CLK_SRC_XTAL_DIV = SOC_RTC_FAST_CLK_SRC_XTAL_D2, /*!< Alias name for `SOC_RTC_FAST_CLK_SRC_XTAL_D2` */ SOC_RTC_FAST_CLK_SRC_INVALID, /*!< Invalid RTC_FAST_CLK source */ + + SOC_RTC_FAST_CLK_SRC_DEFAULT = SOC_RTC_FAST_CLK_SRC_XTAL_D2, /*!< XTAL_D2_CLK is the default clock source for RTC_FAST_CLK */ + + SOC_RTC_FAST_CLK_SRC_XTAL_DIV __attribute__((deprecated)) = SOC_RTC_FAST_CLK_SRC_XTAL_D2, /*!< Alias name for `SOC_RTC_FAST_CLK_SRC_XTAL_D2` */ } soc_rtc_fast_clk_src_t; /** diff --git a/components/soc/esp32c6/include/soc/soc_caps.h b/components/soc/esp32c6/include/soc/soc_caps.h index 0750f12c3f..a1f8cc0ea0 100644 --- a/components/soc/esp32c6/include/soc/soc_caps.h +++ b/components/soc/esp32c6/include/soc/soc_caps.h @@ -573,6 +573,8 @@ #define SOC_CLK_OSC_SLOW_SUPPORTED (1) /*!< Support to connect an external oscillator, not a crystal */ #define SOC_CLK_RC32K_SUPPORTED (1) /*!< Support an internal 32kHz RC oscillator */ +#define SOC_CLK_LP_FAST_SUPPORT_XTAL_D2 (1) /*!< Support XTAL_D2 clock as the LP_FAST clock source */ + #define SOC_RCC_IS_INDEPENDENT 1 /*!< Reset and Clock Control is independent, thanks to the PCR registers */ /*-------------------------- Temperature Sensor CAPS -------------------------------------*/ diff --git a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in index f31e21b610..573c03b936 100644 --- a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in @@ -1031,6 +1031,10 @@ config SOC_CLK_LP_FAST_SUPPORT_XTAL bool default y +config SOC_CLK_LP_FAST_SUPPORT_XTAL_D2 + bool + default y + config SOC_RCC_IS_INDEPENDENT bool default y diff --git a/components/soc/esp32c61/include/soc/clk_tree_defs.h b/components/soc/esp32c61/include/soc/clk_tree_defs.h index 2795d49981..fec2e781d5 100644 --- a/components/soc/esp32c61/include/soc/clk_tree_defs.h +++ b/components/soc/esp32c61/include/soc/clk_tree_defs.h @@ -89,9 +89,10 @@ typedef enum { typedef enum { SOC_RTC_FAST_CLK_SRC_RC_FAST = 0, /*!< Select RC_FAST_CLK as RTC_FAST_CLK source */ SOC_RTC_FAST_CLK_SRC_XTAL_D2 = 1, /*!< Select XTAL_D2_CLK as RTC_FAST_CLK source */ - SOC_RTC_FAST_CLK_SRC_XTAL_DIV = SOC_RTC_FAST_CLK_SRC_XTAL_D2, /*!< Alias name for `SOC_RTC_FAST_CLK_SRC_XTAL_D2` */ SOC_RTC_FAST_CLK_SRC_XTAL = 2, /*!< Select XTAL_CLK as RTC_FAST_CLK source */ SOC_RTC_FAST_CLK_SRC_INVALID, /*!< Invalid RTC_FAST_CLK source */ + + SOC_RTC_FAST_CLK_SRC_DEFAULT = SOC_RTC_FAST_CLK_SRC_XTAL_D2, /*!< XTAL_D2_CLK is the default clock source for RTC_FAST_CLK */ } soc_rtc_fast_clk_src_t; /** diff --git a/components/soc/esp32c61/include/soc/soc_caps.h b/components/soc/esp32c61/include/soc/soc_caps.h index bf10bbd7e1..b21b6ab516 100644 --- a/components/soc/esp32c61/include/soc/soc_caps.h +++ b/components/soc/esp32c61/include/soc/soc_caps.h @@ -463,6 +463,8 @@ #define SOC_CLK_XTAL32K_SUPPORTED (1) /*!< Support to connect an external low frequency crystal */ #define SOC_CLK_OSC_SLOW_SUPPORTED (1) /*!< Support to connect an external oscillator, not a crystal */ #define SOC_CLK_LP_FAST_SUPPORT_XTAL (1) /*!< Support XTAL clock as the LP_FAST clock source */ +#define SOC_CLK_LP_FAST_SUPPORT_XTAL_D2 (1) /*!< Support XTAL_D2 clock as the LP_FAST clock source */ + #define SOC_RCC_IS_INDEPENDENT 1 /*!< Reset and Clock Control is independent, thanks to the PCR registers */ /*-------------------------- Temperature Sensor CAPS -------------------------------------*/ diff --git a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in index f655023a99..eb946ae8c9 100644 --- a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in @@ -1423,6 +1423,10 @@ config SOC_CLK_LP_FAST_SUPPORT_LP_PLL bool default y +config SOC_CLK_LP_FAST_SUPPORT_XTAL_D2 + bool + default y + config SOC_MODEM_CLOCK_IS_INDEPENDENT bool default y diff --git a/components/soc/esp32h2/include/soc/clk_tree_defs.h b/components/soc/esp32h2/include/soc/clk_tree_defs.h index 52b69c6f19..22ea0a6bf0 100644 --- a/components/soc/esp32h2/include/soc/clk_tree_defs.h +++ b/components/soc/esp32h2/include/soc/clk_tree_defs.h @@ -97,9 +97,12 @@ typedef enum { typedef enum { SOC_RTC_FAST_CLK_SRC_RC_FAST = 0, /*!< Select RC_FAST_CLK as RTC_FAST_CLK source */ SOC_RTC_FAST_CLK_SRC_XTAL_D2 = 1, /*!< Select XTAL_D2_CLK (may referred as XTAL_CLK_DIV_2) as RTC_FAST_CLK source */ - SOC_RTC_FAST_CLK_SRC_XTAL_DIV = SOC_RTC_FAST_CLK_SRC_XTAL_D2, /*!< Alias name for `SOC_RTC_FAST_CLK_SRC_XTAL_D2` */ SOC_RTC_FAST_CLK_SRC_LP_PLL = 2, /*!< Select LP_PLL_CLK as RTC_FAST_CLK source (LP_PLL_CLK is a 8MHz clock sourced from RC32K or XTAL32K)*/ SOC_RTC_FAST_CLK_SRC_INVALID, /*!< Invalid RTC_FAST_CLK source */ + + SOC_RTC_FAST_CLK_SRC_DEFAULT = SOC_RTC_FAST_CLK_SRC_XTAL_D2, /*!< XTAL_D2_CLK is the default clock source for RTC_FAST_CLK */ + + SOC_RTC_FAST_CLK_SRC_XTAL_DIV __attribute__((deprecated)) = SOC_RTC_FAST_CLK_SRC_XTAL_D2, /*!< Alias name for `SOC_RTC_FAST_CLK_SRC_XTAL_D2` */ } soc_rtc_fast_clk_src_t; /** diff --git a/components/soc/esp32h2/include/soc/soc_caps.h b/components/soc/esp32h2/include/soc/soc_caps.h index 26252ef134..2ebae0d5d3 100644 --- a/components/soc/esp32h2/include/soc/soc_caps.h +++ b/components/soc/esp32h2/include/soc/soc_caps.h @@ -555,7 +555,8 @@ #define SOC_CLK_OSC_SLOW_SUPPORTED (1) /*!< Support to connect an external oscillator, not a crystal */ #define SOC_CLK_RC32K_SUPPORTED (1) /*!< Support an internal 32kHz RC oscillator */ -#define SOC_CLK_LP_FAST_SUPPORT_LP_PLL (1) /*!< Support LP_PLL clock as the LP_FAST clock source */ +#define SOC_CLK_LP_FAST_SUPPORT_LP_PLL (1) /*!< Support LP_PLL clock as the LP_FAST clock source */ +#define SOC_CLK_LP_FAST_SUPPORT_XTAL_D2 (1) /*!< Support XTAL_D2 clock as the LP_FAST clock source */ #define SOC_MODEM_CLOCK_IS_INDEPENDENT (1) #define SOC_RCC_IS_INDEPENDENT 1 /*!< Reset and Clock Control is independent, thanks to the PCR registers */ diff --git a/components/soc/esp32p4/include/soc/clk_tree_defs.h b/components/soc/esp32p4/include/soc/clk_tree_defs.h index 8e140f0571..d621c6c899 100644 --- a/components/soc/esp32p4/include/soc/clk_tree_defs.h +++ b/components/soc/esp32p4/include/soc/clk_tree_defs.h @@ -103,9 +103,12 @@ typedef enum { typedef enum { SOC_RTC_FAST_CLK_SRC_RC_FAST = 0, /*!< Select RC_FAST_CLK as RTC_FAST_CLK source */ SOC_RTC_FAST_CLK_SRC_XTAL = 1, /*!< Select XTAL_CLK as RTC_FAST_CLK source */ - SOC_RTC_FAST_CLK_SRC_XTAL_DIV = SOC_RTC_FAST_CLK_SRC_XTAL, /*!< Alias name for `SOC_RTC_FAST_CLK_SRC_XTAL` */ SOC_RTC_FAST_CLK_SRC_LP_PLL = 2, /*!< Select LP_PLL_CLK as RTC_FAST_CLK source (LP_PLL_CLK is a 8MHz clock sourced from RC32K or XTAL32K) */ SOC_RTC_FAST_CLK_SRC_INVALID, /*!< Invalid RTC_FAST_CLK source */ + + SOC_RTC_FAST_CLK_SRC_DEFAULT = SOC_RTC_FAST_CLK_SRC_XTAL, /*!< XTAL_CLK is the default clock source for RTC_FAST_CLK */ + + SOC_RTC_FAST_CLK_SRC_XTAL_DIV __attribute__((deprecated)) = SOC_RTC_FAST_CLK_SRC_XTAL, /*!< Alias name for `SOC_RTC_FAST_CLK_SRC_XTAL` */ } soc_rtc_fast_clk_src_t; /** @@ -159,8 +162,8 @@ typedef enum { SOC_MOD_CLK_XTAL_D2, /*!< XTAL_D2_CLK comes from the external 40MHz crystal, passing a div of 2 to the LP peripherals */ SOC_MOD_CLK_LP_PLL, /*!< LP_PLL is from 32kHz XTAL oscillator frequency multipliers, it has a fixed frequency of 8MHz */ SOC_MOD_CLK_LP_DYN_FAST, /*!< LP_DYN_FAST can be derived from RTC_SLOW_CLK or RTC_FAST_CLK depending on the chip’s power mode: - in active mode, select RTC_FAST_CLK as the clock source; - in light/deep sleep mode, select RTC_SLOW_CLK as the clock source */ + Only in LP_SLEEP mode, select RTC_SLOW_CLK as the clock source; + In other non-LP_SLEEP mode, select RTC_FAST_CLK as the clock source; */ SOC_MOD_CLK_LP_PERI, /*!< LP_PERI_CLK is derived from LP_DYN_FAST (configurable divider) */ SOC_MOD_CLK_INVALID, /*!< Indication of the end of the available module clock sources */ } soc_module_clk_t; diff --git a/components/soc/esp32p4/include/soc/soc_caps.h b/components/soc/esp32p4/include/soc/soc_caps.h index ee00d3083d..22bedd19d8 100644 --- a/components/soc/esp32p4/include/soc/soc_caps.h +++ b/components/soc/esp32p4/include/soc/soc_caps.h @@ -738,7 +738,6 @@ #define SOC_CLK_LP_FAST_SUPPORT_LP_PLL (1) /*!< Support LP_PLL clock as the LP_FAST clock source */ #define SOC_CLK_LP_FAST_SUPPORT_XTAL (1) /*!< Support XTAL clock as the LP_FAST clock source */ - #define SOC_PERIPH_CLK_CTRL_SHARED (1) /*!< Peripheral clock control (e.g. set clock source) is shared between various peripherals */ /*-------------------------- Temperature Sensor CAPS -------------------------------------*/ diff --git a/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in index 506be9789f..7d9da34b40 100644 --- a/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in @@ -1151,6 +1151,10 @@ config SOC_CLK_XTAL32K_SUPPORTED bool default y +config SOC_CLK_LP_FAST_SUPPORT_XTAL_D4 + bool + default y + config SOC_COEX_HW_PTI bool default y diff --git a/components/soc/esp32s2/include/soc/clk_tree_defs.h b/components/soc/esp32s2/include/soc/clk_tree_defs.h index a0c170c57d..51331a5578 100644 --- a/components/soc/esp32s2/include/soc/clk_tree_defs.h +++ b/components/soc/esp32s2/include/soc/clk_tree_defs.h @@ -21,7 +21,7 @@ extern "C" { * * 2) External 40MHz Crystal Clock: XTAL * - * 3) Internal 90kHz RC Oscillator: RC_SLOW (usually referrred as RTC in TRM or reg. description) + * 3) Internal 90kHz RC Oscillator: RC_SLOW (usually referred as RTC in TRM or reg. description) * * This RC oscillator generates a ~90kHz clock signal output as the RC_SLOW_CLK. The exact frequency of this clock * can be computed in runtime through calibration. @@ -84,9 +84,12 @@ typedef enum { */ typedef enum { SOC_RTC_FAST_CLK_SRC_XTAL_D4 = 0, /*!< Select XTAL_D4_CLK (may referred as XTAL_CLK_DIV_4) as RTC_FAST_CLK source */ - SOC_RTC_FAST_CLK_SRC_XTAL_DIV = SOC_RTC_FAST_CLK_SRC_XTAL_D4, /*!< Alias name for `SOC_RTC_FAST_CLK_SRC_XTAL_D4` */ SOC_RTC_FAST_CLK_SRC_RC_FAST = 1, /*!< Select RC_FAST_CLK as RTC_FAST_CLK source */ SOC_RTC_FAST_CLK_SRC_INVALID, /*!< Invalid RTC_FAST_CLK source */ + + SOC_RTC_FAST_CLK_SRC_DEFAULT = SOC_RTC_FAST_CLK_SRC_XTAL_D4, /*!< XTAL_D4_CLK is the default clock source for RTC_FAST_CLK */ + + SOC_RTC_FAST_CLK_SRC_XTAL_DIV __attribute__((deprecated)) = SOC_RTC_FAST_CLK_SRC_XTAL_D4, /*!< Alias name for `SOC_RTC_FAST_CLK_SRC_XTAL_D4` */ } soc_rtc_fast_clk_src_t; /** diff --git a/components/soc/esp32s2/include/soc/soc_caps.h b/components/soc/esp32s2/include/soc/soc_caps.h index bc81df1436..4a5bb22051 100644 --- a/components/soc/esp32s2/include/soc/soc_caps.h +++ b/components/soc/esp32s2/include/soc/soc_caps.h @@ -482,6 +482,8 @@ #define SOC_CLK_XTAL32K_SUPPORTED (1) /*!< Support to connect an external low frequency crystal */ +#define SOC_CLK_LP_FAST_SUPPORT_XTAL_D4 (1) /*!< Support XTAL_D4 clock as the LP_FAST clock source */ + /*-------------------------- COEXISTENCE HARDWARE PTI CAPS -------------------------------*/ #define SOC_COEX_HW_PTI (1) /* ---------------------------- Compatibility ------------------------------- */ diff --git a/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in b/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in index f87cc98a22..0501a5ad91 100644 --- a/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in @@ -1243,6 +1243,10 @@ config SOC_CLK_XTAL32K_SUPPORTED bool default y +config SOC_CLK_LP_FAST_SUPPORT_XTAL_D2 + bool + default y + config SOC_EFUSE_DIS_DOWNLOAD_ICACHE bool default y diff --git a/components/soc/esp32s3/include/soc/clk_tree_defs.h b/components/soc/esp32s3/include/soc/clk_tree_defs.h index dc74e9ad56..4f3bea9985 100644 --- a/components/soc/esp32s3/include/soc/clk_tree_defs.h +++ b/components/soc/esp32s3/include/soc/clk_tree_defs.h @@ -21,7 +21,7 @@ extern "C" { * * 2) External 40MHz Crystal Clock: XTAL * - * 3) Internal 136kHz RC Oscillator: RC_SLOW (usually referrred as RTC in TRM or reg. description) + * 3) Internal 136kHz RC Oscillator: RC_SLOW (usually referred as RTC in TRM or reg. description) * * This RC oscillator generates a ~136kHz clock signal output as the RC_SLOW_CLK. The exact frequency of this clock * can be computed in runtime through calibration. @@ -83,9 +83,12 @@ typedef enum { */ typedef enum { SOC_RTC_FAST_CLK_SRC_XTAL_D2 = 0, /*!< Select XTAL_D2_CLK (may referred as XTAL_CLK_DIV_2) as RTC_FAST_CLK source */ - SOC_RTC_FAST_CLK_SRC_XTAL_DIV = SOC_RTC_FAST_CLK_SRC_XTAL_D2, /*!< Alias name for `SOC_RTC_FAST_CLK_SRC_XTAL_D2` */ SOC_RTC_FAST_CLK_SRC_RC_FAST = 1, /*!< Select RC_FAST_CLK as RTC_FAST_CLK source */ SOC_RTC_FAST_CLK_SRC_INVALID, /*!< Invalid RTC_FAST_CLK source */ + + SOC_RTC_FAST_CLK_SRC_DEFAULT = SOC_RTC_FAST_CLK_SRC_XTAL_D2, /*!< XTAL_D2_CLK is the default clock source for RTC_FAST_CLK */ + + SOC_RTC_FAST_CLK_SRC_XTAL_DIV __attribute__((deprecated)) = SOC_RTC_FAST_CLK_SRC_XTAL_D2, /*!< Alias name for `SOC_RTC_FAST_CLK_SRC_XTAL_D2` */ } soc_rtc_fast_clk_src_t; /** diff --git a/components/soc/esp32s3/include/soc/soc_caps.h b/components/soc/esp32s3/include/soc/soc_caps.h index d87dbe088c..8ff1d26ae2 100644 --- a/components/soc/esp32s3/include/soc/soc_caps.h +++ b/components/soc/esp32s3/include/soc/soc_caps.h @@ -484,6 +484,8 @@ #define SOC_CLK_XTAL32K_SUPPORTED (1) /*!< Support to connect an external low frequency crystal */ +#define SOC_CLK_LP_FAST_SUPPORT_XTAL_D2 (1) /*!< Support XTAL_D2 clock as the LP_FAST clock source */ + /*-------------------------- eFuse CAPS----------------------------*/ #define SOC_EFUSE_DIS_DOWNLOAD_ICACHE 1 #define SOC_EFUSE_DIS_DOWNLOAD_DCACHE 1