forked from espressif/esp-idf
Merge branch 'refa/replce_esp_dma_xxx_malloc_api' into 'master'
refa(spi): clean up esp_dma_xxx memory allocation code Closes IDF-9656 See merge request espressif/esp-idf!31239
This commit is contained in:
@@ -174,18 +174,13 @@ esp_err_t spi_bus_free(spi_host_device_t host_id);
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* @note This API will take care of the cache and hardware alignment internally.
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* @note This API will take care of the cache and hardware alignment internally.
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* To free/release memory allocated by this helper function, simply calling `free()`
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* To free/release memory allocated by this helper function, simply calling `free()`
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*
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*
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* @param[in] host_id SPI peripheral who will using the memory
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* @param[in] size Size in bytes, the amount of memory to allocate
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* @param[in] size Size in bytes, the amount of memory to allocate
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* @param[out] out_ptr Pointer to the memory if allocated successfully
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* @param[in] extra_heap_caps Extra heap caps based on MALLOC_CAP_DMA
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* @param[in] extra_heap_caps Extra heap caps based on MALLOC_CAP_DMA
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* @param[out] actual_size Optional, Actual size for allocation in bytes, when the size you specified doesn't meet the internal alignment requirements,
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* This value might be bigger than the size you specified. Set NULL if don't care this value.
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*
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*
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* @return
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* @return Pointer to the memory if allocated successfully
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* - ESP_ERR_INVALID_ARG Invalid argument
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* - ESP_ERR_NO_MEM No enough memory for allocation
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* - ESP_OK on success
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*/
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*/
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esp_err_t spi_bus_dma_memory_malloc(size_t size, void **out_ptr, uint32_t extra_heap_caps, size_t *actual_size);
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void *spi_bus_dma_memory_alloc(spi_host_device_t host_id, size_t size, uint32_t extra_heap_caps);
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#ifdef __cplusplus
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#ifdef __cplusplus
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}
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}
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@@ -50,7 +50,7 @@ typedef struct {
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uint32_t flags; ///< Flags (attributes) of the bus
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uint32_t flags; ///< Flags (attributes) of the bus
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int max_transfer_sz; ///< Maximum length of bytes available to send
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int max_transfer_sz; ///< Maximum length of bytes available to send
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bool dma_enabled; ///< To enable DMA or not
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bool dma_enabled; ///< To enable DMA or not
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uint16_t internal_mem_align_size; ///< Buffer align byte requirement for internal memory
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size_t internal_mem_align_size; ///< Buffer align byte requirement for internal memory
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spi_bus_lock_handle_t lock;
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spi_bus_lock_handle_t lock;
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#ifdef CONFIG_PM_ENABLE
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#ifdef CONFIG_PM_ENABLE
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esp_pm_lock_handle_t pm_lock; ///< Power management lock
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esp_pm_lock_handle_t pm_lock; ///< Power management lock
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@@ -287,12 +287,8 @@ esp_err_t spicommon_dma_desc_alloc(spi_dma_ctx_t *dma_ctx, int cfg_max_sz, int *
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dma_desc_ct = 1; //default to 4k when max is not given
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dma_desc_ct = 1; //default to 4k when max is not given
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}
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}
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esp_dma_mem_info_t dma_mem_info = {
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dma_ctx->dmadesc_tx = heap_caps_aligned_calloc(DMA_DESC_MEM_ALIGN_SIZE, 1, sizeof(spi_dma_desc_t) * dma_desc_ct, MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL);
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.dma_alignment_bytes = DMA_DESC_MEM_ALIGN_SIZE,
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dma_ctx->dmadesc_rx = heap_caps_aligned_calloc(DMA_DESC_MEM_ALIGN_SIZE, 1, sizeof(spi_dma_desc_t) * dma_desc_ct, MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL);
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};
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esp_dma_capable_malloc(sizeof(spi_dma_desc_t) * dma_desc_ct, &dma_mem_info, (void*)&dma_ctx->dmadesc_tx, NULL);
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esp_dma_capable_malloc(sizeof(spi_dma_desc_t) * dma_desc_ct, &dma_mem_info, (void*)&dma_ctx->dmadesc_rx, NULL);
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if (dma_ctx->dmadesc_tx == NULL || dma_ctx->dmadesc_rx == NULL) {
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if (dma_ctx->dmadesc_tx == NULL || dma_ctx->dmadesc_rx == NULL) {
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if (dma_ctx->dmadesc_tx) {
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if (dma_ctx->dmadesc_tx) {
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free(dma_ctx->dmadesc_tx);
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free(dma_ctx->dmadesc_tx);
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@@ -886,13 +882,13 @@ cleanup:
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return err;
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return err;
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}
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}
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esp_err_t spi_bus_dma_memory_malloc(size_t size, void **out_ptr, uint32_t extra_heap_caps, size_t *actual_size)
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void *spi_bus_dma_memory_alloc(spi_host_device_t host_id, size_t size, uint32_t extra_heap_caps)
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{
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{
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esp_dma_mem_info_t dma_mem_info = {
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(void) host_id; //remain for extendability
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.extra_heap_caps = extra_heap_caps,
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ESP_RETURN_ON_FALSE((extra_heap_caps & MALLOC_CAP_SPIRAM) == 0, NULL, SPI_TAG, "external memory is not supported now");
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.dma_alignment_bytes = DMA_DESC_MEM_ALIGN_SIZE,
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};
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size_t dma_requir = 16; //TODO: IDF-10111, using max alignment temp, refactor to "gdma_get_alignment_constraints" instead
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return esp_dma_capable_malloc(size, &dma_mem_info, out_ptr, actual_size);
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return heap_caps_aligned_calloc(dma_requir, 1, size, extra_heap_caps | MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL);
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}
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}
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const spi_bus_attr_t* spi_bus_get_attr(spi_host_device_t host_id)
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const spi_bus_attr_t* spi_bus_get_attr(spi_host_device_t host_id)
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@@ -1092,10 +1092,10 @@ TEST_CASE("SPI master hd dma TX without RX test", "[spi]")
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same_pin_func_sel(bus_cfg, dev_cfg, 0);
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same_pin_func_sel(bus_cfg, dev_cfg, 0);
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uint32_t buf_size = 32;
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uint32_t buf_size = 32;
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uint8_t *mst_send_buf = heap_caps_malloc(buf_size, MALLOC_CAP_DMA);
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uint8_t *mst_send_buf = spi_bus_dma_memory_alloc(TEST_SPI_HOST, buf_size, 0);
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uint8_t *mst_recv_buf = heap_caps_calloc(buf_size, 1, MALLOC_CAP_DMA);
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uint8_t *mst_recv_buf = spi_bus_dma_memory_alloc(TEST_SPI_HOST, buf_size, 0);
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uint8_t *slv_send_buf = heap_caps_malloc(buf_size, MALLOC_CAP_DMA);
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uint8_t *slv_send_buf = spi_bus_dma_memory_alloc(TEST_SLAVE_HOST, buf_size, 0);
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uint8_t *slv_recv_buf = heap_caps_calloc(buf_size, 1, MALLOC_CAP_DMA);
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uint8_t *slv_recv_buf = spi_bus_dma_memory_alloc(TEST_SLAVE_HOST, buf_size, 0);
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srand(199);
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srand(199);
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for (int i = 0; i < buf_size; i++) {
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for (int i = 0; i < buf_size; i++) {
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@@ -100,7 +100,7 @@ DRAM_ATTR static const lcd_init_cmd_t st_init_cmds[] = {
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};
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};
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DRAM_ATTR static const lcd_init_cmd_t ili_init_cmds[] = {
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DRAM_ATTR static const lcd_init_cmd_t ili_init_cmds[] = {
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/* Power contorl B, power control = 0, DC_ENA = 1 */
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/* Power control B, power control = 0, DC_ENA = 1 */
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{0xCF, {0x00, 0x83, 0X30}, 3},
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{0xCF, {0x00, 0x83, 0X30}, 3},
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/* Power on sequence control,
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/* Power on sequence control,
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* cp1 keeps 1 frame, 1st frame enable
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* cp1 keeps 1 frame, 1st frame enable
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@@ -128,7 +128,7 @@ DRAM_ATTR static const lcd_init_cmd_t ili_init_cmds[] = {
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{0xC5, {0x35, 0x3E}, 2},
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{0xC5, {0x35, 0x3E}, 2},
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/* VCOM control 2, VCOMH=VMH-2, VCOML=VML-2 */
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/* VCOM control 2, VCOMH=VMH-2, VCOML=VML-2 */
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{0xC7, {0xBE}, 1},
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{0xC7, {0xBE}, 1},
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/* Memory access contorl, MX=MY=0, MV=1, ML=0, BGR=1, MH=0 */
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/* Memory access control, MX=MY=0, MV=1, ML=0, BGR=1, MH=0 */
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{0x36, {0x28}, 1},
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{0x36, {0x28}, 1},
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/* Pixel format, 16bits/pixel for RGB/MCU interface */
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/* Pixel format, 16bits/pixel for RGB/MCU interface */
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{0x3A, {0x55}, 1},
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{0x3A, {0x55}, 1},
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@@ -377,7 +377,7 @@ static void display_pretty_colors(spi_device_handle_t spi)
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uint16_t *lines[2];
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uint16_t *lines[2];
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//Allocate memory for the pixel buffers
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//Allocate memory for the pixel buffers
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for (int i = 0; i < 2; i++) {
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for (int i = 0; i < 2; i++) {
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lines[i] = heap_caps_malloc(320 * PARALLEL_LINES * sizeof(uint16_t), MALLOC_CAP_DMA);
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lines[i] = spi_bus_dma_memory_alloc(LCD_HOST, 320 * PARALLEL_LINES * sizeof(uint16_t), 0);
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assert(lines[i] != NULL);
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assert(lines[i] != NULL);
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}
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}
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int frame = 0;
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int frame = 0;
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@@ -203,12 +203,12 @@ void app_main(void)
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printf("Slave MAX Send Buffer Size: %"PRIu32"\n", slave_max_tx_buf_size);
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printf("Slave MAX Send Buffer Size: %"PRIu32"\n", slave_max_tx_buf_size);
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printf("Slave MAX Receive Buffer Size: %"PRIu32"\n", slave_max_rx_buf_size);
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printf("Slave MAX Receive Buffer Size: %"PRIu32"\n", slave_max_rx_buf_size);
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uint8_t *recv_buf = heap_caps_calloc(1, rx_buf_size, MALLOC_CAP_DMA);
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uint8_t *recv_buf = spi_bus_dma_memory_alloc(MASTER_HOST, rx_buf_size, 0);
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if (!recv_buf) {
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if (!recv_buf) {
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ESP_LOGE(TAG, "No enough memory!");
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ESP_LOGE(TAG, "No enough memory!");
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abort();
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abort();
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}
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}
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uint8_t *send_buf = heap_caps_calloc(1, slave_max_rx_buf_size, MALLOC_CAP_DMA);
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uint8_t *send_buf = spi_bus_dma_memory_alloc(MASTER_HOST, slave_max_rx_buf_size, 0);
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if (!send_buf) {
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if (!send_buf) {
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ESP_LOGE(TAG, "No enough memory!");
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ESP_LOGE(TAG, "No enough memory!");
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abort();
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abort();
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