From 944e3ec8462afaa34b9abf9f91f1216ba188ab37 Mon Sep 17 00:00:00 2001 From: "nilesh.kale" Date: Thu, 24 Apr 2025 14:28:46 +0530 Subject: [PATCH] fix(esp_mm): Move cache-related sources out of pure RAM app check This change resolves build issues when compiling with CONFIG_APP_BUILD_TYPE_PURE_RAM_APP enabled. --- components/esp_mm/CMakeLists.txt | 4 ++++ components/hal/CMakeLists.txt | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/components/esp_mm/CMakeLists.txt b/components/esp_mm/CMakeLists.txt index 06f5b3bc9e..923ab0aae6 100644 --- a/components/esp_mm/CMakeLists.txt +++ b/components/esp_mm/CMakeLists.txt @@ -19,6 +19,10 @@ if(NOT CONFIG_APP_BUILD_TYPE_PURE_RAM_APP) if(CONFIG_IDF_TARGET_ESP32) list(APPEND srcs "cache_esp32.c") endif() +else() + if(CONFIG_SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE) + list(APPEND srcs "esp_cache.c") + endif() endif() list(APPEND srcs "heap_align_hw.c") diff --git a/components/hal/CMakeLists.txt b/components/hal/CMakeLists.txt index c94d16446f..34e4e5ed33 100644 --- a/components/hal/CMakeLists.txt +++ b/components/hal/CMakeLists.txt @@ -43,6 +43,10 @@ if(NOT CONFIG_APP_BUILD_TYPE_PURE_RAM_APP) elseif(NOT ${target} STREQUAL "linux") list(APPEND srcs "cache_hal.c") endif() +else() + if(CONFIG_SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE) + list(APPEND srcs "cache_hal.c") + endif() endif() if(esp_tee_build)