From 96f3c2bac6b9ab87ae22273ece4fb859a5bbc5ca Mon Sep 17 00:00:00 2001 From: jiangguangming Date: Tue, 3 Jan 2023 20:18:49 +0800 Subject: [PATCH] rtc_time.c: simplify the rtc_time_get with LL function --- components/esp_hw_support/port/esp32/rtc_time.c | 16 ++-------------- .../esp_hw_support/port/esp32c3/rtc_time.c | 6 ++---- .../esp_hw_support/port/esp32s2/rtc_time.c | 6 ++---- .../esp_hw_support/port/esp32s3/rtc_time.c | 6 ++---- 4 files changed, 8 insertions(+), 26 deletions(-) diff --git a/components/esp_hw_support/port/esp32/rtc_time.c b/components/esp_hw_support/port/esp32/rtc_time.c index 5d6df16359..08a47bc775 100644 --- a/components/esp_hw_support/port/esp32/rtc_time.c +++ b/components/esp_hw_support/port/esp32/rtc_time.c @@ -6,6 +6,7 @@ #include #include "esp_rom_sys.h" +#include "hal/rtc_cntl_ll.h" #include "soc/rtc.h" #include "soc/timer_periph.h" #include "soc_log.h" @@ -150,20 +151,7 @@ uint64_t rtc_time_slowclk_to_us(uint64_t rtc_cycles, uint32_t period) uint64_t rtc_time_get(void) { - SET_PERI_REG_MASK(RTC_CNTL_TIME_UPDATE_REG, RTC_CNTL_TIME_UPDATE); - int attempts = 1000; - while (GET_PERI_REG_MASK(RTC_CNTL_TIME_UPDATE_REG, RTC_CNTL_TIME_VALID) == 0) { - esp_rom_delay_us(1); // might take 1 RTC slowclk period, don't flood RTC bus - if (attempts) { - if (--attempts == 0 && REG_GET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_DIG_XTAL32K_EN)) { - SOC_LOGE(TAG, "rtc_time_get() 32kHz xtal has been stopped"); - } - } - } - SET_PERI_REG_MASK(RTC_CNTL_INT_CLR_REG, RTC_CNTL_TIME_VALID_INT_CLR); - uint64_t t = READ_PERI_REG(RTC_CNTL_TIME0_REG); - t |= ((uint64_t) READ_PERI_REG(RTC_CNTL_TIME1_REG)) << 32; - return t; + return rtc_cntl_ll_get_rtc_time(); } void rtc_clk_wait_for_slow_cycle(void) diff --git a/components/esp_hw_support/port/esp32c3/rtc_time.c b/components/esp_hw_support/port/esp32c3/rtc_time.c index c56b09a98a..315759ad53 100644 --- a/components/esp_hw_support/port/esp32c3/rtc_time.c +++ b/components/esp_hw_support/port/esp32c3/rtc_time.c @@ -9,6 +9,7 @@ #include "soc/rtc.h" #include "soc/rtc_cntl_reg.h" #include "soc/timer_group_reg.h" +#include "hal/rtc_cntl_ll.h" #include "esp_rom_sys.h" /* Calibration of RTC_SLOW_CLK is performed using a special feature of TIMG0. @@ -166,10 +167,7 @@ uint64_t rtc_time_slowclk_to_us(uint64_t rtc_cycles, uint32_t period) uint64_t rtc_time_get(void) { - SET_PERI_REG_MASK(RTC_CNTL_TIME_UPDATE_REG, RTC_CNTL_TIME_UPDATE); - uint64_t t = READ_PERI_REG(RTC_CNTL_TIME0_REG); - t |= ((uint64_t) READ_PERI_REG(RTC_CNTL_TIME1_REG)) << 32; - return t; + return rtc_cntl_ll_get_rtc_time(); } uint64_t rtc_light_slp_time_get(void) diff --git a/components/esp_hw_support/port/esp32s2/rtc_time.c b/components/esp_hw_support/port/esp32s2/rtc_time.c index 4c385f2309..7b51a17ee2 100644 --- a/components/esp_hw_support/port/esp32s2/rtc_time.c +++ b/components/esp_hw_support/port/esp32s2/rtc_time.c @@ -9,6 +9,7 @@ #include "soc/rtc.h" #include "soc/rtc_cntl_reg.h" #include "soc/timer_group_reg.h" +#include "hal/rtc_cntl_ll.h" /* Calibration of RTC_SLOW_CLK is performed using a special feature of TIMG0. * This feature counts the number of XTAL clock cycles within a given number of @@ -230,10 +231,7 @@ uint64_t rtc_time_slowclk_to_us(uint64_t rtc_cycles, uint32_t period) uint64_t rtc_time_get(void) { - SET_PERI_REG_MASK(RTC_CNTL_TIME_UPDATE_REG, RTC_CNTL_TIME_UPDATE); - uint64_t t = READ_PERI_REG(RTC_CNTL_TIME0_REG); - t |= ((uint64_t) READ_PERI_REG(RTC_CNTL_TIME1_REG)) << 32; - return t; + return rtc_cntl_ll_get_rtc_time(); } uint64_t rtc_light_slp_time_get(void) diff --git a/components/esp_hw_support/port/esp32s3/rtc_time.c b/components/esp_hw_support/port/esp32s3/rtc_time.c index 460798f3c3..db80249522 100644 --- a/components/esp_hw_support/port/esp32s3/rtc_time.c +++ b/components/esp_hw_support/port/esp32s3/rtc_time.c @@ -9,6 +9,7 @@ #include "soc/rtc.h" #include "soc/rtc_cntl_reg.h" #include "soc/timer_group_reg.h" +#include "hal/rtc_cntl_ll.h" /* Calibration of RTC_SLOW_CLK is performed using a special feature of TIMG0. * This feature counts the number of XTAL clock cycles within a given number of @@ -164,10 +165,7 @@ uint64_t rtc_time_slowclk_to_us(uint64_t rtc_cycles, uint32_t period) uint64_t rtc_time_get(void) { - SET_PERI_REG_MASK(RTC_CNTL_TIME_UPDATE_REG, RTC_CNTL_TIME_UPDATE); - uint64_t t = READ_PERI_REG(RTC_CNTL_TIME0_REG); - t |= ((uint64_t) READ_PERI_REG(RTC_CNTL_TIME1_REG)) << 32; - return t; + return rtc_cntl_ll_get_rtc_time(); } uint64_t rtc_light_slp_time_get(void)