From 980ec70d0a608c1dd435066f93f83643c3560859 Mon Sep 17 00:00:00 2001 From: Lou Tianhao Date: Thu, 20 Jun 2024 17:21:52 +0800 Subject: [PATCH] feat(esp_hw_support): support pmu init and sleep for esp32c5 fix(ci): add efuse header in pmu_sleep --- components/esp_adc/adc_oneshot.c | 4 ++-- components/esp_driver_gpio/src/gpio.c | 4 ++-- components/esp_hw_support/CMakeLists.txt | 2 -- components/esp_hw_support/modem_clock.c | 8 ++++---- .../port/esp32c5/CMakeLists.txt | 3 ++- .../esp_hw_support/port/esp32c5/pmu_sleep.c | 2 ++ .../port/esp32c5/private_include/pmu_param.h | 1 - components/esp_hw_support/sleep_modes.c | 20 ++++++++++--------- components/hal/include/hal/gpio_hal.h | 4 ++-- components/hal/include/hal/rtc_hal.h | 2 +- .../esp32c5/include/soc/Kconfig.soc_caps.in | 16 +++++++++++++++ components/soc/esp32c5/include/soc/soc_caps.h | 11 +++++----- examples/system/esp_timer/README.md | 4 ++-- examples/system/light_sleep/README.md | 4 ++-- 14 files changed, 52 insertions(+), 33 deletions(-) diff --git a/components/esp_adc/adc_oneshot.c b/components/esp_adc/adc_oneshot.c index 15166a4f99..80382a6bdc 100644 --- a/components/esp_adc/adc_oneshot.c +++ b/components/esp_adc/adc_oneshot.c @@ -126,7 +126,7 @@ esp_err_t adc_oneshot_new_unit(const adc_oneshot_unit_init_cfg_t *init_config, a if (init_config->ulp_mode == ADC_ULP_MODE_DISABLE) { sar_periph_ctrl_adc_oneshot_power_acquire(); } else { -#if !CONFIG_IDF_TARGET_ESP32C5// # TODO: IDF-8638, IDF-8640 +#if SOC_LIGHT_SLEEP_SUPPORTED esp_sleep_enable_adc_tsens_monitor(true); #endif } @@ -229,7 +229,7 @@ esp_err_t adc_oneshot_del_unit(adc_oneshot_unit_handle_t handle) if (ulp_mode == ADC_ULP_MODE_DISABLE) { sar_periph_ctrl_adc_oneshot_power_release(); } else { -#if !CONFIG_IDF_TARGET_ESP32C5// # TODO: IDF-8638, IDF-8640 +#if SOC_LIGHT_SLEEP_SUPPORTED esp_sleep_enable_adc_tsens_monitor(false); #endif } diff --git a/components/esp_driver_gpio/src/gpio.c b/components/esp_driver_gpio/src/gpio.c index 5357cb99ff..5cb662aab4 100644 --- a/components/esp_driver_gpio/src/gpio.c +++ b/components/esp_driver_gpio/src/gpio.c @@ -975,7 +975,7 @@ esp_err_t gpio_sleep_pupd_config_unapply(gpio_num_t gpio_num) } #endif // CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL -#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP +#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && SOC_DEEP_SLEEP_SUPPORTED esp_err_t gpio_deep_sleep_wakeup_enable(gpio_num_t gpio_num, gpio_int_type_t intr_type) { if (!GPIO_IS_DEEP_SLEEP_WAKEUP_VALID_GPIO(gpio_num)) { @@ -1015,7 +1015,7 @@ esp_err_t gpio_deep_sleep_wakeup_disable(gpio_num_t gpio_num) portEXIT_CRITICAL(&gpio_context.gpio_spinlock); return ESP_OK; } -#endif // SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP +#endif // SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && SOC_DEEP_SLEEP_SUPPORTED esp_err_t gpio_dump_io_configuration(FILE *out_stream, uint64_t io_bit_mask) { diff --git a/components/esp_hw_support/CMakeLists.txt b/components/esp_hw_support/CMakeLists.txt index 72df5f7a3e..f38343e252 100644 --- a/components/esp_hw_support/CMakeLists.txt +++ b/components/esp_hw_support/CMakeLists.txt @@ -145,8 +145,6 @@ if(NOT BOOTLOADER_BUILD) if(CONFIG_IDF_TARGET_ESP32C5) list(REMOVE_ITEM srcs - "sleep_modes.c" # TODO: [ESP32C5] IDF-8638 - "sleep_modem.c" # TODO: [ESP32C5] IDF-8638 "sleep_wake_stub.c" # TODO: [ESP32C5] IDF-8638 "sleep_gpio.c" # TODO: [ESP32C5] IDF-8638 ) diff --git a/components/esp_hw_support/modem_clock.c b/components/esp_hw_support/modem_clock.c index ff4e772af2..5bf2b29eb3 100644 --- a/components/esp_hw_support/modem_clock.c +++ b/components/esp_hw_support/modem_clock.c @@ -411,13 +411,13 @@ void modem_clock_select_lp_clock_source(periph_module_t module, modem_clock_lpcl default: break; } -#if SOC_LIGHT_SLEEP_SUPPORTED // TODO: [ESP32C5] IDF-8643 +#if SOC_LIGHT_SLEEP_SUPPORTED modem_clock_lpclk_src_t last_src = MODEM_CLOCK_instance()->lpclk_src[module - PERIPH_MODEM_MODULE_MIN]; #endif MODEM_CLOCK_instance()->lpclk_src[module - PERIPH_MODEM_MODULE_MIN] = src; portEXIT_CRITICAL_SAFE(&MODEM_CLOCK_instance()->lock); -#if SOC_LIGHT_SLEEP_SUPPORTED // TODO: [ESP32C5] IDF-8643 +#if SOC_LIGHT_SLEEP_SUPPORTED /* The power domain of the low-power clock source required by the modem * module remains powered on during sleep */ esp_sleep_pd_domain_t pd_domain = (esp_sleep_pd_domain_t) ( \ @@ -441,7 +441,7 @@ void modem_clock_deselect_lp_clock_source(periph_module_t module) { assert(IS_MODEM_MODULE(module)); portENTER_CRITICAL_SAFE(&MODEM_CLOCK_instance()->lock); -#if SOC_LIGHT_SLEEP_SUPPORTED // TODO: [ESP32C5] IDF-8643 +#if SOC_LIGHT_SLEEP_SUPPORTED modem_clock_lpclk_src_t last_src = MODEM_CLOCK_instance()->lpclk_src[module - PERIPH_MODEM_MODULE_MIN]; #endif MODEM_CLOCK_instance()->lpclk_src[module - PERIPH_MODEM_MODULE_MIN] = MODEM_CLOCK_LPCLK_SRC_INVALID; @@ -478,13 +478,13 @@ void modem_clock_deselect_lp_clock_source(periph_module_t module) } portEXIT_CRITICAL_SAFE(&MODEM_CLOCK_instance()->lock); -#if SOC_LIGHT_SLEEP_SUPPORTED // TODO: [ESP32C5] IDF-8643 esp_sleep_pd_domain_t pd_domain = (esp_sleep_pd_domain_t) ( \ (last_src == MODEM_CLOCK_LPCLK_SRC_RC_FAST) ? ESP_PD_DOMAIN_RC_FAST \ : (last_src == MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL) ? ESP_PD_DOMAIN_XTAL \ : (last_src == MODEM_CLOCK_LPCLK_SRC_RC32K) ? ESP_PD_DOMAIN_RC32K \ : (last_src == MODEM_CLOCK_LPCLK_SRC_XTAL32K) ? ESP_PD_DOMAIN_XTAL32K \ : ESP_PD_DOMAIN_MAX); +#if SOC_LIGHT_SLEEP_SUPPORTED esp_sleep_pd_config(pd_domain, ESP_PD_OPTION_OFF); #endif } diff --git a/components/esp_hw_support/port/esp32c5/CMakeLists.txt b/components/esp_hw_support/port/esp32c5/CMakeLists.txt index e2cbc1f827..b6f2939450 100644 --- a/components/esp_hw_support/port/esp32c5/CMakeLists.txt +++ b/components/esp_hw_support/port/esp32c5/CMakeLists.txt @@ -1,8 +1,9 @@ set(srcs "rtc_clk_init.c" "rtc_time.c" "rtc_clk.c" - "pmu_init.c" "pmu_param.c" + "pmu_init.c" + "pmu_sleep.c" "chip_info.c" ) diff --git a/components/esp_hw_support/port/esp32c5/pmu_sleep.c b/components/esp_hw_support/port/esp32c5/pmu_sleep.c index 363b73e7ce..82a2335a74 100644 --- a/components/esp_hw_support/port/esp32c5/pmu_sleep.c +++ b/components/esp_hw_support/port/esp32c5/pmu_sleep.c @@ -15,6 +15,8 @@ #include "soc/rtc.h" #include "soc/pmu_struct.h" #include "hal/lp_aon_hal.h" +#include "hal/efuse_ll.h" +#include "hal/efuse_hal.h" #include "esp_private/esp_pmu.h" #include "pmu_param.h" diff --git a/components/esp_hw_support/port/esp32c5/private_include/pmu_param.h b/components/esp_hw_support/port/esp32c5/private_include/pmu_param.h index a330e4ab91..a873be8b25 100644 --- a/components/esp_hw_support/port/esp32c5/private_include/pmu_param.h +++ b/components/esp_hw_support/port/esp32c5/private_include/pmu_param.h @@ -13,7 +13,6 @@ #include "soc/pmu_struct.h" #include "hal/pmu_hal.h" -// TODO: [ESP32C5] IDF-8643 #ifdef __cplusplus extern "C" { diff --git a/components/esp_hw_support/sleep_modes.c b/components/esp_hw_support/sleep_modes.c index fbd7c0ffc7..c1378dfb72 100644 --- a/components/esp_hw_support/sleep_modes.c +++ b/components/esp_hw_support/sleep_modes.c @@ -149,7 +149,7 @@ #elif CONFIG_IDF_TARGET_ESP32C6 #define DEFAULT_SLEEP_OUT_OVERHEAD_US (318) #define DEFAULT_HARDWARE_OUT_OVERHEAD_US (56) -#elif CONFIG_IDF_TARGET_ESP32C5 // TODO: [ESP32C5] IDF-8638 +#elif CONFIG_IDF_TARGET_ESP32C5 #define DEFAULT_SLEEP_OUT_OVERHEAD_US (318) #define DEFAULT_HARDWARE_OUT_OVERHEAD_US (56) #elif CONFIG_IDF_TARGET_ESP32H2 @@ -289,7 +289,7 @@ static esp_err_t timer_wakeup_prepare(int64_t sleep_duration); #if SOC_TOUCH_SENSOR_SUPPORTED && SOC_TOUCH_SENSOR_VERSION != 1 static void touch_wakeup_prepare(void); #endif -#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP +#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && SOC_DEEP_SLEEP_SUPPORTED static void gpio_deep_sleep_wakeup_prepare(void); #endif @@ -814,7 +814,7 @@ static esp_err_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags, esp_sleep_mode_t m // for !(s_config.wakeup_triggers & RTC_EXT1_TRIG_EN), ext1 wakeup will be turned off in hardware in the real call to sleep #endif -#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP +#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && SOC_DEEP_SLEEP_SUPPORTED if (deep_sleep && (s_config.wakeup_triggers & RTC_GPIO_TRIG_EN)) { gpio_deep_sleep_wakeup_prepare(); } @@ -1668,8 +1668,10 @@ bool esp_sleep_is_valid_wakeup_gpio(gpio_num_t gpio_num) { #if SOC_RTCIO_PIN_COUNT > 0 return RTC_GPIO_IS_VALID_GPIO(gpio_num); -#else +#elif SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP return GPIO_IS_DEEP_SLEEP_WAKEUP_VALID_GPIO(gpio_num); +#else + return false; #endif } @@ -1890,7 +1892,7 @@ uint64_t esp_sleep_get_ext1_wakeup_status(void) #endif // SOC_PM_SUPPORT_EXT1_WAKEUP -#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP +#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && SOC_DEEP_SLEEP_SUPPORTED uint64_t esp_sleep_get_gpio_wakeup_status(void) { if (esp_sleep_get_wakeup_cause() != ESP_SLEEP_WAKEUP_GPIO) { @@ -1949,7 +1951,7 @@ esp_err_t esp_deep_sleep_enable_gpio_wakeup(uint64_t gpio_pin_mask, esp_deepslee return err; } -#endif //SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP +#endif //SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && SOC_DEEP_SLEEP_SUPPORTED esp_err_t esp_sleep_enable_gpio_wakeup(void) { @@ -2117,7 +2119,7 @@ esp_err_t esp_sleep_pd_config(esp_sleep_pd_domain_t domain, esp_sleep_pd_option_ * the TOP is powered off. If not power down XTAL, power down TOP is meaningless, and * the XTAL clock control of some chips(esp32c6/esp32h2) depends on the top domain. */ -#if SOC_PM_SUPPORT_TOP_PD +#if SOC_PM_SUPPORT_TOP_PD && SOC_PAU_SUPPORTED FORCE_INLINE_ATTR bool top_domain_pd_allowed(void) { bool top_pd_allowed = true; #if ESP_SLEEP_POWER_DOWN_CPU @@ -2259,13 +2261,13 @@ static uint32_t get_power_down_flags(void) if (s_config.domain[ESP_PD_DOMAIN_XTAL].pd_option != ESP_PD_OPTION_ON) { pd_flags |= RTC_SLEEP_PD_XTAL; } -#if SOC_PM_SUPPORT_TOP_PD +#if SOC_PM_SUPPORT_TOP_PD && SOC_PAU_SUPPORTED if ((s_config.domain[ESP_PD_DOMAIN_TOP].pd_option != ESP_PD_OPTION_ON) && top_domain_pd_allowed()) { pd_flags |= PMU_SLEEP_PD_TOP; } #endif -#if SOC_PM_SUPPORT_MODEM_PD +#if SOC_PM_SUPPORT_MODEM_PD && SOC_PAU_SUPPORTED if ((s_config.domain[ESP_PD_DOMAIN_MODEM].pd_option != ESP_PD_OPTION_ON) && modem_domain_pd_allowed() #if SOC_PM_MODEM_RETENTION_BY_REGDMA && clock_domain_pd_allowed() diff --git a/components/hal/include/hal/gpio_hal.h b/components/hal/include/hal/gpio_hal.h index 534683a3e9..eeeec72e9e 100644 --- a/components/hal/include/hal/gpio_hal.h +++ b/components/hal/include/hal/gpio_hal.h @@ -479,7 +479,7 @@ void gpio_hal_sleep_pupd_config_apply(gpio_hal_context_t *hal, uint32_t gpio_num void gpio_hal_sleep_pupd_config_unapply(gpio_hal_context_t *hal, uint32_t gpio_num); #endif // CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL -#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && (SOC_RTCIO_PIN_COUNT == 0) +#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && (SOC_RTCIO_PIN_COUNT == 0) && SOC_DEEP_SLEEP_SUPPORTED /** * @brief Enable GPIO deep-sleep wake-up function. * @@ -506,7 +506,7 @@ void gpio_hal_sleep_pupd_config_unapply(gpio_hal_context_t *hal, uint32_t gpio_n * @return True if the pin is enabled to wake up from deep-sleep */ #define gpio_hal_deepsleep_wakeup_is_enabled(hal, gpio_num) gpio_ll_deepsleep_wakeup_is_enabled((hal)->dev, gpio_num) -#endif //SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP +#endif //SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && (SOC_RTCIO_PIN_COUNT == 0) && SOC_DEEP_SLEEP_SUPPORTED /** * @brief Select a function for the pin in the IOMUX diff --git a/components/hal/include/hal/rtc_hal.h b/components/hal/include/hal/rtc_hal.h index fb87e889f8..6319d6d9ab 100644 --- a/components/hal/include/hal/rtc_hal.h +++ b/components/hal/include/hal/rtc_hal.h @@ -84,7 +84,7 @@ typedef struct rtc_cntl_sleep_retent { #endif #endif // SOC_PM_SUPPORT_EXT1_WAKEUP -#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && (SOC_RTCIO_PIN_COUNT == 0) +#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && (SOC_RTCIO_PIN_COUNT == 0) && SOC_DEEP_SLEEP_SUPPORTED #define rtc_hal_gpio_get_wakeup_status() rtc_cntl_ll_gpio_get_wakeup_status() diff --git a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in index bc5d356608..913732245d 100644 --- a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in @@ -211,6 +211,14 @@ config SOC_MODEM_CLOCK_SUPPORTED bool default y +config SOC_LIGHT_SLEEP_SUPPORTED + bool + default y + +config SOC_PM_SUPPORTED + bool + default y + config SOC_SPIRAM_SUPPORTED bool default y @@ -1199,6 +1207,14 @@ config SOC_PM_SUPPORT_RTC_PERIPH_PD bool default y +config SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY + bool + default y + +config SOC_PM_CPU_RETENTION_BY_SW + bool + default y + config SOC_CLK_RC_FAST_SUPPORT_CALIBRATION bool default y diff --git a/components/soc/esp32c5/include/soc/soc_caps.h b/components/soc/esp32c5/include/soc/soc_caps.h index fab5306879..4d17ea3444 100644 --- a/components/soc/esp32c5/include/soc/soc_caps.h +++ b/components/soc/esp32c5/include/soc/soc_caps.h @@ -59,7 +59,7 @@ #define SOC_IEEE802154_SUPPORTED 1 #define SOC_BOD_SUPPORTED 1 #define SOC_APM_SUPPORTED 1 /*!< Support for APM peripheral */ -#define SOC_PMU_SUPPORTED 1 // TODO: [ESP32C5] IDF-8667 +#define SOC_PMU_SUPPORTED 1 // #define SOC_PAU_SUPPORTED 1 // TODO: [ESP32C5] IDF-8638 #define SOC_LP_TIMER_SUPPORTED 1 // #define SOC_LP_AON_SUPPORTED 1 // TODO: [ESP32C5] IDF-8638 @@ -75,10 +75,11 @@ #define SOC_RNG_SUPPORTED 1 // #define SOC_KEY_MANAGER_SUPPORTED 1 // TODO: [ESP32C5] IDF-8621 // #define SOC_HUK_SUPPORTED 1 // TODO: [ESP32C5] IDF-8617 -// #define SOC_LIGHT_SLEEP_SUPPORTED 1 // TODO: [ESP32C5] IDF-8640 // #define SOC_DEEP_SLEEP_SUPPORTED 1 // TODO: [ESP32C5] IDF-8638 #define SOC_MODEM_CLOCK_SUPPORTED 1 -// #define SOC_PM_SUPPORTED 1 // TODO: [ESP32C5] IDF-8643 +#define SOC_LIGHT_SLEEP_SUPPORTED 1 +#define SOC_PM_SUPPORTED 1 + #define SOC_SPIRAM_SUPPORTED 1 #define SOC_BT_SUPPORTED 1 #define SOC_PHY_SUPPORTED 1 @@ -552,9 +553,9 @@ /* macro redefine for pass esp_wifi headers md5sum check */ // #define MAC_SUPPORT_PMU_MODEM_STATE SOC_PM_SUPPORT_PMU_MODEM_STATE -// #define SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY (1) /*!