feat(uart_test): add test case for uart tx blocked by auto-suspend

components/driver/test_apps/uart/main/CMakeLists.txt

@@ -1,7 +1,8 @@
 # In order for the cases defined by `TEST_CASE` to be linked into the final elf,
 # the component can be registered as WHOLE_ARCHIVE
 idf_component_register(
-    SRCS "test_app_main.c" "test_uart.c"
+    SRCS "test_app_main.c" "test_uart.c" "test_uart_auto_lightsleep.c"
-    REQUIRES driver unity
+    REQUIRES driver unity esp_pm
+    PRIV_INCLUDE_DIRS .
     WHOLE_ARCHIVE
 )

components/driver/test_apps/uart/main/test_uart_auto_lightsleep.c

@@ -9,6 +9,7 @@
 #include "driver/uart.h"
 #include "esp_pm.h"
 #include "esp_log.h"
+#include "esp_private/sleep_cpu.h" //for sleep_cpu_configure
 
 #define UART_TAG         "Uart"
 #define TEST_BUF_SIZE    256
@@ -16,12 +17,9 @@
 //This should be larger than FIFO_SIZE + 2 * TEST_DRIVER_BUF_SIZE, so that blocking will happen
 #define TEST_WRITE_SIZE 1024
 
-#define TEST_TXD   12
-#define TEST_RXD   13
 #define TEST_RTS   UART_PIN_NO_CHANGE
 #define TEST_CTS   UART_PIN_NO_CHANGE
 
-#define TEST_UART_PORT_NUM      1
 #define TEST_UART_BAUD_RATE     115200
 
 #define MAX_FREQ    (CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ)
@@ -34,10 +32,30 @@
 #define MIN_FREQ    13
 #endif
 
+typedef struct {
+    uart_port_t port_num;
+    soc_module_clk_t default_src_clk;
+    int tx_pin_num;
+    int rx_pin_num;
+    uint32_t rx_flow_ctrl_thresh;
+} uart_port_param_t;
+
+
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32P4)
 #if CONFIG_PM_ENABLE
 
 TEST_CASE("uart tx won't be blocked by auto light sleep", "[uart]")
 {
+    uart_port_param_t port_param = {
+        .port_num = UART_NUM_1,                  // Test HP_UART with UART1 port
+        .default_src_clk = UART_SCLK_DEFAULT,
+        .tx_pin_num = 4,
+        .rx_pin_num = 5,
+        .rx_flow_ctrl_thresh = 120,
+    };
+
+    uart_port_t port_num = port_param.port_num;
+
     // Configure dynamic frequency scaling:
     // maximum and minimum frequencies are set in sdkconfig,
     // automatic light sleep is enabled if tickless idle support is enabled.
@@ -56,25 +74,31 @@ TEST_CASE("uart tx won't be blocked by auto light sleep", "[uart]")
         .parity    = UART_PARITY_DISABLE,
         .stop_bits = UART_STOP_BITS_1,
         .flow_ctrl = UART_HW_FLOWCTRL_DISABLE,
-        .source_clk = UART_SCLK_DEFAULT,
+        .source_clk = port_param.default_src_clk,
     };
     int intr_alloc_flags = 0;
 
-    TEST_ESP_OK(uart_driver_install(TEST_UART_PORT_NUM, TEST_BUF_SIZE, 0, 0, NULL, intr_alloc_flags));
+    TEST_ESP_OK(uart_driver_install(port_num, TEST_BUF_SIZE, 0, 0, NULL, intr_alloc_flags));
-    TEST_ESP_OK(uart_param_config(TEST_UART_PORT_NUM, &uart_config));
+    TEST_ESP_OK(uart_param_config(port_num, &uart_config));
-    TEST_ESP_OK(uart_set_pin(TEST_UART_PORT_NUM, TEST_TXD, TEST_RXD, TEST_RTS, TEST_CTS));
+    TEST_ESP_OK(uart_set_pin(port_num, port_param.tx_pin_num, port_param.rx_pin_num, TEST_RTS, TEST_CTS));
 
     // Configure a temporary buffer for the incoming data
     const int len = TEST_WRITE_SIZE;
     uint8_t *data = (uint8_t *) malloc(len);
 
     //If auto lightsleep happen, there will be deadlock in either one of the two following functions
-    uart_write_bytes(TEST_UART_PORT_NUM, (const char *) data, len);
+    uart_write_bytes(port_num, (const char *) data, len);
-    uart_wait_tx_done(TEST_UART_PORT_NUM, portMAX_DELAY);
+    uart_wait_tx_done(port_num, portMAX_DELAY);
 
     ESP_LOGI(UART_TAG, "return from uart_write_bytes");
 
-    uart_driver_delete(TEST_UART_PORT_NUM);
+    uart_driver_delete(port_num);
     free(data);
+
+#if CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
+    //When PD_CPU enabled, retention may cause 14K memory leak. Workaround to release the memory
+    sleep_cpu_configure(false);
+#endif
 }
 #endif // CONFIG_PM_ENABLE
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32P4)