diff --git a/components/ulp/ulp_riscv/ulp_core/ulp_riscv_i2c.c b/components/ulp/ulp_riscv/ulp_core/ulp_riscv_i2c.c
index 1da395304e..75c39faf46 100644
--- a/components/ulp/ulp_riscv/ulp_core/ulp_riscv_i2c.c
+++ b/components/ulp/ulp_riscv/ulp_core/ulp_riscv_i2c.c
@@ -141,6 +141,9 @@ void ulp_riscv_i2c_master_read_from_device(uint8_t *data_rd, size_t size)
         return;
     }
 
+    // Workaround for IDF-9145
+    ULP_RISCV_ENTER_CRITICAL();
+
     /* By default, RTC I2C controller is hard wired to use CMD2 register onwards for read operations */
     cmd_idx = 2;
 
@@ -201,6 +204,9 @@ void ulp_riscv_i2c_master_read_from_device(uint8_t *data_rd, size_t size)
     /* Clear the RTC I2C transmission bits */
     CLEAR_PERI_REG_MASK(SENS_SAR_I2C_CTRL_REG, SENS_SAR_I2C_START_FORCE);
     CLEAR_PERI_REG_MASK(SENS_SAR_I2C_CTRL_REG, SENS_SAR_I2C_START);
+
+    // Workaround for IDF-9145
+    ULP_RISCV_EXIT_CRITICAL();
 }
 
 /*
@@ -230,6 +236,9 @@ void ulp_riscv_i2c_master_write_to_device(uint8_t *data_wr, size_t size)
         return;
     }
 
+    // Workaround for IDF-9145
+    ULP_RISCV_ENTER_CRITICAL();
+
     /* By default, RTC I2C controller is hard wired to use CMD0 and CMD1 registers for write operations */
     cmd_idx = 0;
 
@@ -269,4 +278,7 @@ void ulp_riscv_i2c_master_write_to_device(uint8_t *data_wr, size_t size)
     /* Clear the RTC I2C transmission bits */
     CLEAR_PERI_REG_MASK(SENS_SAR_I2C_CTRL_REG, SENS_SAR_I2C_START_FORCE);
     CLEAR_PERI_REG_MASK(SENS_SAR_I2C_CTRL_REG, SENS_SAR_I2C_START);
+
+    // Workaround for IDF-9145
+    ULP_RISCV_EXIT_CRITICAL();
 }
diff --git a/components/ulp/ulp_riscv/ulp_core/ulp_riscv_print.c b/components/ulp/ulp_riscv/ulp_core/ulp_riscv_print.c
index ae6ce8c1ee..6c3ed2c88a 100644
--- a/components/ulp/ulp_riscv/ulp_core/ulp_riscv_print.c
+++ b/components/ulp/ulp_riscv/ulp_core/ulp_riscv_print.c
@@ -4,6 +4,7 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 #include "ulp_riscv_print.h"
+#include "ulp_riscv_utils.h"
 
 typedef struct {
     putc_fn_t putc; // Putc function of the underlying driver, e.g. UART
@@ -24,9 +25,14 @@ void ulp_riscv_print_str(const char *str)
         return;
     }
 
+    /* Perform the bit-banged UART operation in a critical section */
+    ULP_RISCV_ENTER_CRITICAL();
+
     for (int i = 0; str[i] != 0; i++) {
         s_print_ctx.putc(s_print_ctx.putc_ctx, str[i]);
     }
+
+    ULP_RISCV_EXIT_CRITICAL();
 }
 
 void ulp_riscv_print_hex(int h)
@@ -38,6 +44,9 @@ void ulp_riscv_print_hex(int h)
         return;
     }
 
+    /* Perform the bit-banged UART operation in a critical section */
+    ULP_RISCV_ENTER_CRITICAL();
+
     // Does not print '0x', only the digits (8 digits to print)
     for (x = 0; x < 8; x++) {
         c = (h >> 28) & 0xf; // extract the leftmost byte
@@ -48,4 +57,6 @@ void ulp_riscv_print_hex(int h)
         }
         h <<= 4; // move the 2nd leftmost byte to the left, to be extracted next
     }
+
+    ULP_RISCV_EXIT_CRITICAL();
 }