forked from espressif/esp-idf
fix(driver_gpio): correct h21 gpio_ll.h refer from c61
This commit is contained in:
@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -7,7 +7,6 @@
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/*******************************************************************************
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* NOTICE
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* The hal is not public api, don't use in application code.
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* See readme.md in soc/include/hal/readme.md
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******************************************************************************/
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// The LL layer for ESP32-H21 GPIO register operations
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@@ -23,8 +22,8 @@
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#include "soc/pmu_struct.h"
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#include "soc/pcr_struct.h"
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#include "soc/clk_tree_defs.h"
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#include "soc/io_mux_struct.h"
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#include "soc/usb_serial_jtag_struct.h"
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#include "soc/io_mux_struct.h"
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#include "hal/gpio_types.h"
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#include "hal/misc.h"
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#include "hal/assert.h"
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@@ -70,7 +69,7 @@ static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num, gpio
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* @param hw Peripheral GPIO hardware instance address.
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* @param gpio_num GPIO number
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*/
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static inline void gpio_ll_pullup_en(gpio_dev_t *hw, gpio_num_t gpio_num)
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static inline void gpio_ll_pullup_en(gpio_dev_t *hw, uint32_t gpio_num)
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{
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IO_MUX.gpio[gpio_num].fun_wpu = 1;
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}
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@@ -82,7 +81,7 @@ static inline void gpio_ll_pullup_en(gpio_dev_t *hw, gpio_num_t gpio_num)
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* @param gpio_num GPIO number
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*/
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__attribute__((always_inline))
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static inline void gpio_ll_pullup_dis(gpio_dev_t *hw, gpio_num_t gpio_num)
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static inline void gpio_ll_pullup_dis(gpio_dev_t *hw, uint32_t gpio_num)
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{
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// The pull-up value of the USB pins are controlled by the pins’ pull-up value together with USB pull-up value
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// USB DP pin is default to PU enabled
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@@ -102,7 +101,7 @@ static inline void gpio_ll_pullup_dis(gpio_dev_t *hw, gpio_num_t gpio_num)
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* @param hw Peripheral GPIO hardware instance address.
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* @param gpio_num GPIO number
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*/
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static inline void gpio_ll_pulldown_en(gpio_dev_t *hw, gpio_num_t gpio_num)
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static inline void gpio_ll_pulldown_en(gpio_dev_t *hw, uint32_t gpio_num)
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{
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IO_MUX.gpio[gpio_num].fun_wpd = 1;
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}
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@@ -114,7 +113,7 @@ static inline void gpio_ll_pulldown_en(gpio_dev_t *hw, gpio_num_t gpio_num)
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* @param gpio_num GPIO number
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*/
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__attribute__((always_inline))
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static inline void gpio_ll_pulldown_dis(gpio_dev_t *hw, gpio_num_t gpio_num)
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static inline void gpio_ll_pulldown_dis(gpio_dev_t *hw, uint32_t gpio_num)
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{
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IO_MUX.gpio[gpio_num].fun_wpd = 0;
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}
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@@ -126,7 +125,7 @@ static inline void gpio_ll_pulldown_dis(gpio_dev_t *hw, gpio_num_t gpio_num)
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* @param gpio_num GPIO number. If you want to set the trigger type of e.g. of GPIO16, gpio_num should be GPIO_NUM_16 (16);
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* @param intr_type Interrupt type, select from gpio_int_type_t
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*/
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static inline void gpio_ll_set_intr_type(gpio_dev_t *hw, gpio_num_t gpio_num, gpio_int_type_t intr_type)
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static inline void gpio_ll_set_intr_type(gpio_dev_t *hw, uint32_t gpio_num, gpio_int_type_t intr_type)
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{
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hw->pinn[gpio_num].pinn_int_type = intr_type;
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}
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@@ -190,7 +189,7 @@ static inline void gpio_ll_clear_intr_status_high(gpio_dev_t *hw, uint32_t mask)
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* @param gpio_num GPIO number. If you want to enable the interrupt of e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
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*/
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__attribute__((always_inline))
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static inline void gpio_ll_intr_enable_on_core(gpio_dev_t *hw, uint32_t core_id, gpio_num_t gpio_num)
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static inline void gpio_ll_intr_enable_on_core(gpio_dev_t *hw, uint32_t core_id, uint32_t gpio_num)
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{
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HAL_ASSERT(core_id == 0 && "target SoC only has a single core");
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GPIO.pinn[gpio_num].pinn_int_ena = GPIO_LL_PRO_CPU_INTR_ENA; //enable pro cpu intr
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@@ -203,7 +202,7 @@ static inline void gpio_ll_intr_enable_on_core(gpio_dev_t *hw, uint32_t core_id,
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* @param gpio_num GPIO number. If you want to disable the interrupt of e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
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*/
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__attribute__((always_inline))
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static inline void gpio_ll_intr_disable(gpio_dev_t *hw, gpio_num_t gpio_num)
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static inline void gpio_ll_intr_disable(gpio_dev_t *hw, uint32_t gpio_num)
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{
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hw->pinn[gpio_num].pinn_int_ena = 0; //disable GPIO intr
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}
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@@ -215,7 +214,7 @@ static inline void gpio_ll_intr_disable(gpio_dev_t *hw, gpio_num_t gpio_num)
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* @param gpio_num GPIO number
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*/
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__attribute__((always_inline))
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static inline void gpio_ll_input_disable(gpio_dev_t *hw, gpio_num_t gpio_num)
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static inline void gpio_ll_input_disable(gpio_dev_t *hw, uint32_t gpio_num)
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{
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IO_MUX.gpio[gpio_num].fun_ie = 0;
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}
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@@ -227,7 +226,7 @@ static inline void gpio_ll_input_disable(gpio_dev_t *hw, gpio_num_t gpio_num)
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* @param gpio_num GPIO number
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*/
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__attribute__((always_inline))
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static inline void gpio_ll_input_enable(gpio_dev_t *hw, gpio_num_t gpio_num)
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static inline void gpio_ll_input_enable(gpio_dev_t *hw, uint32_t gpio_num)
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{
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IO_MUX.gpio[gpio_num].fun_ie = 1;
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}
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@@ -289,7 +288,7 @@ static inline void gpio_ll_pin_input_hysteresis_disable(gpio_dev_t *hw, uint32_t
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* @param gpio_num GPIO number
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*/
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__attribute__((always_inline))
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static inline void gpio_ll_output_disable(gpio_dev_t *hw, gpio_num_t gpio_num)
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static inline void gpio_ll_output_disable(gpio_dev_t *hw, uint32_t gpio_num)
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{
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hw->enable_w1tc.enable_w1tc = (0x1 << gpio_num);
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}
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@@ -301,7 +300,7 @@ static inline void gpio_ll_output_disable(gpio_dev_t *hw, gpio_num_t gpio_num)
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* @param gpio_num GPIO number
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*/
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__attribute__((always_inline))
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static inline void gpio_ll_output_enable(gpio_dev_t *hw, gpio_num_t gpio_num)
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static inline void gpio_ll_output_enable(gpio_dev_t *hw, uint32_t gpio_num)
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{
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hw->enable_w1ts.enable_w1ts = (0x1 << gpio_num);
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}
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@@ -312,7 +311,7 @@ static inline void gpio_ll_output_enable(gpio_dev_t *hw, gpio_num_t gpio_num)
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* @param hw Peripheral GPIO hardware instance address.
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* @param gpio_num GPIO number
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*/
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static inline void gpio_ll_od_disable(gpio_dev_t *hw, gpio_num_t gpio_num)
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static inline void gpio_ll_od_disable(gpio_dev_t *hw, uint32_t gpio_num)
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{
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hw->pinn[gpio_num].pinn_pad_driver = 0;
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}
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@@ -323,7 +322,7 @@ static inline void gpio_ll_od_disable(gpio_dev_t *hw, gpio_num_t gpio_num)
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* @param hw Peripheral GPIO hardware instance address.
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* @param gpio_num GPIO number
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*/
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static inline void gpio_ll_od_enable(gpio_dev_t *hw, gpio_num_t gpio_num)
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static inline void gpio_ll_od_enable(gpio_dev_t *hw, uint32_t gpio_num)
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{
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hw->pinn[gpio_num].pinn_pad_driver = 1;
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}
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@@ -351,12 +350,12 @@ static inline void gpio_ll_matrix_out_default(gpio_dev_t *hw, uint32_t gpio_num)
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* @param level Output level. 0: low ; 1: high
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*/
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__attribute__((always_inline))
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static inline void gpio_ll_set_level(gpio_dev_t *hw, gpio_num_t gpio_num, uint32_t level)
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static inline void gpio_ll_set_level(gpio_dev_t *hw, uint32_t gpio_num, uint32_t level)
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{
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if (level) {
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hw->out_w1ts.out_w1ts = (1 << gpio_num);
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hw->out_w1ts.val = 1 << gpio_num;
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} else {
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hw->out_w1tc.out_w1tc = (1 << gpio_num);
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hw->out_w1tc.val = 1 << gpio_num;
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}
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}
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@@ -373,7 +372,7 @@ static inline void gpio_ll_set_level(gpio_dev_t *hw, gpio_num_t gpio_num, uint32
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* - 1 the GPIO input level is 1
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*/
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__attribute__((always_inline))
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static inline int gpio_ll_get_level(gpio_dev_t *hw, gpio_num_t gpio_num)
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static inline int gpio_ll_get_level(gpio_dev_t *hw, uint32_t gpio_num)
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{
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return (hw->in.in_data_next >> gpio_num) & 0x1;
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}
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@@ -383,9 +382,8 @@ static inline int gpio_ll_get_level(gpio_dev_t *hw, gpio_num_t gpio_num)
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*
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* @param hw Peripheral GPIO hardware instance address.
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* @param gpio_num GPIO number.
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* @param intr_type GPIO wake-up type. Only GPIO_INTR_LOW_LEVEL or GPIO_INTR_HIGH_LEVEL can be used.
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*/
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static inline void gpio_ll_wakeup_enable(gpio_dev_t *hw, gpio_num_t gpio_num)
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static inline void gpio_ll_wakeup_enable(gpio_dev_t *hw, uint32_t gpio_num)
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{
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hw->pinn[gpio_num].pinn_wakeup_enable = 1;
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}
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@@ -396,7 +394,7 @@ static inline void gpio_ll_wakeup_enable(gpio_dev_t *hw, gpio_num_t gpio_num)
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* @param hw Peripheral GPIO hardware instance address.
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* @param gpio_num GPIO number
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*/
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static inline void gpio_ll_wakeup_disable(gpio_dev_t *hw, gpio_num_t gpio_num)
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static inline void gpio_ll_wakeup_disable(gpio_dev_t *hw, uint32_t gpio_num)
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{
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hw->pinn[gpio_num].pinn_wakeup_enable = 0;
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}
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@@ -408,7 +406,7 @@ static inline void gpio_ll_wakeup_disable(gpio_dev_t *hw, gpio_num_t gpio_num)
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* @param gpio_num GPIO number, only support output GPIOs
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* @param strength Drive capability of the pad
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*/
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static inline void gpio_ll_set_drive_capability(gpio_dev_t *hw, gpio_num_t gpio_num, gpio_drive_cap_t strength)
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static inline void gpio_ll_set_drive_capability(gpio_dev_t *hw, uint32_t gpio_num, gpio_drive_cap_t strength)
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{
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IO_MUX.gpio[gpio_num].fun_drv = strength;
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}
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@@ -420,7 +418,7 @@ static inline void gpio_ll_set_drive_capability(gpio_dev_t *hw, gpio_num_t gpio_
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* @param gpio_num GPIO number, only support output GPIOs
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* @param strength Pointer to accept drive capability of the pad
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*/
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static inline void gpio_ll_get_drive_capability(gpio_dev_t *hw, gpio_num_t gpio_num, gpio_drive_cap_t *strength)
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static inline void gpio_ll_get_drive_capability(gpio_dev_t *hw, uint32_t gpio_num, gpio_drive_cap_t *strength)
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{
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*strength = (gpio_drive_cap_t)(IO_MUX.gpio[gpio_num].fun_drv);
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}
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@@ -432,7 +430,7 @@ static inline void gpio_ll_get_drive_capability(gpio_dev_t *hw, gpio_num_t gpio_
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* @param gpio_num GPIO number, only support output GPIOs
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*/
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__attribute__((always_inline))
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static inline void gpio_ll_hold_en(gpio_dev_t *hw, gpio_num_t gpio_num)
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static inline void gpio_ll_hold_en(gpio_dev_t *hw, uint32_t gpio_num)
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{
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LP_AON.gpio_hold0.gpio_hold0 |= GPIO_HOLD_MASK[gpio_num];
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}
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@@ -444,7 +442,7 @@ static inline void gpio_ll_hold_en(gpio_dev_t *hw, gpio_num_t gpio_num)
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* @param gpio_num GPIO number, only support output GPIOs
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*/
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__attribute__((always_inline))
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static inline void gpio_ll_hold_dis(gpio_dev_t *hw, gpio_num_t gpio_num)
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static inline void gpio_ll_hold_dis(gpio_dev_t *hw, uint32_t gpio_num)
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{
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LP_AON.gpio_hold0.gpio_hold0 &= ~GPIO_HOLD_MASK[gpio_num];
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}
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@@ -579,7 +577,8 @@ static inline void gpio_ll_force_unhold_all(void)
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* @param hw Peripheral GPIO hardware instance address.
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* @param gpio_num GPIO number
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*/
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static inline void gpio_ll_sleep_sel_en(gpio_dev_t *hw, gpio_num_t gpio_num)
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__attribute__((always_inline))
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static inline void gpio_ll_sleep_sel_en(gpio_dev_t *hw, uint32_t gpio_num)
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{
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IO_MUX.gpio[gpio_num].slp_sel = 1;
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}
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@@ -591,7 +590,8 @@ static inline void gpio_ll_sleep_sel_en(gpio_dev_t *hw, gpio_num_t gpio_num)
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* @param hw Peripheral GPIO hardware instance address.
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* @param gpio_num GPIO number
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*/
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static inline void gpio_ll_sleep_sel_dis(gpio_dev_t *hw, gpio_num_t gpio_num)
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__attribute__((always_inline))
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static inline void gpio_ll_sleep_sel_dis(gpio_dev_t *hw, uint32_t gpio_num)
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{
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IO_MUX.gpio[gpio_num].slp_sel = 0;
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}
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@@ -602,7 +602,8 @@ static inline void gpio_ll_sleep_sel_dis(gpio_dev_t *hw, gpio_num_t gpio_num)
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* @param hw Peripheral GPIO hardware instance address.
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* @param gpio_num GPIO number
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*/
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static inline void gpio_ll_sleep_pullup_dis(gpio_dev_t *hw, gpio_num_t gpio_num)
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__attribute__((always_inline))
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static inline void gpio_ll_sleep_pullup_dis(gpio_dev_t *hw, uint32_t gpio_num)
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{
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IO_MUX.gpio[gpio_num].mcu_wpu = 0;
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}
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@@ -613,7 +614,8 @@ static inline void gpio_ll_sleep_pullup_dis(gpio_dev_t *hw, gpio_num_t gpio_num)
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* @param hw Peripheral GPIO hardware instance address.
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* @param gpio_num GPIO number
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*/
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static inline void gpio_ll_sleep_pullup_en(gpio_dev_t *hw, gpio_num_t gpio_num)
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__attribute__((always_inline))
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static inline void gpio_ll_sleep_pullup_en(gpio_dev_t *hw, uint32_t gpio_num)
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{
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IO_MUX.gpio[gpio_num].mcu_wpu = 1;
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}
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@@ -624,7 +626,8 @@ static inline void gpio_ll_sleep_pullup_en(gpio_dev_t *hw, gpio_num_t gpio_num)
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* @param hw Peripheral GPIO hardware instance address.
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* @param gpio_num GPIO number
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*/
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static inline void gpio_ll_sleep_pulldown_en(gpio_dev_t *hw, gpio_num_t gpio_num)
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__attribute__((always_inline))
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static inline void gpio_ll_sleep_pulldown_en(gpio_dev_t *hw, uint32_t gpio_num)
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{
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IO_MUX.gpio[gpio_num].mcu_wpd = 1;
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}
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@@ -635,17 +638,20 @@ static inline void gpio_ll_sleep_pulldown_en(gpio_dev_t *hw, gpio_num_t gpio_num
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* @param hw Peripheral GPIO hardware instance address.
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* @param gpio_num GPIO number
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*/
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static inline void gpio_ll_sleep_pulldown_dis(gpio_dev_t *hw, gpio_num_t gpio_num)
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__attribute__((always_inline))
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static inline void gpio_ll_sleep_pulldown_dis(gpio_dev_t *hw, uint32_t gpio_num)
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{
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IO_MUX.gpio[gpio_num].mcu_wpd = 0;
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}
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/**
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* @brief Disable GPIO input in sleep mode.
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*
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* @param hw Peripheral GPIO hardware instance address.
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* @param gpio_num GPIO number
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*/
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static inline void gpio_ll_sleep_input_disable(gpio_dev_t *hw, gpio_num_t gpio_num)
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__attribute__((always_inline))
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static inline void gpio_ll_sleep_input_disable(gpio_dev_t *hw, uint32_t gpio_num)
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{
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IO_MUX.gpio[gpio_num].mcu_ie = 0;
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}
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@@ -656,7 +662,8 @@ static inline void gpio_ll_sleep_input_disable(gpio_dev_t *hw, gpio_num_t gpio_n
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* @param hw Peripheral GPIO hardware instance address.
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* @param gpio_num GPIO number
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*/
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static inline void gpio_ll_sleep_input_enable(gpio_dev_t *hw, gpio_num_t gpio_num)
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__attribute__((always_inline))
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static inline void gpio_ll_sleep_input_enable(gpio_dev_t *hw, uint32_t gpio_num)
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{
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IO_MUX.gpio[gpio_num].mcu_ie = 1;
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}
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@@ -667,7 +674,8 @@ static inline void gpio_ll_sleep_input_enable(gpio_dev_t *hw, gpio_num_t gpio_nu
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* @param hw Peripheral GPIO hardware instance address.
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* @param gpio_num GPIO number
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*/
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static inline void gpio_ll_sleep_output_disable(gpio_dev_t *hw, gpio_num_t gpio_num)
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__attribute__((always_inline))
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static inline void gpio_ll_sleep_output_disable(gpio_dev_t *hw, uint32_t gpio_num)
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{
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IO_MUX.gpio[gpio_num].mcu_oe = 0;
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}
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@@ -678,7 +686,8 @@ static inline void gpio_ll_sleep_output_disable(gpio_dev_t *hw, gpio_num_t gpio_
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* @param hw Peripheral GPIO hardware instance address.
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* @param gpio_num GPIO number
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*/
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static inline void gpio_ll_sleep_output_enable(gpio_dev_t *hw, gpio_num_t gpio_num)
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__attribute__((always_inline))
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static inline void gpio_ll_sleep_output_enable(gpio_dev_t *hw, uint32_t gpio_num)
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{
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IO_MUX.gpio[gpio_num].mcu_oe = 1;
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||||
}
|
||||
@@ -690,7 +699,7 @@ static inline void gpio_ll_sleep_output_enable(gpio_dev_t *hw, gpio_num_t gpio_n
|
||||
* @param gpio_num GPIO number.
|
||||
* @param intr_type GPIO wake-up type. Only GPIO_INTR_LOW_LEVEL or GPIO_INTR_HIGH_LEVEL can be used.
|
||||
*/
|
||||
static inline void gpio_ll_deepsleep_wakeup_enable(gpio_dev_t *hw, gpio_num_t gpio_num, gpio_int_type_t intr_type)
|
||||
static inline void gpio_ll_deepsleep_wakeup_enable(gpio_dev_t *hw, uint32_t gpio_num, gpio_int_type_t intr_type)
|
||||
{
|
||||
HAL_ASSERT((gpio_num >= GPIO_NUM_5 && gpio_num <= GPIO_NUM_11) &&
|
||||
"only gpio5~11 support deep sleep wake-up function");
|
||||
@@ -717,7 +726,7 @@ static inline void gpio_ll_deepsleep_wakeup_enable(gpio_dev_t *hw, gpio_num_t gp
|
||||
* @param hw Peripheral GPIO hardware instance address.
|
||||
* @param gpio_num GPIO number
|
||||
*/
|
||||
static inline void gpio_ll_deepsleep_wakeup_disable(gpio_dev_t *hw, gpio_num_t gpio_num)
|
||||
static inline void gpio_ll_deepsleep_wakeup_disable(gpio_dev_t *hw, uint32_t gpio_num)
|
||||
{
|
||||
HAL_ASSERT((gpio_num >= GPIO_NUM_5 && gpio_num <= GPIO_NUM_11) &&
|
||||
"only gpio5~11 support deep sleep wake-up function");
|
||||
|
Reference in New Issue
Block a user