forked from espressif/esp-idf
Merge branch 'bugfix/ble_update_lib_1027_5.1' into 'release/v5.1'
ble: update c6 h2 lib to 5bd7cb83, c2 lib to 1d31e175 See merge request espressif/esp-idf!26711
This commit is contained in:
@@ -1003,7 +1003,7 @@ uint8_t esp_ble_get_chip_rev_version(void)
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static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, bool end)
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static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, bool end)
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{
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{
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for (int i = 0; i < len; i++) {
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for (int i = 0; i < len; i++) {
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esp_rom_printf("%02x,", addr[i]);
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esp_rom_printf("%02x ", addr[i]);
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}
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}
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if (end) {
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if (end) {
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esp_rom_printf("\n");
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esp_rom_printf("\n");
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@@ -212,6 +212,15 @@ menu "Memory Settings"
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help
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help
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Dynamic memory size of block 2
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Dynamic memory size of block 2
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config BT_LE_MSYS_BUF_FROM_HEAP
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bool "Get Msys Mbuf from heap"
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default y
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depends on BT_LE_MSYS_INIT_IN_CONTROLLER
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help
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This option sets the source of the shared msys mbuf memory between
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the Host and the Controller. Allocate the memory from the heap if
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this option is sets, from the mempool otherwise.
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config BT_LE_ACL_BUF_COUNT
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config BT_LE_ACL_BUF_COUNT
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int "ACL Buffer count"
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int "ACL Buffer count"
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default 10
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default 10
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@@ -539,5 +548,5 @@ config BT_LE_SCAN_DUPL_CACHE_REFRESH_PERIOD
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again.
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again.
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config BT_LE_MSYS_INIT_IN_CONTROLLER
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config BT_LE_MSYS_INIT_IN_CONTROLLER
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bool
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bool "Msys Mbuf Init in Controller"
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default y
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default y
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@@ -1173,7 +1173,7 @@ esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t po
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static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, bool end)
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static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, bool end)
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{
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{
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for (int i = 0; i < len; i++) {
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for (int i = 0; i < len; i++) {
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esp_rom_printf("%02x,", addr[i]);
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esp_rom_printf("%02x ", addr[i]);
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}
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}
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if (end) {
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if (end) {
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esp_rom_printf("\n");
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esp_rom_printf("\n");
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@@ -1147,7 +1147,7 @@ esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t po
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static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, bool end)
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static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, bool end)
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{
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{
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for (int i = 0; i < len; i++) {
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for (int i = 0; i < len; i++) {
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esp_rom_printf("%02x,", addr[i]);
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esp_rom_printf("%02x ", addr[i]);
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}
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}
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if (end) {
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if (end) {
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esp_rom_printf("\n");
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esp_rom_printf("\n");
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Submodule components/bt/controller/lib_esp32c2/esp32c2-bt-lib updated: 4fb60aa91d...ea33fbad1f
Submodule components/bt/controller/lib_esp32c6/esp32c6-bt-lib updated: 25d9661bc3...c32ea6a0c2
Submodule components/bt/controller/lib_esp32h2/esp32h2-bt-lib updated: 8450d3f508...e4a8094f28
@@ -275,6 +275,15 @@ menu "Memory Settings"
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help
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help
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Dynamic memory size of block 2
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Dynamic memory size of block 2
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config BT_NIMBLE_MSYS_BUF_FROM_HEAP
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bool "Get Msys Mbuf from heap"
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default y
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depends on BT_LE_MSYS_INIT_IN_CONTROLLER
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help
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This option sets the source of the shared msys mbuf memory between
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the Host and the Controller. Allocate the memory from the heap if
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this option is sets, from the mempool otherwise.
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config BT_NIMBLE_TRANSPORT_ACL_FROM_LL_COUNT
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config BT_NIMBLE_TRANSPORT_ACL_FROM_LL_COUNT
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int "ACL Buffer count"
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int "ACL Buffer count"
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depends on BT_NIMBLE_ENABLED
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depends on BT_NIMBLE_ENABLED
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@@ -30,6 +30,11 @@ static STAILQ_HEAD(, os_mbuf_pool) g_msys_pool_list =
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#define OS_MSYS_1_SANITY_MIN_COUNT MYNEWT_VAL(MSYS_1_SANITY_MIN_COUNT)
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#define OS_MSYS_1_SANITY_MIN_COUNT MYNEWT_VAL(MSYS_1_SANITY_MIN_COUNT)
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#define OS_MSYS_2_SANITY_MIN_COUNT MYNEWT_VAL(MSYS_2_SANITY_MIN_COUNT)
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#define OS_MSYS_2_SANITY_MIN_COUNT MYNEWT_VAL(MSYS_2_SANITY_MIN_COUNT)
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#if CONFIG_BT_NIMBLE_MSYS_BUF_FROM_HEAP
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#define OS_MSYS_BLOCK_FROM_HEAP (1)
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#else
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#define OS_MSYS_BLOCK_FROM_HEAP (0)
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#endif // CONFIG_BT_NIMBLE_MSYS_BUF_FROM_HEAP
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#else
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#else
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#define OS_MSYS_1_BLOCK_COUNT CONFIG_BT_LE_MSYS_1_BLOCK_COUNT
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#define OS_MSYS_1_BLOCK_COUNT CONFIG_BT_LE_MSYS_1_BLOCK_COUNT
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#define OS_MSYS_1_BLOCK_SIZE CONFIG_BT_LE_MSYS_1_BLOCK_SIZE
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#define OS_MSYS_1_BLOCK_SIZE CONFIG_BT_LE_MSYS_1_BLOCK_SIZE
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@@ -38,6 +43,12 @@ static STAILQ_HEAD(, os_mbuf_pool) g_msys_pool_list =
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#define OS_MSYS_1_SANITY_MIN_COUNT 0
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#define OS_MSYS_1_SANITY_MIN_COUNT 0
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#define OS_MSYS_2_SANITY_MIN_COUNT 0
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#define OS_MSYS_2_SANITY_MIN_COUNT 0
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#if CONFIG_BT_LE_MSYS_BUF_FROM_HEAP
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#define OS_MSYS_BLOCK_FROM_HEAP (1)
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#else
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#define OS_MSYS_BLOCK_FROM_HEAP (0)
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#endif // CONFIG_BT_LE_MSYS_BUF_FROM_HEAP
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#endif
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#endif
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@@ -71,7 +82,7 @@ static struct os_mempool os_msys_init_2_mempool;
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#endif
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#endif
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#if CONFIG_BT_LE_MSYS_INIT_IN_CONTROLLER
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#if CONFIG_BT_LE_MSYS_INIT_IN_CONTROLLER
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extern int esp_ble_msys_init(uint16_t msys_size1, uint16_t msys_size2, uint16_t msys_cnt1, uint16_t msys_cnt2);
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extern int esp_ble_msys_init(uint16_t msys_size1, uint16_t msys_size2, uint16_t msys_cnt1, uint16_t msys_cnt2, uint8_t from_heap);
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extern void esp_ble_msys_deinit(void);
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extern void esp_ble_msys_deinit(void);
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int os_msys_init(void)
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int os_msys_init(void)
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@@ -79,7 +90,8 @@ int os_msys_init(void)
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return esp_ble_msys_init(SYSINIT_MSYS_1_MEMBLOCK_SIZE,
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return esp_ble_msys_init(SYSINIT_MSYS_1_MEMBLOCK_SIZE,
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SYSINIT_MSYS_2_MEMBLOCK_SIZE,
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SYSINIT_MSYS_2_MEMBLOCK_SIZE,
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OS_MSYS_1_BLOCK_COUNT,
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OS_MSYS_1_BLOCK_COUNT,
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OS_MSYS_2_BLOCK_COUNT);
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OS_MSYS_2_BLOCK_COUNT,
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OS_MSYS_BLOCK_FROM_HEAP);
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}
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}
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void os_msys_deinit(void)
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void os_msys_deinit(void)
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@@ -1035,9 +1035,7 @@ r_ble_ll_utils_csa2_prng = 0x400013b8;
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r_ble_ll_utils_remapped_channel = 0x400013bc;
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r_ble_ll_utils_remapped_channel = 0x400013bc;
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r_ble_ll_whitelist_add = 0x400013c0;
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r_ble_ll_whitelist_add = 0x400013c0;
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r_ble_ll_whitelist_chg_allowed = 0x400013c4;
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r_ble_ll_whitelist_chg_allowed = 0x400013c4;
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r_ble_ll_whitelist_clear = 0x400013c8;
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r_ble_ll_whitelist_read_size = 0x400013cc;
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r_ble_ll_whitelist_read_size = 0x400013cc;
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r_ble_ll_whitelist_rmv = 0x400013d0;
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r_ble_ll_write_rf_path_compensation = 0x400013d8;
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r_ble_ll_write_rf_path_compensation = 0x400013d8;
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r_ble_lll_adv_aux_schedule = 0x400013e0;
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r_ble_lll_adv_aux_schedule = 0x400013e0;
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r_ble_lll_adv_aux_schedule_first = 0x400013e4;
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r_ble_lll_adv_aux_schedule_first = 0x400013e4;
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@@ -1113,7 +1111,6 @@ r_ble_lll_conn_master_common_init = 0x40001530;
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r_ble_lll_conn_master_new = 0x40001534;
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r_ble_lll_conn_master_new = 0x40001534;
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r_ble_lll_conn_module_reset = 0x40001540;
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r_ble_lll_conn_module_reset = 0x40001540;
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r_ble_lll_conn_pre_process = 0x40001548;
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r_ble_lll_conn_pre_process = 0x40001548;
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r_ble_lll_conn_process_acked_pdu = 0x4000154c;
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r_ble_lll_conn_recv_ack = 0x40001554;
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r_ble_lll_conn_recv_ack = 0x40001554;
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r_ble_lll_conn_recv_valid_packet = 0x40001558;
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r_ble_lll_conn_recv_valid_packet = 0x40001558;
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r_ble_lll_conn_reset_pending_sched = 0x4000155c;
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r_ble_lll_conn_reset_pending_sched = 0x4000155c;
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@@ -1196,7 +1193,6 @@ r_ble_lll_scan_npl_store = 0x400016dc;
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r_ble_lll_scan_period_timer_cb = 0x400016e0;
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r_ble_lll_scan_period_timer_cb = 0x400016e0;
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r_ble_lll_scan_process_adv_in_isr = 0x400016e4;
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r_ble_lll_scan_process_adv_in_isr = 0x400016e4;
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r_ble_lll_scan_req_backoff = 0x400016ec;
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r_ble_lll_scan_req_backoff = 0x400016ec;
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r_ble_lll_scan_restart = 0x400016f0;
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r_ble_lll_scan_sched_next_aux = 0x40001700;
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r_ble_lll_scan_sched_next_aux = 0x40001700;
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r_ble_lll_scan_sched_remove = 0x40001704;
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r_ble_lll_scan_sched_remove = 0x40001704;
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r_ble_lll_scan_start = 0x40001708;
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r_ble_lll_scan_start = 0x40001708;
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