From a1fc225aaa0a3b4f017085c87adab7510c07b592 Mon Sep 17 00:00:00 2001 From: Chen Jichang Date: Thu, 8 Aug 2024 18:29:55 +0800 Subject: [PATCH] feat(glitch_filter): remove glitch filter on c61 --- components/soc/esp32c61/include/soc/Kconfig.soc_caps.in | 4 ++++ components/soc/esp32c61/include/soc/soc_caps.h | 1 + 2 files changed, 5 insertions(+) diff --git a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in index c57abf756f..0284406515 100644 --- a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in @@ -227,6 +227,10 @@ config SOC_GPIO_PIN_COUNT int default 22 +config SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER + bool + default y + config SOC_GPIO_SUPPORT_RTC_INDEPENDENT bool default y diff --git a/components/soc/esp32c61/include/soc/soc_caps.h b/components/soc/esp32c61/include/soc/soc_caps.h index d0f8f511a2..f3bedfa321 100644 --- a/components/soc/esp32c61/include/soc/soc_caps.h +++ b/components/soc/esp32c61/include/soc/soc_caps.h @@ -161,6 +161,7 @@ // ESP32-C61 has 1 GPIO peripheral #define SOC_GPIO_PORT 1U #define SOC_GPIO_PIN_COUNT 22 +#define SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER 1 // GPIO peripheral has the ETM extension // \#define SOC_GPIO_SUPPORT_ETM 1 //TODO: [ESP32C61] IDF-9318