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Merge branch 'bugfix/spi_flash_unlock_once' into 'master'

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components/spi_flash: call SPIUnlock once

This fixes the performance impact for spi_flash_write and spi_flash_erase.
With this change, NVS init in single core mode takes about 50ms (compared to >2seconds before that).

For dual core mode, we still spend on average 2ms for each spi_flash_ operation due to synchronization between CPUs, so NVS startup time is about 2 seconds in dual core mode.

See merge request !80
This commit is contained in:
Ivan Grokhotkov
2016-09-13 18:14:22 +08:00
parent 9027be98d1 29c6eab6dc
commit ab12f6e9c1
1 changed files with 15 additions and 2 deletions
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17
components/spi_flash/esp_spi_flash.c
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@@ -178,11 +178,24 @@ static void IRAM_ATTR spi_flash_enable_interrupts_caches_and_other_cpu()
#endif // CONFIG_FREERTOS_UNICORE #endif // CONFIG_FREERTOS_UNICORE
SpiFlashOpResult IRAM_ATTR spi_flash_unlock()
{
static bool unlocked = false;
if (!unlocked) {
SpiFlashOpResult rc = SPIUnlock();
if (rc != SPI_FLASH_RESULT_OK) {
return rc;
}
unlocked = true;
}
return SPI_FLASH_RESULT_OK;
}
esp_err_t IRAM_ATTR spi_flash_erase_sector(uint16_t sec) esp_err_t IRAM_ATTR spi_flash_erase_sector(uint16_t sec)
{ {
spi_flash_disable_interrupts_caches_and_other_cpu(); spi_flash_disable_interrupts_caches_and_other_cpu();
SpiFlashOpResult rc; SpiFlashOpResult rc;
rc = SPIUnlock(); rc = spi_flash_unlock();
if (rc == SPI_FLASH_RESULT_OK) { if (rc == SPI_FLASH_RESULT_OK) {
rc = SPIEraseSector(sec); rc = SPIEraseSector(sec);
} }
@@ -194,7 +207,7 @@ esp_err_t IRAM_ATTR spi_flash_write(uint32_t dest_addr, const uint32_t *src, uin
{ {
spi_flash_disable_interrupts_caches_and_other_cpu(); spi_flash_disable_interrupts_caches_and_other_cpu();
SpiFlashOpResult rc; SpiFlashOpResult rc;
rc = SPIUnlock(); rc = spi_flash_unlock();
if (rc == SPI_FLASH_RESULT_OK) { if (rc == SPI_FLASH_RESULT_OK) {
rc = SPIWrite(dest_addr, src, (int32_t) size); rc = SPIWrite(dest_addr, src, (int32_t) size);
} }