diff --git a/components/esp_hw_support/include/esp_cpu.h b/components/esp_hw_support/include/esp_cpu.h
index ee7d9bf64f..46ea42a2ae 100644
--- a/components/esp_hw_support/include/esp_cpu.h
+++ b/components/esp_hw_support/include/esp_cpu.h
@@ -234,12 +234,12 @@ FORCE_INLINE_ATTR void esp_cpu_intr_set_ivt_addr(const void *ivt_addr)
 }
 
 #if SOC_INT_CLIC_SUPPORTED
-//TODO: IDF-7863
-//"MTVT is only implemented in RISC-V arch"
 /**
  * @brief Set the base address of the current CPU's Interrupt Vector Table (MTVT)
  *
  * @param mtvt_addr Interrupt Vector Table's base address
+ *
+ * @note The MTVT table is only applicable when CLIC is supported
  */
 FORCE_INLINE_ATTR void esp_cpu_intr_set_mtvt_addr(const void *mtvt_addr)
 {
diff --git a/components/esp_system/port/cpu_start.c b/components/esp_system/port/cpu_start.c
index c726a15ed0..91be9f8ada 100644
--- a/components/esp_system/port/cpu_start.c
+++ b/components/esp_system/port/cpu_start.c
@@ -204,7 +204,9 @@ void IRAM_ATTR call_start_cpu1(void)
 
     esp_cpu_intr_set_ivt_addr(&_vector_table);
 #if SOC_INT_CLIC_SUPPORTED
-    //TODO: IDF-7863
+    /* When hardware vectored interrupts are enabled in CLIC,
+     * the CPU jumps to this base address + 4 * interrupt_id.
+     */
     esp_cpu_intr_set_mtvt_addr(&_mtvt_table);
 #endif
 
@@ -400,7 +402,9 @@ void IRAM_ATTR call_start_cpu0(void)
     // Move exception vectors to IRAM
     esp_cpu_intr_set_ivt_addr(&_vector_table);
 #if SOC_INT_CLIC_SUPPORTED
-    //TODO: IDF-7863
+    /* When hardware vectored interrupts are enabled in CLIC,
+     * the CPU jumps to this base address + 4 * interrupt_id.
+     */
     esp_cpu_intr_set_mtvt_addr(&_mtvt_table);
 #endif
 
diff --git a/components/riscv/include/riscv/rv_utils.h b/components/riscv/include/riscv/rv_utils.h
index ec6f327d69..cb3fed9cd2 100644
--- a/components/riscv/include/riscv/rv_utils.h
+++ b/components/riscv/include/riscv/rv_utils.h
@@ -96,7 +96,6 @@ FORCE_INLINE_ATTR void __attribute__((always_inline)) rv_utils_set_cycle_count(u
 
 // --------------- Interrupt Configuration -----------------
 #if SOC_INT_CLIC_SUPPORTED
-//TODO: IDF-7863
 FORCE_INLINE_ATTR void rv_utils_set_mtvt(uint32_t mtvt_val)
 {
 #define MTVT 0x307
@@ -107,8 +106,7 @@ FORCE_INLINE_ATTR void rv_utils_set_mtvt(uint32_t mtvt_val)
 FORCE_INLINE_ATTR void rv_utils_set_mtvec(uint32_t mtvec_val)
 {
 #if SOC_INT_CLIC_SUPPORTED
-    //TODO: IDF-7863
-    mtvec_val |= 3;
+    mtvec_val |= 3; // Set MODE field to 3 to treat MTVT + 4*interrupt_id as the service entry address for HW vectored interrupts
 #else
     mtvec_val |= 1; // Set MODE field to treat MTVEC as a vector base address
 #endif