From b4de983dbcbf459ac76e44139b25532ff2b95787 Mon Sep 17 00:00:00 2001 From: morris Date: Thu, 28 Mar 2024 17:59:21 +0800 Subject: [PATCH] feat(dedic_gpio): add reset and clock control functions --- components/esp_driver_gpio/src/dedic_gpio.c | 15 ++++++-- .../hal/esp32s2/include/hal/dedic_gpio_ll.h | 25 ++++++++++++- .../hal/esp32s3/include/hal/dedic_gpio_ll.h | 37 +++++++++++++++++++ 3 files changed, 73 insertions(+), 4 deletions(-) create mode 100644 components/hal/esp32s3/include/hal/dedic_gpio_ll.h diff --git a/components/esp_driver_gpio/src/dedic_gpio.c b/components/esp_driver_gpio/src/dedic_gpio.c index 056c97fc68..9c60cfe7e2 100644 --- a/components/esp_driver_gpio/src/dedic_gpio.c +++ b/components/esp_driver_gpio/src/dedic_gpio.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -28,6 +28,8 @@ #include "soc/dedic_gpio_periph.h" #if SOC_DEDIC_GPIO_ALLOW_REG_ACCESS #include "soc/dedic_gpio_struct.h" +#endif +#if !SOC_DEDIC_PERIPH_ALWAYS_ENABLE #include "hal/dedic_gpio_ll.h" #endif @@ -84,7 +86,11 @@ static esp_err_t dedic_gpio_build_platform(int core_id) s_platform[core_id]->dev = &DEDIC_GPIO; #endif // SOC_DEDIC_GPIO_ALLOW_REG_ACCESS #if !SOC_DEDIC_PERIPH_ALWAYS_ENABLE - periph_module_enable(dedic_gpio_periph_signals.module); // enable APB clock to peripheral + // enable dedicated GPIO register clock + PERIPH_RCC_ATOMIC() { + dedic_gpio_ll_enable_bus_clock(true); + dedic_gpio_ll_reset_register(); + } #endif // !SOC_DEDIC_PERIPH_ALWAYS_ENABLE } } @@ -107,7 +113,10 @@ static void dedic_gpio_break_platform(uint32_t core_id) free(s_platform[core_id]); s_platform[core_id] = NULL; #if !SOC_DEDIC_PERIPH_ALWAYS_ENABLE - periph_module_disable(dedic_gpio_periph_signals.module); // disable module if no GPIO channel is being used + // disable the register clock if no GPIO channel is in use + PERIPH_RCC_ATOMIC() { + dedic_gpio_ll_enable_bus_clock(false); + } #endif // !SOC_DEDIC_PERIPH_ALWAYS_ENABLE } _lock_release(&s_platform_mutexlock[core_id]); diff --git a/components/hal/esp32s2/include/hal/dedic_gpio_ll.h b/components/hal/esp32s2/include/hal/dedic_gpio_ll.h index 20bbdb0827..c02b97c595 100644 --- a/components/hal/esp32s2/include/hal/dedic_gpio_ll.h +++ b/components/hal/esp32s2/include/hal/dedic_gpio_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -13,6 +13,29 @@ extern "C" { #include #include "hal/misc.h" #include "soc/dedic_gpio_struct.h" +#include "soc/system_reg.h" + +static inline void _dedic_gpio_ll_enable_bus_clock(bool enable) +{ + uint32_t reg_val = READ_PERI_REG(DPORT_CPU_PERI_CLK_EN_REG); + reg_val &= ~DPORT_CLK_EN_DEDICATED_GPIO_M; + reg_val |= enable << DPORT_CLK_EN_DEDICATED_GPIO_S; + WRITE_PERI_REG(DPORT_CPU_PERI_CLK_EN_REG, reg_val); +} + +/// use a macro to wrap the function, force the caller to use it in a critical section +/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance +#define dedic_gpio_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; _dedic_gpio_ll_enable_bus_clock(__VA_ARGS__) + +static inline void _dedic_gpio_ll_reset_register(void) +{ + WRITE_PERI_REG(DPORT_CPU_PERI_RST_EN_REG, DPORT_RST_EN_DEDICATED_GPIO_M); + WRITE_PERI_REG(DPORT_CPU_PERI_RST_EN_REG, 0); +} + +/// use a macro to wrap the function, force the caller to use it in a critical section +/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance +#define dedic_gpio_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; _dedic_gpio_ll_reset_register(__VA_ARGS__) static inline void dedic_gpio_ll_enable_instruction_access_out(dedic_dev_t *dev, uint32_t channel_mask, bool enable) { diff --git a/components/hal/esp32s3/include/hal/dedic_gpio_ll.h b/components/hal/esp32s3/include/hal/dedic_gpio_ll.h new file mode 100644 index 0000000000..f6e019b686 --- /dev/null +++ b/components/hal/esp32s3/include/hal/dedic_gpio_ll.h @@ -0,0 +1,37 @@ +/* + * SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +#pragma once + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include +#include "soc/system_struct.h" + +static inline void _dedic_gpio_ll_enable_bus_clock(bool enable) +{ + SYSTEM.cpu_peri_clk_en.clk_en_dedicated_gpio = enable; +} + +/// use a macro to wrap the function, force the caller to use it in a critical section +/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance +#define dedic_gpio_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; _dedic_gpio_ll_enable_bus_clock(__VA_ARGS__) + +static inline void _dedic_gpio_ll_reset_register(void) +{ + SYSTEM.cpu_peri_rst_en.rst_en_dedicated_gpio = 1; + SYSTEM.cpu_peri_rst_en.rst_en_dedicated_gpio = 0; +} + +/// use a macro to wrap the function, force the caller to use it in a critical section +/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance +#define dedic_gpio_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; _dedic_gpio_ll_reset_register(__VA_ARGS__) + +#ifdef __cplusplus +} +#endif