feat(sdio_slave): add reset and clock control functions

components/esp_driver_sdio/src/sdio_slave.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -83,6 +83,7 @@ The driver of FIFOs works as below:
 #include "freertos/FreeRTOS.h"
 #include "soc/soc_memory_layout.h"
 #include "soc/gpio_periph.h"
+#include "soc/soc_caps.h"
 #include "esp_cpu.h"
 #include "freertos/semphr.h"
 #include "esp_private/periph_ctrl.h"
@@ -100,6 +101,12 @@ static const char TAG[] = "sdio_slave";
 #define SDIO_SLAVE_LOGE(s, ...) ESP_LOGE(TAG, "%s(%d): "s, __FUNCTION__,__LINE__,##__VA_ARGS__)
 #define SDIO_SLAVE_LOGW(s, ...) ESP_LOGW(TAG, "%s: "s, __FUNCTION__,##__VA_ARGS__)
 
+#if !SOC_RCC_IS_INDEPENDENT
+#define SDIO_SLAVE_RCC_ATOMIC() PERIPH_RCC_ATOMIC()
+#else
+#define SDIO_SLAVE_RCC_ATOMIC()
+#endif
+
 // sdio_slave_buf_handle_t is of type recv_desc_t*;
 typedef struct recv_desc_s {
     union {
@@ -304,9 +311,11 @@ static inline esp_err_t sdio_slave_hw_init(sdio_slave_config_t *config)
     }
     configure_pin(slot->d3_gpio, slot->func, pullup);
 
-    //enable module and config
+    //enable register clock
-    periph_module_reset(PERIPH_SDIO_SLAVE_MODULE);
+    SDIO_SLAVE_RCC_ATOMIC() {
-    periph_module_enable(PERIPH_SDIO_SLAVE_MODULE);
+        sdio_slave_ll_enable_bus_clock(true);
+        sdio_slave_ll_reset_register();
+    }
 
     sdio_slave_hal_hw_init(context.hal);
     return ESP_OK;
@@ -333,6 +342,11 @@ static void sdio_slave_hw_deinit(void)
     recover_pin(slot->d1_gpio, slot->func);
     recover_pin(slot->d2_gpio, slot->func);
     recover_pin(slot->d3_gpio, slot->func);
+
+    //disable register clock
+    SDIO_SLAVE_RCC_ATOMIC() {
+        sdio_slave_ll_enable_bus_clock(false);
+    }
 }
 
 esp_err_t sdio_slave_initialize(sdio_slave_config_t *config)

components/hal/esp32/include/hal/sdio_slave_ll.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -23,6 +23,7 @@
 #include "soc/host_reg.h"
 #include "soc/hinf_struct.h"
 #include "soc/lldesc.h"
+#include "soc/dport_reg.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -35,7 +36,6 @@ extern "C" {
 /// Get address of the only HINF registers for ESP32
 #define sdio_slave_ll_get_hinf(ID)  (&HINF)
 
-
 /*
  *  SLC2 DMA Desc struct, aka sdio_slave_ll_desc_t
  *
@@ -75,6 +75,36 @@ typedef enum {
     SDIO_SLAVE_LL_SLVINT_7 = BIT(7),
 } sdio_slave_ll_slvint_t;
 
+/**
+ * @brief Enable the bus clock for the SDIO slave module
+ *
+ * @param enable true to enable, false to disable
+ */
+static inline void _sdio_slave_ll_enable_bus_clock(bool enable)
+{
+    uint32_t reg_val = DPORT_READ_PERI_REG(DPORT_WIFI_CLK_EN_REG);
+    reg_val &= ~DPORT_WIFI_CLK_SDIOSLAVE_EN;
+    reg_val |= enable << 4;
+    DPORT_WRITE_PERI_REG(DPORT_WIFI_CLK_EN_REG, reg_val);
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define sdio_slave_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; _sdio_slave_ll_enable_bus_clock(__VA_ARGS__)
+
+/**
+ * @brief Reset the SDIO slave module
+ */
+static inline void _sdio_slave_ll_reset_register(void)
+{
+    DPORT_WRITE_PERI_REG(DPORT_CORE_RST_EN_REG, DPORT_SDIO_RST);
+    DPORT_WRITE_PERI_REG(DPORT_CORE_RST_EN_REG, 0);
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define sdio_slave_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; _sdio_slave_ll_reset_register(__VA_ARGS__)
+
 /**
  * Initialize the hardware.
  *
@@ -488,7 +518,7 @@ static inline void sdio_slave_ll_host_send_int(slc_dev_t *slc, const sdio_slave_
 }
 
 /**
- * Enable some of the slave interrups (send from host)
+ * Enable some of the slave interrupts (send from host)
  *
  * @param slc Address of the SLC registers
  * @param mask Mask of interrupts to enable, all those set to 0 will be disabled.

components/hal/esp32c6/include/hal/sdio_slave_ll.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -23,6 +23,7 @@
 #include "soc/host_reg.h"
 #include "soc/hinf_struct.h"
 #include "soc/lldesc.h"
+#include "soc/pcr_struct.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -35,7 +36,6 @@ extern "C" {
 /// Get address of the only HINF registers
 #define sdio_slave_ll_get_hinf(ID)  (&HINF)
 
-
 /*
  *  SLC2 DMA Desc struct, aka sdio_slave_ll_desc_t
  *
@@ -75,6 +75,25 @@ typedef enum {
     SDIO_SLAVE_LL_SLVINT_7 = BIT(7),
 } sdio_slave_ll_slvint_t;
 
+/**
+ * @brief Enable the bus clock for the SDIO slave module
+ *
+ * @param enable true to enable, false to disable
+ */
+static inline void sdio_slave_ll_enable_bus_clock(bool enable)
+{
+    PCR.sdio_slave_conf.sdio_slave_clk_en = enable;
+}
+
+/**
+ * @brief Reset the SDIO slave module
+ */
+static inline void sdio_slave_ll_reset_register(void)
+{
+    PCR.sdio_slave_conf.sdio_slave_rst_en = 1;
+    PCR.sdio_slave_conf.sdio_slave_rst_en = 0;
+}
+
 /**
  * Initialize the hardware.
  *
@@ -488,7 +507,7 @@ static inline void sdio_slave_ll_host_send_int(slc_dev_t *slc, const sdio_slave_
 }
 
 /**
- * Enable some of the slave interrups (send from host)
+ * Enable some of the slave interrupts (send from host)
  *
  * @param slc Address of the SLC registers
  * @param mask Mask of interrupts to enable, all those set to 0 will be disabled.