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change(pm/ext): remove ext0_wakeup_clear and ext1_wakeup_clear

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This commit is contained in:
Lou Tianhao
2023-11-20 16:35:27 +08:00
parent 8db9f79bd2
commit b86d550ec5
5 changed files with 2 additions and 56 deletions
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21
components/esp_hw_support/sleep_modes.c
View File

@@ -256,11 +256,9 @@ void esp_sleep_periph_use_8m(bool use_or_not)
static uint32_t get_power_down_flags(void); static uint32_t get_power_down_flags(void);
#if SOC_PM_SUPPORT_EXT0_WAKEUP #if SOC_PM_SUPPORT_EXT0_WAKEUP
static void ext0_wakeup_prepare(void); static void ext0_wakeup_prepare(void);
static void IRAM_ATTR ext0_wakeup_clear(void);
#endif #endif
#if SOC_PM_SUPPORT_EXT1_WAKEUP #if SOC_PM_SUPPORT_EXT1_WAKEUP
static void ext1_wakeup_prepare(void); static void ext1_wakeup_prepare(void);
static void IRAM_ATTR ext1_wakeup_clear(void);
#endif #endif
static esp_err_t timer_wakeup_prepare(int64_t sleep_duration); static esp_err_t timer_wakeup_prepare(int64_t sleep_duration);
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 #if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
@@ -635,16 +633,14 @@ static esp_err_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags, esp_sleep_mode_t m
// Configure pins for external wakeup // Configure pins for external wakeup
if (s_config.wakeup_triggers & RTC_EXT0_TRIG_EN) { if (s_config.wakeup_triggers & RTC_EXT0_TRIG_EN) {
ext0_wakeup_prepare(); ext0_wakeup_prepare();
} else {
ext0_wakeup_clear();
} }
// for !(s_config.wakeup_triggers & RTC_EXT0_TRIG_EN), ext0 wakeup will be turned off in hardware in the real call to sleep
#endif #endif
#if SOC_PM_SUPPORT_EXT1_WAKEUP #if SOC_PM_SUPPORT_EXT1_WAKEUP
if (s_config.wakeup_triggers & RTC_EXT1_TRIG_EN) { if (s_config.wakeup_triggers & RTC_EXT1_TRIG_EN) {
ext1_wakeup_prepare(); ext1_wakeup_prepare();
} else {
ext1_wakeup_clear();
} }
// for !(s_config.wakeup_triggers & RTC_EXT1_TRIG_EN), ext1 wakeup will be turned off in hardware in the real call to sleep
#endif #endif
#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP #if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP
@@ -1478,11 +1474,6 @@ static void ext0_wakeup_prepare(void)
rtcio_hal_input_enable(rtc_gpio_num); rtcio_hal_input_enable(rtc_gpio_num);
} }
static void ext0_wakeup_clear(void)
{
rtcio_hal_ext0_clear_wakeup_pins();
}
#endif // SOC_PM_SUPPORT_EXT0_WAKEUP #endif // SOC_PM_SUPPORT_EXT0_WAKEUP
#if SOC_PM_SUPPORT_EXT1_WAKEUP #if SOC_PM_SUPPORT_EXT1_WAKEUP
@@ -1641,14 +1632,6 @@ static void ext1_wakeup_prepare(void)
rtc_hal_ext1_set_wakeup_pins(s_config.ext1_rtc_gpio_mask, s_config.ext1_trigger_mode); rtc_hal_ext1_set_wakeup_pins(s_config.ext1_rtc_gpio_mask, s_config.ext1_trigger_mode);
} }
static void ext1_wakeup_clear(void)
{
// Clear state from previous wakeup
rtc_hal_ext1_clear_wakeup_status();
// Clear all ext1 wakup-source setting
rtc_hal_ext1_clear_wakeup_pins();
}
uint64_t esp_sleep_get_ext1_wakeup_status(void) uint64_t esp_sleep_get_ext1_wakeup_status(void)
{ {
if (esp_sleep_get_wakeup_cause() != ESP_SLEEP_WAKEUP_EXT1) { if (esp_sleep_get_wakeup_cause() != ESP_SLEEP_WAKEUP_EXT1) {

10
components/hal/esp32/include/hal/rtc_io_ll.h
View File

@@ -373,16 +373,6 @@ static inline void rtcio_ll_ext0_set_wakeup_pin(int rtcio_num, int level)
level , RTC_CNTL_EXT_WAKEUP0_LV_S); level , RTC_CNTL_EXT_WAKEUP0_LV_S);
} }
/**
* Clear ext0 wakeup trigger.
*/
static inline void rtcio_ll_ext0_clear_wakeup_pins(void)
{
REG_SET_FIELD(RTC_IO_EXT_WAKEUP0_REG, RTC_IO_EXT_WAKEUP0_SEL, 0);
// Clear level which will trigger wakeup
SET_PERI_REG_BITS(RTC_CNTL_EXT_WAKEUP_CONF_REG, 0x1,
0 , RTC_CNTL_EXT_WAKEUP0_LV_S);
}
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

11
components/hal/esp32s2/include/hal/rtc_io_ll.h
View File

@@ -376,17 +376,6 @@ static inline void rtcio_ll_ext0_set_wakeup_pin(int rtcio_num, int level)
level , RTC_CNTL_EXT_WAKEUP0_LV_S); level , RTC_CNTL_EXT_WAKEUP0_LV_S);
} }
/**
* Clear ext0 wakeup trigger.
*/
static inline void rtcio_ll_ext0_clear_wakeup_pins(void)
{
REG_SET_FIELD(RTC_IO_EXT_WAKEUP0_REG, RTC_IO_EXT_WAKEUP0_SEL, 0);
// Clear level which will trigger wakeup
SET_PERI_REG_BITS(RTC_CNTL_EXT_WAKEUP_CONF_REG, 0x1,
0 , RTC_CNTL_EXT_WAKEUP0_LV_S);
}
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

11
components/hal/esp32s3/include/hal/rtc_io_ll.h
View File

@@ -391,17 +391,6 @@ static inline void rtcio_ll_ext0_set_wakeup_pin(int rtcio_num, int level)
level , RTC_CNTL_EXT_WAKEUP0_LV_S); level , RTC_CNTL_EXT_WAKEUP0_LV_S);
} }
/**
* Clear ext0 wakeup trigger.
*/
static inline void rtcio_ll_ext0_clear_wakeup_pins(void)
{
REG_SET_FIELD(RTC_IO_EXT_WAKEUP0_REG, RTC_IO_EXT_WAKEUP0_SEL, 0);
// Clear level which will trigger wakeup
SET_PERI_REG_BITS(RTC_CNTL_EXT_WAKEUP_CONF_REG, 0x1,
0 , RTC_CNTL_EXT_WAKEUP0_LV_S);
}
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

5
components/hal/include/hal/rtc_io_hal.h
View File

@@ -266,11 +266,6 @@ void rtcio_hal_set_direction_in_sleep(int rtcio_num, rtc_gpio_mode_t mode);
*/ */
#define rtcio_hal_ext0_set_wakeup_pin(rtcio_num, level) rtcio_ll_ext0_set_wakeup_pin(rtcio_num, level) #define rtcio_hal_ext0_set_wakeup_pin(rtcio_num, level) rtcio_ll_ext0_set_wakeup_pin(rtcio_num, level)
/**
* Clear ext0 wakeup trigger.
*/
#define rtcio_hal_ext0_clear_wakeup_pins() rtcio_ll_ext0_clear_wakeup_pins()
#endif #endif
#if SOC_RTCIO_HOLD_SUPPORTED && SOC_RTCIO_INPUT_OUTPUT_SUPPORTED #if SOC_RTCIO_HOLD_SUPPORTED && SOC_RTCIO_INPUT_OUTPUT_SUPPORTED