forked from espressif/esp-idf
Merge branch 'change/update_cache_header_on_c5' into 'master'
change(cache): sync the cache register info to TRM See merge request espressif/esp-idf!36646
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@@ -103,7 +103,6 @@ static void * cpu_domain_dev_sleep_frame_alloc_and_init(const cpu_domain_dev_reg
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static inline void * cpu_domain_cache_config_sleep_frame_alloc_and_init(void)
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static inline void * cpu_domain_cache_config_sleep_frame_alloc_and_init(void)
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{
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{
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const static cpu_domain_dev_regs_region_t regions[] = {
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const static cpu_domain_dev_regs_region_t regions[] = {
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{ .start = CACHE_L1_ICACHE_CTRL_REG, .end = CACHE_L1_BYPASS_CACHE_CONF_REG + 4 },
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{ .start = CACHE_L1_CACHE_AUTOLOAD_CTRL_REG, .end = CACHE_L1_CACHE_AUTOLOAD_SCT1_SIZE_REG + 4 },
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{ .start = CACHE_L1_CACHE_AUTOLOAD_CTRL_REG, .end = CACHE_L1_CACHE_AUTOLOAD_SCT1_SIZE_REG + 4 },
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};
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};
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return cpu_domain_dev_sleep_frame_alloc_and_init(regions, sizeof(regions) / sizeof(regions[0]));
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return cpu_domain_dev_sleep_frame_alloc_and_init(regions, sizeof(regions) / sizeof(regions[0]));
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@@ -103,7 +103,6 @@ static void * cpu_domain_dev_sleep_frame_alloc_and_init(const cpu_domain_dev_reg
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static inline void * cpu_domain_cache_config_sleep_frame_alloc_and_init(void)
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static inline void * cpu_domain_cache_config_sleep_frame_alloc_and_init(void)
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{
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{
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const static cpu_domain_dev_regs_region_t regions[] = {
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const static cpu_domain_dev_regs_region_t regions[] = {
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{ .start = CACHE_L1_CACHE_CTRL_REG, .end = CACHE_L1_CACHE_CTRL_REG + 4 },
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{ .start = CACHE_L1_CACHE_AUTOLOAD_CTRL_REG, .end = CACHE_L1_CACHE_AUTOLOAD_SCT1_SIZE_REG + 4 },
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{ .start = CACHE_L1_CACHE_AUTOLOAD_CTRL_REG, .end = CACHE_L1_CACHE_AUTOLOAD_SCT1_SIZE_REG + 4 },
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};
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};
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return cpu_domain_dev_sleep_frame_alloc_and_init(regions, sizeof(regions) / sizeof(regions[0]));
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return cpu_domain_dev_sleep_frame_alloc_and_init(regions, sizeof(regions) / sizeof(regions[0]));
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@@ -118,7 +118,6 @@ static inline void * cpu_domain_intpri_sleep_frame_alloc_and_init(void)
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static inline void * cpu_domain_cache_config_sleep_frame_alloc_and_init(void)
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static inline void * cpu_domain_cache_config_sleep_frame_alloc_and_init(void)
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{
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{
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const static cpu_domain_dev_regs_region_t regions[] = {
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const static cpu_domain_dev_regs_region_t regions[] = {
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{ .start = CACHE_L1_CACHE_CTRL_REG, .end = CACHE_L1_CACHE_CTRL_REG + 4 },
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{ .start = CACHE_L1_CACHE_WRAP_AROUND_CTRL_REG, .end = CACHE_L1_CACHE_WRAP_AROUND_CTRL_REG + 4 }
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{ .start = CACHE_L1_CACHE_WRAP_AROUND_CTRL_REG, .end = CACHE_L1_CACHE_WRAP_AROUND_CTRL_REG + 4 }
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};
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};
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return cpu_domain_dev_sleep_frame_alloc_and_init(regions, sizeof(regions) / sizeof(regions[0]));
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return cpu_domain_dev_sleep_frame_alloc_and_init(regions, sizeof(regions) / sizeof(regions[0]));
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