From 4d5aa82cea29ff0e7c4439b3cefbf83a17616518 Mon Sep 17 00:00:00 2001 From: wangmengyang Date: Fri, 1 Jul 2022 17:39:51 +0800 Subject: [PATCH 1/2] component/bt: reset Bluetooth hardware during controller inititalization on ESP32-C3/ESP32-S3 1. Rename MACROs SYSTEM_WIFI_RST_EN register bit fields to be more recognizable 2. reset Bluetooth baseband and MAC bits to fix the issue of task watchdog triggered during controller initialization due to invalid hardware state --- components/bt/controller/esp32c3/bt.c | 1 + components/bt/controller/esp32s3/bt.c | 1 + components/esp_phy/src/phy_init.c | 4 +-- components/esp_system/port/soc/esp32c3/clk.c | 2 +- .../port/soc/esp32c3/system_internal.c | 11 +++---- components/esp_system/port/soc/esp32s3/clk.c | 2 +- .../port/soc/esp32s3/system_internal.c | 8 ++--- components/esp_wifi/esp32c3/esp_adapter.c | 10 +++--- components/esp_wifi/esp32s3/esp_adapter.c | 10 +++--- .../hal/esp32c3/include/hal/clk_gate_ll.h | 2 ++ .../hal/esp32s3/include/hal/clk_gate_ll.h | 2 ++ .../soc/esp32c3/include/soc/syscon_reg.h | 30 +++++++++--------- .../soc/esp32s3/include/soc/syscon_reg.h | 31 +++++++++---------- 13 files changed, 58 insertions(+), 56 deletions(-) diff --git a/components/bt/controller/esp32c3/bt.c b/components/bt/controller/esp32c3/bt.c index 57fcc349a0..4414758474 100644 --- a/components/bt/controller/esp32c3/bt.c +++ b/components/bt/controller/esp32c3/bt.c @@ -1116,6 +1116,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg) #endif periph_module_enable(PERIPH_BT_MODULE); + periph_module_reset(PERIPH_BT_MODULE); esp_phy_enable(); s_lp_stat.phy_enabled = 1; diff --git a/components/bt/controller/esp32s3/bt.c b/components/bt/controller/esp32s3/bt.c index 06cb5eb848..84ae796326 100644 --- a/components/bt/controller/esp32s3/bt.c +++ b/components/bt/controller/esp32s3/bt.c @@ -1083,6 +1083,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg) #endif periph_module_enable(PERIPH_BT_MODULE); + periph_module_reset(PERIPH_BT_MODULE); esp_phy_enable(); s_lp_stat.phy_enabled = 1; diff --git a/components/esp_phy/src/phy_init.c b/components/esp_phy/src/phy_init.c index f8077bbf73..76f1595171 100644 --- a/components/esp_phy/src/phy_init.c +++ b/components/esp_phy/src/phy_init.c @@ -283,8 +283,8 @@ void IRAM_ATTR esp_wifi_bt_power_domain_on(void) if (s_wifi_bt_pd_controller.count++ == 0) { CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_WIFI_FORCE_PD); #if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 - SET_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_BB_RST | SYSTEM_FE_RST); - CLEAR_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_BB_RST | SYSTEM_FE_RST); + SET_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_WIFIBB_RST | SYSTEM_FE_RST); + CLEAR_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_WIFIBB_RST | SYSTEM_FE_RST); #endif CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_ISO); } diff --git a/components/esp_system/port/soc/esp32c3/clk.c b/components/esp_system/port/soc/esp32c3/clk.c index b6758d3749..5f86775173 100644 --- a/components/esp_system/port/soc/esp32c3/clk.c +++ b/components/esp_system/port/soc/esp32c3/clk.c @@ -245,7 +245,7 @@ __attribute__((weak)) void esp_perip_clk_init(void) SYSTEM_CRYPTO_RSA_CLK_EN; wifi_bt_sdio_clk = SYSTEM_WIFI_CLK_WIFI_EN | SYSTEM_WIFI_CLK_BT_EN_M | - SYSTEM_WIFI_CLK_UNUSED_BIT5 | + SYSTEM_WIFI_CLK_I2C_CLK_EN | SYSTEM_WIFI_CLK_UNUSED_BIT12; } diff --git a/components/esp_system/port/soc/esp32c3/system_internal.c b/components/esp_system/port/soc/esp32c3/system_internal.c index 77020b3a91..1a5db6ea10 100644 --- a/components/esp_system/port/soc/esp32c3/system_internal.c +++ b/components/esp_system/port/soc/esp32c3/system_internal.c @@ -95,13 +95,10 @@ void IRAM_ATTR esp_restart_noos(void) // Reset wifi/bluetooth/ethernet/sdio (bb/mac) SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, - SYSTEM_BB_RST | SYSTEM_FE_RST | SYSTEM_MAC_RST | - SYSTEM_BT_RST | SYSTEM_BTMAC_RST | SYSTEM_SDIO_RST | - SYSTEM_EMAC_RST | SYSTEM_MACPWR_RST | - SYSTEM_RW_BTMAC_RST | SYSTEM_RW_BTLP_RST | BLE_REG_REST_BIT - |BLE_PWR_REG_REST_BIT | BLE_BB_REG_REST_BIT); - - + SYSTEM_WIFIBB_RST | SYSTEM_FE_RST | SYSTEM_WIFIMAC_RST | + SYSTEM_SDIO_RST | SYSTEM_EMAC_RST | SYSTEM_MACPWR_RST | + SYSTEM_BTBB_RST | SYSTEM_BTBB_REG_RST | + SYSTEM_RW_BTMAC_RST | SYSTEM_RW_BTLP_RST | SYSTEM_RW_BTMAC_REG_RST | SYSTEM_RW_BTLP_REG_RST); REG_WRITE(SYSTEM_CORE_RST_EN_REG, 0); // Reset uart0 core first, then reset apb side. diff --git a/components/esp_system/port/soc/esp32s3/clk.c b/components/esp_system/port/soc/esp32s3/clk.c index 15610ae9be..ca2f282820 100644 --- a/components/esp_system/port/soc/esp32s3/clk.c +++ b/components/esp_system/port/soc/esp32s3/clk.c @@ -265,7 +265,7 @@ __attribute__((weak)) void esp_perip_clk_init(void) SYSTEM_CRYPTO_RSA_CLK_EN; wifi_bt_sdio_clk = SYSTEM_WIFI_CLK_WIFI_EN | SYSTEM_WIFI_CLK_BT_EN_M | - SYSTEM_WIFI_CLK_UNUSED_BIT5 | + SYSTEM_WIFI_CLK_I2C_CLK_EN | SYSTEM_WIFI_CLK_UNUSED_BIT12 | SYSTEM_WIFI_CLK_SDIO_HOST_EN; } diff --git a/components/esp_system/port/soc/esp32s3/system_internal.c b/components/esp_system/port/soc/esp32s3/system_internal.c index 551e90e724..0576fa2965 100644 --- a/components/esp_system/port/soc/esp32s3/system_internal.c +++ b/components/esp_system/port/soc/esp32s3/system_internal.c @@ -95,10 +95,10 @@ void IRAM_ATTR esp_restart_noos(void) // Reset wifi/bluetooth/ethernet/sdio (bb/mac) SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, - SYSTEM_BB_RST | SYSTEM_FE_RST | SYSTEM_MAC_RST | - SYSTEM_BT_RST | SYSTEM_BTMAC_RST | SYSTEM_SDIO_RST | - SYSTEM_SDIO_HOST_RST | SYSTEM_EMAC_RST | SYSTEM_MACPWR_RST | - SYSTEM_RW_BTMAC_RST | SYSTEM_RW_BTLP_RST | SYSTEM_BLE_REG_RST | SYSTEM_PWR_REG_RST | SYSTEM_BB_REG_RST); + SYSTEM_WIFIBB_RST | SYSTEM_FE_RST | SYSTEM_WIFIMAC_RST | + SYSTEM_SDIO_RST | SYSTEM_EMAC_RST | SYSTEM_MACPWR_RST | + SYSTEM_BTBB_RST | SYSTEM_BTBB_REG_RST | + SYSTEM_RW_BTMAC_RST | SYSTEM_RW_BTLP_RST | SYSTEM_RW_BTMAC_REG_RST | SYSTEM_RW_BTLP_REG_RST); REG_WRITE(SYSTEM_CORE_RST_EN_REG, 0); // Reset timer/spi/uart diff --git a/components/esp_wifi/esp32c3/esp_adapter.c b/components/esp_wifi/esp32c3/esp_adapter.c index 9394f3cc55..fad0743f4c 100644 --- a/components/esp_wifi/esp32c3/esp_adapter.c +++ b/components/esp_wifi/esp32c3/esp_adapter.c @@ -391,15 +391,15 @@ static void IRAM_ATTR timer_arm_us_wrapper(void *ptimer, uint32_t us, bool repea static void wifi_reset_mac_wrapper(void) { - SET_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_MAC_RST); - CLEAR_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_MAC_RST); + SET_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_WIFIMAC_RST); + CLEAR_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_WIFIMAC_RST); } static void IRAM_ATTR wifi_rtc_enable_iso_wrapper(void) { #if CONFIG_MAC_BB_PD esp_mac_bb_power_down(); - SET_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_MAC_RST); + SET_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_WIFIMAC_RST); #endif } @@ -407,8 +407,8 @@ static void IRAM_ATTR wifi_rtc_disable_iso_wrapper(void) { #if CONFIG_MAC_BB_PD esp_mac_bb_power_up(); - SET_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_MAC_RST); - CLEAR_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_MAC_RST); + SET_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_WIFIMAC_RST); + CLEAR_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_WIFIMAC_RST); #endif } diff --git a/components/esp_wifi/esp32s3/esp_adapter.c b/components/esp_wifi/esp32s3/esp_adapter.c index 78c978106b..b209773b10 100644 --- a/components/esp_wifi/esp32s3/esp_adapter.c +++ b/components/esp_wifi/esp32s3/esp_adapter.c @@ -445,15 +445,15 @@ static void IRAM_ATTR timer_arm_us_wrapper(void *ptimer, uint32_t us, bool repea static void wifi_reset_mac_wrapper(void) { - SET_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_MAC_RST); - CLEAR_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_MAC_RST); + SET_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_WIFIMAC_RST); + CLEAR_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_WIFIMAC_RST); } static void IRAM_ATTR wifi_rtc_enable_iso_wrapper(void) { #if CONFIG_MAC_BB_PD esp_mac_bb_power_down(); - SET_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_MAC_RST); + SET_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_WIFIMAC_RST); #endif } @@ -461,8 +461,8 @@ static void IRAM_ATTR wifi_rtc_disable_iso_wrapper(void) { #if CONFIG_MAC_BB_PD esp_mac_bb_power_up(); - SET_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_MAC_RST); - CLEAR_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_MAC_RST); + SET_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_WIFIMAC_RST); + CLEAR_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_WIFIMAC_RST); #endif } diff --git a/components/hal/esp32c3/include/hal/clk_gate_ll.h b/components/hal/esp32c3/include/hal/clk_gate_ll.h index f7382650d5..b90813919f 100644 --- a/components/hal/esp32c3/include/hal/clk_gate_ll.h +++ b/components/hal/esp32c3/include/hal/clk_gate_ll.h @@ -97,6 +97,8 @@ static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool en return SYSTEM_RMT_RST; case PERIPH_LEDC_MODULE: return SYSTEM_LEDC_RST; + case PERIPH_BT_MODULE: + return (SYSTEM_BTBB_RST | SYSTEM_BTBB_REG_RST | SYSTEM_RW_BTMAC_RST | SYSTEM_RW_BTLP_RST | SYSTEM_RW_BTMAC_REG_RST | SYSTEM_RW_BTLP_REG_RST); case PERIPH_UART0_MODULE: return SYSTEM_UART_RST; case PERIPH_UART1_MODULE: diff --git a/components/hal/esp32s3/include/hal/clk_gate_ll.h b/components/hal/esp32s3/include/hal/clk_gate_ll.h index a3b5afbe00..29f7508ff1 100644 --- a/components/hal/esp32s3/include/hal/clk_gate_ll.h +++ b/components/hal/esp32s3/include/hal/clk_gate_ll.h @@ -111,6 +111,8 @@ static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool en return SYSTEM_RMT_RST; case PERIPH_LEDC_MODULE: return SYSTEM_LEDC_RST; + case PERIPH_BT_MODULE: + return (SYSTEM_BTBB_RST | SYSTEM_BTBB_REG_RST | SYSTEM_RW_BTMAC_RST | SYSTEM_RW_BTLP_RST | SYSTEM_RW_BTMAC_REG_RST | SYSTEM_RW_BTLP_REG_RST); case PERIPH_UART0_MODULE: return SYSTEM_UART_RST; case PERIPH_UART1_MODULE: diff --git a/components/soc/esp32c3/include/soc/syscon_reg.h b/components/soc/esp32c3/include/soc/syscon_reg.h index cc5a3c68cb..2721f4a1f5 100644 --- a/components/soc/esp32c3/include/soc/syscon_reg.h +++ b/components/soc/esp32c3/include/soc/syscon_reg.h @@ -178,7 +178,7 @@ extern "C" { #define SYSTEM_WIFI_CLK_WIFI_EN_M ((SYSTEM_WIFI_CLK_WIFI_EN_V)<<(SYSTEM_WIFI_CLK_WIFI_EN_S)) #define SYSTEM_WIFI_CLK_WIFI_EN_V 0x0 #define SYSTEM_WIFI_CLK_WIFI_EN_S 0 -/* Mask for all Bluetooth clock bits, 11, 12, 16, 17 */ +/* Mask for all Bluetooth clock bits, 11, 16, 17 */ #define SYSTEM_WIFI_CLK_BT_EN 0x0 #define SYSTEM_WIFI_CLK_BT_EN_M ((SYSTEM_WIFI_CLK_BT_EN_V)<<(SYSTEM_WIFI_CLK_BT_EN_S)) #define SYSTEM_WIFI_CLK_BT_EN_V 0x0 @@ -194,7 +194,7 @@ extern "C" { /* Remaining single bit clock masks */ #define SYSTEM_WIFI_CLK_SDIOSLAVE_EN BIT(4) -#define SYSTEM_WIFI_CLK_UNUSED_BIT5 BIT(5) +#define SYSTEM_WIFI_CLK_I2C_CLK_EN BIT(5) #define SYSTEM_WIFI_CLK_UNUSED_BIT12 BIT(12) #define SYSTEM_WIFI_CLK_EMAC_EN BIT(14) #define SYSTEM_WIFI_CLK_RNG_EN BIT(15) @@ -203,19 +203,19 @@ extern "C" { #define SYSTEM_WIFI_RST_EN_REG SYSCON_WIFI_RST_EN_REG /* SYSTEM_WIFI_RST_EN : R/W ;bitpos:[31:0] ;default: 32'h0 ; */ /*description: */ -#define SYSTEM_BB_RST BIT(0) -#define SYSTEM_FE_RST BIT(1) -#define SYSTEM_MAC_RST BIT(2) -#define SYSTEM_BT_RST BIT(3) -#define SYSTEM_BTMAC_RST BIT(4) -#define SYSTEM_SDIO_RST BIT(5) -#define SYSTEM_EMAC_RST BIT(7) -#define SYSTEM_MACPWR_RST BIT(8) -#define SYSTEM_RW_BTMAC_RST BIT(9) -#define SYSTEM_RW_BTLP_RST BIT(10) -#define BLE_REG_REST_BIT BIT(11) -#define BLE_PWR_REG_REST_BIT BIT(12) -#define BLE_BB_REG_REST_BIT BIT(13) +#define SYSTEM_WIFIBB_RST BIT(0) +#define SYSTEM_FE_RST BIT(1) +#define SYSTEM_WIFIMAC_RST BIT(2) +#define SYSTEM_BTBB_RST BIT(3) /* Bluetooth Baseband */ +#define SYSTEM_BTMAC_RST BIT(4) /* deprecated */ +#define SYSTEM_SDIO_RST BIT(5) +#define SYSTEM_EMAC_RST BIT(7) +#define SYSTEM_MACPWR_RST BIT(8) +#define SYSTEM_RW_BTMAC_RST BIT(9) /* Bluetooth MAC */ +#define SYSTEM_RW_BTLP_RST BIT(10) /* Bluetooth Low Power Module */ +#define SYSTEM_RW_BTMAC_REG_RST BIT(11) /* Bluetooth MAC Regsiters */ +#define SYSTEM_RW_BTLP_REG_RST BIT(12) /* Bluetooth Low Power Registers */ +#define SYSTEM_BTBB_REG_RST BIT(13) /* Bluetooth Baseband Registers */ #define SYSCON_HOST_INF_SEL_REG (DR_REG_SYSCON_BASE + 0x01C) /* SYSCON_PERI_IO_SWAP : R/W ;bitpos:[7:0] ;default: 8'h0 ; */ diff --git a/components/soc/esp32s3/include/soc/syscon_reg.h b/components/soc/esp32s3/include/soc/syscon_reg.h index d5dae5f1b3..38607adc1c 100644 --- a/components/soc/esp32s3/include/soc/syscon_reg.h +++ b/components/soc/esp32s3/include/soc/syscon_reg.h @@ -179,7 +179,7 @@ extern "C" { #define SYSTEM_WIFI_CLK_WIFI_EN_M ((SYSTEM_WIFI_CLK_WIFI_EN_V)<<(SYSTEM_WIFI_CLK_WIFI_EN_S)) #define SYSTEM_WIFI_CLK_WIFI_EN_V 0x0 #define SYSTEM_WIFI_CLK_WIFI_EN_S 0 -/* Mask for all Bluetooth clock bits, 11, 12, 16, 17 */ +/* Mask for all Bluetooth clock bits, 11, 16, 17 */ #define SYSTEM_WIFI_CLK_BT_EN 0x0 #define SYSTEM_WIFI_CLK_BT_EN_M ((SYSTEM_WIFI_CLK_BT_EN_V)<<(SYSTEM_WIFI_CLK_BT_EN_S)) #define SYSTEM_WIFI_CLK_BT_EN_V 0x0 @@ -187,14 +187,13 @@ extern "C" { /* Mask for clock bits used by both WIFI and Bluetooth, 0, 1, 2, 3, 7, 8, 9, 10, 19, 20, 21, 22, 23 */ #define SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M 0x78078F -/* Digital team to check */ //bluetooth baseband bit11 #define SYSTEM_BT_BASEBAND_EN BIT(11) //bluetooth LC bit16 and bit17 #define SYSTEM_BT_LC_EN (BIT(16) | BIT(17)) /* Remaining single bit clock masks */ -#define SYSTEM_WIFI_CLK_UNUSED_BIT5 BIT(5) +#define SYSTEM_WIFI_CLK_I2C_CLK_EN BIT(5) #define SYSTEM_WIFI_CLK_UNUSED_BIT12 BIT(12) #define SYSTEM_WIFI_CLK_SDIO_HOST_EN BIT(13) #define SYSTEM_WIFI_CLK_EMAC_EN BIT(14) @@ -208,19 +207,19 @@ extern "C" { #define SYSTEM_WIFI_RST_M ((SYSTEM_WIFI_RST_V) << (SYSTEM_WIFI_RST_S)) #define SYSTEM_WIFI_RST_V 0xFFFFFFFF #define SYSTEM_WIFI_RST_S 0 -#define SYSTEM_BB_REG_RST (BIT(13)) -#define SYSTEM_PWR_REG_RST (BIT(12)) -#define SYSTEM_BLE_REG_RST (BIT(11)) -#define SYSTEM_RW_BTLP_RST (BIT(10)) -#define SYSTEM_RW_BTMAC_RST (BIT(9)) -#define SYSTEM_MACPWR_RST (BIT(8)) -#define SYSTEM_EMAC_RST (BIT(7)) -#define SYSTEM_SDIO_RST (BIT(5)) -#define SYSTEM_BTMAC_RST (BIT(4)) -#define SYSTEM_BT_RST (BIT(3)) -#define SYSTEM_MAC_RST (BIT(2)) -#define SYSTEM_FE_RST (BIT(1)) -#define SYSTEM_BB_RST (BIT(0)) +#define SYSTEM_WIFIBB_RST BIT(0) +#define SYSTEM_FE_RST BIT(1) +#define SYSTEM_WIFIMAC_RST BIT(2) +#define SYSTEM_BTBB_RST BIT(3) /* Bluetooth Baseband */ +#define SYSTEM_BTMAC_RST BIT(4) /* deprecated */ +#define SYSTEM_SDIO_RST BIT(5) +#define SYSTEM_EMAC_RST BIT(7) +#define SYSTEM_MACPWR_RST BIT(8) +#define SYSTEM_RW_BTMAC_RST BIT(9) /* Bluetooth MAC */ +#define SYSTEM_RW_BTLP_RST BIT(10) /* Bluetooth Low Power Module */ +#define SYSTEM_RW_BTMAC_REG_RST BIT(11) /* Bluetooth MAC Regsiters */ +#define SYSTEM_RW_BTLP_REG_RST BIT(12) /* Bluetooth Low Power Registers */ +#define SYSTEM_BTBB_REG_RST BIT(13) /* Bluetooth Baseband Registers */ #define SYSCON_HOST_INF_SEL_REG (DR_REG_SYSCON_BASE + 0x1C) /* SYSCON_PERI_IO_SWAP : R/W ;bitpos:[7:0] ;default: 8'h0 ; */ From eb15c547f23cd0cac07beeb0d855ada3ab743c20 Mon Sep 17 00:00:00 2001 From: wangmengyang Date: Mon, 11 Jul 2022 11:09:06 +0800 Subject: [PATCH 2/2] fix licence copyright for header file syscon_reg.h on ESP32C3 and ESP32S3 --- .../soc/esp32c3/include/soc/syscon_reg.h | 18 +++++------------- .../soc/esp32s3/include/soc/syscon_reg.h | 18 +++++------------- 2 files changed, 10 insertions(+), 26 deletions(-) diff --git a/components/soc/esp32c3/include/soc/syscon_reg.h b/components/soc/esp32c3/include/soc/syscon_reg.h index 2721f4a1f5..c8719754d8 100644 --- a/components/soc/esp32c3/include/soc/syscon_reg.h +++ b/components/soc/esp32c3/include/soc/syscon_reg.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/** + * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _SOC_SYSCON_REG_H_ #define _SOC_SYSCON_REG_H_ diff --git a/components/soc/esp32s3/include/soc/syscon_reg.h b/components/soc/esp32s3/include/soc/syscon_reg.h index 38607adc1c..f3f08c1e4f 100644 --- a/components/soc/esp32s3/include/soc/syscon_reg.h +++ b/components/soc/esp32s3/include/soc/syscon_reg.h @@ -1,16 +1,8 @@ -// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/** + * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _SOC_SYSCON_REG_H_ #define _SOC_SYSCON_REG_H_