feedc0de/esp-idf
1
0
Fork 0
forked from espressif/esp-idf
Code Pull Requests Activity

bugfix(driver/gpio):update the incorrect comment

Browse Source 
There are some register description errors in parts of rom/gpio.h
This commit update the incorrect comments in rom/gpio.h And now
esp_rom_gpio.h is recommend instead of rom/gpio.h. So this commit adds
macro SIG_GPIO_OUT_IDX in esp_rom_gpio_connect_out_signal
function and removes the reference to gpio.h in some source files.

Closes https://github.com/espressif/esp-idf/issues/11737
This commit is contained in:
Chen Jichang
2023-06-29 13:01:34 +08:00
parent b5bc96693e
commit b9c22b126a
19 changed files with 276 additions and 334 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c2.c
View File

@@ -10,7 +10,6 @@
#include "esp_err.h"
#include "esp_log.h"
#include "esp_rom_gpio.h"
#include "esp32c2/rom/gpio.h"
#include "esp32c2/rom/spi_flash.h"
#include "esp32c2/rom/efuse.h"
#include "soc/gpio_periph.h"

1
components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c3.c
View File

@@ -11,7 +11,6 @@
#include "esp_log.h"
#include "esp_rom_gpio.h"
#include "esp_rom_efuse.h"
#include "esp32c3/rom/gpio.h"
#include "esp32c3/rom/spi_flash.h"
#include "esp32c3/rom/efuse.h"
#include "soc/gpio_periph.h"

1
components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c6.c
View File

@@ -11,7 +11,6 @@
#include "esp_log.h"
#include "esp_rom_gpio.h"
#include "esp_rom_efuse.h"
#include "esp32c6/rom/gpio.h"
#include "esp32c6/rom/spi_flash.h"
#include "esp32c6/rom/efuse.h"
#include "soc/gpio_periph.h"

1
components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h2.c
View File

@@ -11,7 +11,6 @@
#include "esp_log.h"
#include "esp_rom_gpio.h"
#include "esp_rom_efuse.h"
#include "esp32h2/rom/gpio.h"
#include "esp32h2/rom/spi_flash.h"
#include "esp32h2/rom/efuse.h"
#include "soc/gpio_periph.h"

5
components/bootloader_support/src/bootloader_utility.c
View File

@@ -26,28 +26,24 @@
#include "esp32c3/rom/efuse.h"
#include "esp32c3/rom/crc.h"
#include "esp32c3/rom/uart.h"
#include "esp32c3/rom/gpio.h"
#include "esp32c3/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/rom/efuse.h"
#include "esp32c2/rom/crc.h"
#include "esp32c2/rom/rtc.h"
#include "esp32c2/rom/uart.h"
#include "esp32c2/rom/gpio.h"
#include "esp32c2/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32C6
#include "esp32c6/rom/efuse.h"
#include "esp32c6/rom/crc.h"
#include "esp32c6/rom/rtc.h"
#include "esp32c6/rom/uart.h"
#include "esp32c6/rom/gpio.h"
#include "esp32c6/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rom/efuse.h"
#include "esp32h2/rom/crc.h"
#include "esp32h2/rom/rtc.h"
#include "esp32h2/rom/uart.h"
#include "esp32h2/rom/gpio.h"
#include "esp32h2/rom/secure_boot.h"
#else // CONFIG_IDF_TARGET_*
@@ -57,7 +53,6 @@
#include "soc/soc.h"
#include "soc/rtc.h"
#include "soc/gpio_periph.h"
#include "soc/efuse_periph.h"
#include "soc/rtc_periph.h"
#include "soc/timer_periph.h"

2
components/esp_hw_support/port/esp32c2/rtc_clk.c
View File

@@ -12,10 +12,8 @@
#include "sdkconfig.h"
#include "esp32c2/rom/rtc.h"
#include "esp32c2/rom/uart.h"
#include "esp32c2/rom/gpio.h"
#include "soc/rtc.h"
#include "esp_private/rtc_clk.h"
#include "hal/gpio_ll.h"
#include "soc/io_mux_reg.h"
#include "soc/soc.h"
#include "esp_hw_log.h"

11
components/esp_psram/esp32/esp_psram_impl_quad.c
View File

@@ -3,7 +3,7 @@
*/
/*
* SPDX-FileCopyrightText: 2013-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2013-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -20,7 +20,6 @@
#include "esp32/rom/spi_flash.h"
#include "esp32/rom/cache.h"
#include "esp32/rom/efuse.h"
#include "esp32/rom/gpio.h"
#include "esp_rom_efuse.h"
#include "soc/dport_reg.h"
#include "soc/efuse_periph.h"
@@ -393,7 +392,8 @@ static int psram_cmd_config(psram_spi_num_t spi_num, psram_cmd_t* pInData)
return 0;
}
static void psram_cmd_end(int spi_num) {
static void psram_cmd_end(int spi_num)
{
while (READ_PERI_REG(SPI_CMD_REG(spi_num)) & SPI_USR);
WRITE_PERI_REG(SPI_USER_REG(spi_num), backup_usr[spi_num]);
WRITE_PERI_REG(SPI_USER1_REG(spi_num), backup_usr1[spi_num]);
@@ -591,7 +591,10 @@ static esp_err_t IRAM_ATTR psram_2t_mode_enable(psram_spi_num_t spi_num)
// setp3: keep cs as high level
// send 128 cycles clock
// send 1 bit high levle in ninth clock from the back to PSRAM SIO1
GPIO_OUTPUT_SET(D0WD_PSRAM_CS_IO, 1);
static gpio_hal_context_t _gpio_hal = {
.dev = GPIO_HAL_GET_HW(GPIO_PORT_0)
};
gpio_hal_set_level(&_gpio_hal, D0WD_PSRAM_CS_IO, 1);
esp_rom_gpio_connect_out_signal(D0WD_PSRAM_CS_IO, SIG_GPIO_OUT_IDX, 0, 0);
esp_rom_gpio_connect_out_signal(PSRAM_SPID_SD1_IO, SPIQ_OUT_IDX, 0, 0);

37
components/esp_rom/include/esp32c2/rom/gpio.h
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -28,8 +28,8 @@ extern "C" {
#define GPIO_ID_PIN(n) (GPIO_ID_PIN0+(n))
#define GPIO_PIN_ADDR(i) (GPIO_PIN0_REG + i*4)
#define GPIO_FUNC_IN_HIGH 0x38
#define GPIO_FUNC_IN_LOW 0x3C
#define GPIO_FUNC_IN_HIGH 0x1E
#define GPIO_FUNC_IN_LOW 0x1F
#define GPIO_ID_IS_PIN_REGISTER(reg_id) \
((reg_id >= GPIO_ID_PIN0) && (reg_id <= GPIO_ID_PIN(GPIO_PIN_COUNT-1)))
@@ -47,7 +47,7 @@ typedef enum {
/**
* @brief Change GPIO(0-31) pin output by setting, clearing, or disabling pins, GPIO0<->BIT(0).
* @brief Change GPIO(0-20) pin output by setting, clearing, or disabling pins, GPIO0<->BIT(0).
* There is no particular ordering guaranteed; so if the order of writes is significant,
* calling code should divide a single call into multiple calls.
*
@@ -64,7 +64,7 @@ typedef enum {
void gpio_output_set(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask);
/**
* @brief Sample the value of GPIO input pins(0-31) and returns a bitmask.
* @brief Sample the value of GPIO input pins(0-20) and returns a bitmask.
*
* @param None
*
@@ -97,10 +97,9 @@ void gpio_pin_wakeup_disable(void);
/**
* @brief set gpio input to a signal, one gpio can input to several signals.
*
* @param uint32_t gpio : gpio number, 0~0x2f
* gpio == 0x3C, input 0 to signal
* gpio == 0x3A, input nothing to signal
* gpio == 0x38, input 1 to signal
* @param uint32_t gpio : gpio number, 0~20
* gpio == 0x1F, input 0 to signal
* gpio == 0x1E, input 1 to signal
*
* @param uint32_t signal_idx : signal index.
*
@@ -113,10 +112,10 @@ void gpio_matrix_in(uint32_t gpio, uint32_t signal_idx, bool inv);
/**
* @brief set signal output to gpio, one signal can output to several gpios.
*
* @param uint32_t gpio : gpio number, 0~0x2f
* @param uint32_t gpio : gpio number, 0~20
*
* @param uint32_t signal_idx : signal index.
* signal_idx == 0x100, cancel output put to the gpio
* signal_idx == 0x80, cancel output put to the gpio
*
* @param bool out_inv : the signal output is invert or not
*
@@ -129,7 +128,7 @@ void gpio_matrix_out(uint32_t gpio, uint32_t signal_idx, bool out_inv, bool oen_
/**
* @brief Select pad as a gpio function from IOMUX.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~20
*
* @return None
*/
@@ -138,7 +137,7 @@ void gpio_pad_select_gpio(uint32_t gpio_num);
/**
* @brief Set pad driver capability.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~20
*
* @param uint32_t drv : 0-3
*
@@ -149,7 +148,7 @@ void gpio_pad_set_drv(uint32_t gpio_num, uint32_t drv);
/**
* @brief Pull up the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~20
*
* @return None
*/
@@ -158,7 +157,7 @@ void gpio_pad_pullup(uint32_t gpio_num);
/**
* @brief Pull down the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~20
*
* @return None
*/
@@ -167,7 +166,7 @@ void gpio_pad_pulldown(uint32_t gpio_num);
/**
* @brief Unhold the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~20
*
* @return None
*/
@@ -176,7 +175,7 @@ void gpio_pad_unhold(uint32_t gpio_num);
/**
* @brief Hold the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~20
*
* @return None
*/
@@ -185,7 +184,7 @@ void gpio_pad_hold(uint32_t gpio_num);
/**
* @brief enable gpio pad input.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~20
*
* @return None
*/
@@ -194,7 +193,7 @@ void gpio_pad_input_enable(uint32_t gpio_num);
/**
* @brief disable gpio pad input.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~20
*
* @return None
*/

37
components/esp_rom/include/esp32c3/rom/gpio.h
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -28,8 +28,8 @@ extern "C" {
#define GPIO_ID_PIN(n) (GPIO_ID_PIN0+(n))
#define GPIO_PIN_ADDR(i) (GPIO_PIN0_REG + i*4)
#define GPIO_FUNC_IN_HIGH 0x38
#define GPIO_FUNC_IN_LOW 0x3C
#define GPIO_FUNC_IN_HIGH 0x1E
#define GPIO_FUNC_IN_LOW 0x1F
#define GPIO_ID_IS_PIN_REGISTER(reg_id) \
((reg_id >= GPIO_ID_PIN0) && (reg_id <= GPIO_ID_PIN(GPIO_PIN_COUNT-1)))
@@ -47,7 +47,7 @@ typedef enum {
/**
* @brief Change GPIO(0-31) pin output by setting, clearing, or disabling pins, GPIO0<->BIT(0).
* @brief Change GPIO(0-21) pin output by setting, clearing, or disabling pins, GPIO0<->BIT(0).
* There is no particular ordering guaranteed; so if the order of writes is significant,
* calling code should divide a single call into multiple calls.
*
@@ -64,7 +64,7 @@ typedef enum {
void gpio_output_set(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask);
/**
* @brief Sample the value of GPIO input pins(0-31) and returns a bitmask.
* @brief Sample the value of GPIO input pins(0-21) and returns a bitmask.
*
* @param None
*
@@ -97,10 +97,9 @@ void gpio_pin_wakeup_disable(void);
/**
* @brief set gpio input to a signal, one gpio can input to several signals.
*
* @param uint32_t gpio : gpio number, 0~0x2f
* gpio == 0x3C, input 0 to signal
* gpio == 0x3A, input nothing to signal
* gpio == 0x38, input 1 to signal
* @param uint32_t gpio : gpio number, 0-21
* gpio == 0x1F, input 0 to signal
* gpio == 0x1E, input 1 to signal
*
* @param uint32_t signal_idx : signal index.
*
@@ -113,10 +112,10 @@ void gpio_matrix_in(uint32_t gpio, uint32_t signal_idx, bool inv);
/**
* @brief set signal output to gpio, one signal can output to several gpios.
*
* @param uint32_t gpio : gpio number, 0~0x2f
* @param uint32_t gpio : gpio number, 0~21
*
* @param uint32_t signal_idx : signal index.
* signal_idx == 0x100, cancel output put to the gpio
* signal_idx == 0x80, cancel output put to the gpio
*
* @param bool out_inv : the signal output is invert or not
*
@@ -129,7 +128,7 @@ void gpio_matrix_out(uint32_t gpio, uint32_t signal_idx, bool out_inv, bool oen_
/**
* @brief Select pad as a gpio function from IOMUX.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~21
*
* @return None
*/
@@ -138,7 +137,7 @@ void gpio_pad_select_gpio(uint32_t gpio_num);
/**
* @brief Set pad driver capability.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~21
*
* @param uint32_t drv : 0-3
*
@@ -149,7 +148,7 @@ void gpio_pad_set_drv(uint32_t gpio_num, uint32_t drv);
/**
* @brief Pull up the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~21
*
* @return None
*/
@@ -158,7 +157,7 @@ void gpio_pad_pullup(uint32_t gpio_num);
/**
* @brief Pull down the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~21
*
* @return None
*/
@@ -167,7 +166,7 @@ void gpio_pad_pulldown(uint32_t gpio_num);
/**
* @brief Unhold the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~21
*
* @return None
*/
@@ -176,7 +175,7 @@ void gpio_pad_unhold(uint32_t gpio_num);
/**
* @brief Hold the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~21
*
* @return None
*/
@@ -185,7 +184,7 @@ void gpio_pad_hold(uint32_t gpio_num);
/**
* @brief enable gpio pad input.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~21
*
* @return None
*/
@@ -194,7 +193,7 @@ void gpio_pad_input_enable(uint32_t gpio_num);
/**
* @brief disable gpio pad input.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~21
*
* @return None
*/

29
components/esp_rom/include/esp32c6/rom/gpio.h
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -47,7 +47,7 @@ typedef enum {
/**
* @brief Change GPIO(0-31) pin output by setting, clearing, or disabling pins, GPIO0<->BIT(0).
* @brief Change GPIO(0-30) pin output by setting, clearing, or disabling pins, GPIO0<->BIT(0).
* There is no particular ordering guaranteed; so if the order of writes is significant,
* calling code should divide a single call into multiple calls.
*
@@ -64,8 +64,7 @@ typedef enum {
void gpio_output_set(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask);
/**
* @brief Sample the value of GPIO input pins(0-31) and returns a bitmask.
*
* @brief Sample the value of GPIO input pins(0-30) and returns a bitmask.
* @param None
*
* @return uint32_t : bitmask for GPIO input pins, BIT(0) for GPIO0.
@@ -97,7 +96,7 @@ void gpio_pin_wakeup_disable(void);
/**
* @brief set gpio input to a signal, one gpio can input to several signals.
*
* @param uint32_t gpio : gpio number, 0~0x2f
* @param uint32_t gpio : gpio number, 0~30
* gpio == 0x3C, input 0 to signal
* gpio == 0x3A, input nothing to signal
* gpio == 0x38, input 1 to signal
@@ -113,10 +112,10 @@ void gpio_matrix_in(uint32_t gpio, uint32_t signal_idx, bool inv);
/**
* @brief set signal output to gpio, one signal can output to several gpios.
*
* @param uint32_t gpio : gpio number, 0~0x2f
* @param uint32_t gpio : gpio number, 0~30
*
* @param uint32_t signal_idx : signal index.
* signal_idx == 0x100, cancel output put to the gpio
* signal_idx == 0x80, cancel output put to the gpio
*
* @param bool out_inv : the signal output is invert or not
*
@@ -129,7 +128,7 @@ void gpio_matrix_out(uint32_t gpio, uint32_t signal_idx, bool out_inv, bool oen_
/**
* @brief Select pad as a gpio function from IOMUX.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~30
*
* @return None
*/
@@ -138,7 +137,7 @@ void gpio_pad_select_gpio(uint32_t gpio_num);
/**
* @brief Set pad driver capability.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~30
*
* @param uint32_t drv : 0-3
*
@@ -149,7 +148,7 @@ void gpio_pad_set_drv(uint32_t gpio_num, uint32_t drv);
/**
* @brief Pull up the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~30
*
* @return None
*/
@@ -158,7 +157,7 @@ void gpio_pad_pullup(uint32_t gpio_num);
/**
* @brief Pull down the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~30
*
* @return None
*/
@@ -167,7 +166,7 @@ void gpio_pad_pulldown(uint32_t gpio_num);
/**
* @brief Unhold the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~30
*
* @return None
*/
@@ -176,7 +175,7 @@ void gpio_pad_unhold(uint32_t gpio_num);
/**
* @brief Hold the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~30
*
* @return None
*/
@@ -185,7 +184,7 @@ void gpio_pad_hold(uint32_t gpio_num);
/**
* @brief enable gpio pad input.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~30
*
* @return None
*/
@@ -194,7 +193,7 @@ void gpio_pad_input_enable(uint32_t gpio_num);
/**
* @brief disable gpio pad input.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~30
*
* @return None
*/

28
components/esp_rom/include/esp32h2/rom/gpio.h
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -47,7 +47,7 @@ typedef enum {
/**
* @brief Change GPIO(0-31) pin output by setting, clearing, or disabling pins, GPIO0<->BIT(0).
* @brief Change GPIO(0-27) pin output by setting, clearing, or disabling pins, GPIO0<->BIT(0).
* There is no particular ordering guaranteed; so if the order of writes is significant,
* calling code should divide a single call into multiple calls.
*
@@ -64,7 +64,7 @@ typedef enum {
void gpio_output_set(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask);
/**
* @brief Sample the value of GPIO input pins(0-31) and returns a bitmask.
* @brief Sample the value of GPIO input pins(0-27) and returns a bitmask.
*
* @param None
*
@@ -97,7 +97,7 @@ void gpio_pin_wakeup_disable(void);
/**
* @brief set gpio input to a signal, one gpio can input to several signals.
*
* @param uint32_t gpio : gpio number, 0~0x2f
* @param uint32_t gpio : gpio number, 0~27
* gpio == 0x3C, input 0 to signal
* gpio == 0x3A, input nothing to signal
* gpio == 0x38, input 1 to signal
@@ -113,10 +113,10 @@ void gpio_matrix_in(uint32_t gpio, uint32_t signal_idx, bool inv);
/**
* @brief set signal output to gpio, one signal can output to several gpios.
*
* @param uint32_t gpio : gpio number, 0~0x2f
* @param uint32_t gpio : gpio number, 0~27
*
* @param uint32_t signal_idx : signal index.
* signal_idx == 0x100, cancel output put to the gpio
* signal_idx == 0x80, cancel output put to the gpio
*
* @param bool out_inv : the signal output is invert or not
*
@@ -129,7 +129,7 @@ void gpio_matrix_out(uint32_t gpio, uint32_t signal_idx, bool out_inv, bool oen_
/**
* @brief Select pad as a gpio function from IOMUX.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~27
*
* @return None
*/
@@ -138,7 +138,7 @@ void gpio_pad_select_gpio(uint32_t gpio_num);
/**
* @brief Set pad driver capability.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~27
*
* @param uint32_t drv : 0-3
*
@@ -149,7 +149,7 @@ void gpio_pad_set_drv(uint32_t gpio_num, uint32_t drv);
/**
* @brief Pull up the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~27
*
* @return None
*/
@@ -158,7 +158,7 @@ void gpio_pad_pullup(uint32_t gpio_num);
/**
* @brief Pull down the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~27
*
* @return None
*/
@@ -167,7 +167,7 @@ void gpio_pad_pulldown(uint32_t gpio_num);
/**
* @brief Unhold the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~27
*
* @return None
*/
@@ -176,7 +176,7 @@ void gpio_pad_unhold(uint32_t gpio_num);
/**
* @brief Hold the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~27
*
* @return None
*/
@@ -185,7 +185,7 @@ void gpio_pad_hold(uint32_t gpio_num);
/**
* @brief enable gpio pad input.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~27
*
* @return None
*/
@@ -194,7 +194,7 @@ void gpio_pad_input_enable(uint32_t gpio_num);
/**
* @brief disable gpio pad input.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~27
*
* @return None
*/

26
components/esp_rom/include/esp32s2/rom/gpio.h
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2010-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2010-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -69,7 +69,7 @@ typedef enum {
void gpio_output_set(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask);
/**
* @brief Change GPIO(32-39) pin output by setting, clearing, or disabling pins, GPIO32<->BIT(0).
* @brief Change GPIO(32-45) pin output by setting, clearing, or disabling pins, GPIO32<->BIT(0).
* There is no particular ordering guaranteed; so if the order of writes is significant,
* calling code should divide a single call into multiple calls.
*
@@ -95,7 +95,7 @@ void gpio_output_set_high(uint32_t set_mask, uint32_t clear_mask, uint32_t enabl
uint32_t gpio_input_get(void);
/**
* @brief Sample the value of GPIO input pins(32-39) and returns a bitmask.
* @brief Sample the value of GPIO input pins(32-46) and returns a bitmask.
*
* @param None
*
@@ -128,7 +128,7 @@ void gpio_pin_wakeup_disable(void);
/**
* @brief set gpio input to a signal, one gpio can input to several signals.
*
* @param uint32_t gpio : gpio number, 0~0x2f
* @param uint32_t gpio : gpio number, 0~46
* gpio == 0x3C, input 0 to signal
* gpio == 0x3A, input nothing to signal
* gpio == 0x38, input 1 to signal
@@ -144,7 +144,7 @@ void gpio_matrix_in(uint32_t gpio, uint32_t signal_idx, bool inv);
/**
* @brief set signal output to gpio, one signal can output to several gpios.
*
* @param uint32_t gpio : gpio number, 0~0x2f
* @param uint32_t gpio : gpio number, 0~46
*
* @param uint32_t signal_idx : signal index.
* signal_idx == 0x100, cancel output put to the gpio
@@ -160,7 +160,7 @@ void gpio_matrix_out(uint32_t gpio, uint32_t signal_idx, bool out_inv, bool oen_
/**
* @brief Select pad as a gpio function from IOMUX.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~46
*
* @return None
*/
@@ -169,7 +169,7 @@ void gpio_pad_select_gpio(uint32_t gpio_num);
/**
* @brief Set pad driver capability.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~46
*
* @param uint32_t drv : 0-3
*
@@ -180,7 +180,7 @@ void gpio_pad_set_drv(uint32_t gpio_num, uint32_t drv);
/**
* @brief Pull up the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~46
*
* @return None
*/
@@ -189,7 +189,7 @@ void gpio_pad_pullup(uint32_t gpio_num);
/**
* @brief Pull down the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~46
*
* @return None
*/
@@ -198,7 +198,7 @@ void gpio_pad_pulldown(uint32_t gpio_num);
/**
* @brief Unhold the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~46
*
* @return None
*/
@@ -207,7 +207,7 @@ void gpio_pad_unhold(uint32_t gpio_num);
/**
* @brief Hold the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~46
*
* @return None
*/
@@ -216,7 +216,7 @@ void gpio_pad_hold(uint32_t gpio_num);
/**
* @brief enable gpio pad input.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~46
*
* @return None
*/
@@ -225,7 +225,7 @@ void gpio_pad_input_enable(uint32_t gpio_num);
/**
* @brief disable gpio pad input.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
* @param uint32_t gpio_num : gpio number, 0~46
*
* @return None
*/

20
components/esp_rom/include/esp_rom_gpio.h
View File

@@ -1,16 +1,8 @@
// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2010-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
@@ -75,7 +67,7 @@ void esp_rom_gpio_connect_in_signal(uint32_t gpio_num, uint32_t signal_idx, bool
*
* @note There's no limitation on the number of signals that a GPIO can combine with.
*
* @param gpio_num GPIO number
* @param gpio_num GPIO number, especially, `SIG_GPIO_OUT_IDX` means disconnect GPIO and other peripherals. Only the GPIO driver can control the output level.
* @param signal_idx Peripheral signal index (tagged as output attribute)
* @param out_inv Whether to signal to be inverted or not
* @param oen_inv Whether the output enable control is inverted or not

18
components/soc/esp32/include/soc/gpio_pins.h
View File

@@ -1,16 +1,8 @@
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
components/soc/esp32c3/include/soc/gpio_pins.h
View File

@@ -1,16 +1,8 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
components/soc/esp32s2/include/soc/gpio_pins.h
View File

@@ -1,16 +1,8 @@
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
components/soc/esp32s3/include/soc/gpio_pins.h
View File

@@ -1,16 +1,8 @@
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

2
components/spi_flash/esp32s3/spi_flash_oct_flash_init.c
View File

@@ -7,8 +7,6 @@
#include "sdkconfig.h"
#include "esp_log.h"
#include "esp_err.h"
#include "esp_rom_gpio.h"
#include "esp32s3/rom/gpio.h"
#include "esp32s3/rom/spi_flash.h"
#include "esp32s3/rom/opi_flash.h"
#include "esp_private/spi_flash_os.h"

5
tools/ci/check_copyright_ignore.txt
View File

@@ -506,7 +506,6 @@ components/esp_rom/include/esp32s3/rom/rsa_pss.h
components/esp_rom/include/esp32s3/rom/sha.h
components/esp_rom/include/esp32s3/rom/tjpgd.h
components/esp_rom/include/esp_rom_crc.h
components/esp_rom/include/esp_rom_gpio.h
components/esp_rom/include/linux/soc/reset_reasons.h
components/esp_rom/linux/esp_rom_crc.c
components/esp_rom/linux/esp_rom_md5.c
@@ -759,7 +758,6 @@ components/soc/esp32/include/soc/bb_reg.h
components/soc/esp32/include/soc/boot_mode.h
components/soc/esp32/include/soc/fe_reg.h
components/soc/esp32/include/soc/flash_encryption_reg.h
components/soc/esp32/include/soc/gpio_pins.h
components/soc/esp32/include/soc/gpio_reg.h
components/soc/esp32/include/soc/gpio_sig_map.h
components/soc/esp32/include/soc/gpio_struct.h
@@ -811,7 +809,6 @@ components/soc/esp32c3/include/soc/bb_reg.h
components/soc/esp32c3/include/soc/boot_mode.h
components/soc/esp32c3/include/soc/extmem_reg.h
components/soc/esp32c3/include/soc/fe_reg.h
components/soc/esp32c3/include/soc/gpio_pins.h
components/soc/esp32c3/include/soc/gpio_reg.h
components/soc/esp32c3/include/soc/gpio_struct.h
components/soc/esp32c3/include/soc/i2c_reg.h
@@ -853,7 +850,6 @@ components/soc/esp32s2/include/soc/dedic_gpio_reg.h
components/soc/esp32s2/include/soc/dedic_gpio_struct.h
components/soc/esp32s2/include/soc/extmem_reg.h
components/soc/esp32s2/include/soc/fe_reg.h
components/soc/esp32s2/include/soc/gpio_pins.h
components/soc/esp32s2/include/soc/gpio_reg.h
components/soc/esp32s2/include/soc/gpio_sig_map.h
components/soc/esp32s2/include/soc/i2c_reg.h
@@ -900,7 +896,6 @@ components/soc/esp32s3/include/soc/cpu.h
components/soc/esp32s3/include/soc/extmem_reg.h
components/soc/esp32s3/include/soc/extmem_struct.h
components/soc/esp32s3/include/soc/fe_reg.h
components/soc/esp32s3/include/soc/gpio_pins.h
components/soc/esp32s3/include/soc/gpio_reg.h
components/soc/esp32s3/include/soc/hinf_reg.h
components/soc/esp32s3/include/soc/hinf_struct.h