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timergroup: refactor unit test to better support future chip

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This commit is contained in:
morris
2020-10-14 11:56:05 +08:00
parent e4c8ec6174
commit bc8b56cef7
2 changed files with 121 additions and 108 deletions
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149
components/driver/test/test_timer.c
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@@ -7,10 +7,9 @@
#include "nvs_flash.h" #include "nvs_flash.h"
#include "driver/timer.h" #include "driver/timer.h"
#include "soc/rtc.h" #include "soc/rtc.h"
#include "soc/soc_caps.h"
#include "esp_rom_sys.h" #include "esp_rom_sys.h"
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
#define TIMER_DIVIDER 16 #define TIMER_DIVIDER 16
#define TIMER_SCALE (TIMER_BASE_CLK / TIMER_DIVIDER) /*!< used to calculate counter value */ #define TIMER_SCALE (TIMER_BASE_CLK / TIMER_DIVIDER) /*!< used to calculate counter value */
#define TIMER_DELTA 0.001 #define TIMER_DELTA 0.001
@@ -38,7 +37,9 @@ static timer_info_t timer_info[4] = {
TIMER_INFO_INIT(TIMER_GROUP_1, TIMER_1), TIMER_INFO_INIT(TIMER_GROUP_1, TIMER_1),
}; };
#define GET_TIMER_INFO(TG, TID) (&timer_info[(TG)*2+(TID)]) static intr_handle_t timer_isr_handles[SOC_TIMER_GROUP_TOTAL_TIMERS];
#define GET_TIMER_INFO(TG, TID) (&timer_info[(TG)*SOC_TIMER_GROUP_TIMERS_PER_GROUP+(TID)])
// timer group interruption handle callback // timer group interruption handle callback
static bool test_timer_group_isr_cb(void *arg) static bool test_timer_group_isr_cb(void *arg)
@@ -74,7 +75,9 @@ static bool test_timer_group_isr_cb(void *arg)
BaseType_t awoken = pdFALSE; BaseType_t awoken = pdFALSE;
BaseType_t ret = xQueueSendFromISR(timer_queue, &evt, &awoken); BaseType_t ret = xQueueSendFromISR(timer_queue, &evt, &awoken);
TEST_ASSERT_EQUAL(pdTRUE, ret); TEST_ASSERT_EQUAL(pdTRUE, ret);
if (awoken) is_awoken = true; if (awoken) {
is_awoken = true;
}
} }
return is_awoken; return is_awoken;
} }
@@ -154,7 +157,7 @@ static void all_timer_get_counter_value(uint64_t set_cnt_val, bool expect_equal_
} else { } else {
TEST_ASSERT_NOT_EQUAL(set_cnt_val, current_cnt_val); TEST_ASSERT_NOT_EQUAL(set_cnt_val, current_cnt_val);
if (actual_cnt_val != NULL) { if (actual_cnt_val != NULL) {
actual_cnt_val[tg_idx*TIMER_GROUP_MAX + timer_idx] = current_cnt_val; actual_cnt_val[tg_idx * SOC_TIMER_GROUP_TIMERS_PER_GROUP + timer_idx] = current_cnt_val;
} }
} }
} }
@@ -199,12 +202,30 @@ static void all_timer_set_alarm_value(uint64_t alarm_cnt_val)
} }
} }
static void all_timer_get_alarm_value(uint64_t *alarm_vals)
{
for (uint32_t tg_idx = 0; tg_idx < TIMER_GROUP_MAX; tg_idx++) {
for (uint32_t timer_idx = 0; timer_idx < TIMER_MAX; timer_idx++) {
TEST_ESP_OK(timer_get_alarm_value(tg_idx, timer_idx, &alarm_vals[tg_idx * SOC_TIMER_GROUP_TIMERS_PER_GROUP + timer_idx]));
}
}
}
static void all_timer_isr_reg(void) static void all_timer_isr_reg(void)
{ {
for (uint32_t tg_idx = 0; tg_idx < TIMER_GROUP_MAX; tg_idx++) { for (uint32_t tg_idx = 0; tg_idx < TIMER_GROUP_MAX; tg_idx++) {
for (uint32_t timer_idx = 0; timer_idx < TIMER_MAX; timer_idx++) { for (uint32_t timer_idx = 0; timer_idx < TIMER_MAX; timer_idx++) {
TEST_ESP_OK(timer_isr_register(tg_idx, timer_idx, test_timer_group_isr, TEST_ESP_OK(timer_isr_register(tg_idx, timer_idx, test_timer_group_isr,
GET_TIMER_INFO(tg_idx, timer_idx), ESP_INTR_FLAG_LOWMED, NULL)); GET_TIMER_INFO(tg_idx, timer_idx), ESP_INTR_FLAG_LOWMED, &timer_isr_handles[tg_idx * SOC_TIMER_GROUP_TIMERS_PER_GROUP + timer_idx]));
}
}
}
static void all_timer_isr_unreg(void)
{
for (uint32_t tg_idx = 0; tg_idx < TIMER_GROUP_MAX; tg_idx++) {
for (uint32_t timer_idx = 0; timer_idx < TIMER_MAX; timer_idx++) {
TEST_ESP_OK(esp_intr_free(timer_isr_handles[tg_idx * SOC_TIMER_GROUP_TIMERS_PER_GROUP + timer_idx]));
} }
} }
} }
@@ -287,7 +308,7 @@ TEST_CASE("Timer init", "[hw_timer]")
}; };
all_timer_init(&config3, true); all_timer_init(&config3, true);
timer_config_t get_config; timer_config_t get_config;
TEST_ESP_OK(timer_get_config(TIMER_GROUP_1, TIMER_1, &get_config)); TEST_ESP_OK(timer_get_config(TIMER_GROUP_1, TIMER_0, &get_config));
printf("Error config alarm_en is %d\n", get_config.alarm_en); printf("Error config alarm_en is %d\n", get_config.alarm_en);
TEST_ASSERT_NOT_EQUAL(config3.alarm_en, get_config.alarm_en); TEST_ASSERT_NOT_EQUAL(config3.alarm_en, get_config.alarm_en);
@@ -319,10 +340,10 @@ TEST_CASE("Timer init", "[hw_timer]")
all_timer_get_counter_value(set_timer_val, false, NULL); all_timer_get_counter_value(set_timer_val, false, NULL);
// Test init 3: wrong parameter // Test init 3: wrong parameter
TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_init(-1, TIMER_1, &config)); TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_init(-1, TIMER_0, &config));
TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_init(TIMER_GROUP_1, 2, &config)); TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_init(TIMER_GROUP_1, 2, &config));
TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_init(TIMER_GROUP_1, -1, &config)); TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_init(TIMER_GROUP_1, -1, &config));
TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_init(2, TIMER_1, &config)); TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_init(2, TIMER_0, &config));
all_timer_deinit(); all_timer_deinit();
} }
@@ -389,8 +410,8 @@ TEST_CASE("Timer start", "[hw_timer]")
all_timer_get_counter_value(set_timer_val, false, NULL); all_timer_get_counter_value(set_timer_val, false, NULL);
//Test start 2:wrong parameter //Test start 2:wrong parameter
TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_start(2, TIMER_1)); TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_start(2, TIMER_0));
TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_start(-1, TIMER_1)); TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_start(-1, TIMER_0));
TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_start(TIMER_GROUP_1, 2)); TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_start(TIMER_GROUP_1, 2));
TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_start(TIMER_GROUP_1, -1)); TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_start(TIMER_GROUP_1, -1));
all_timer_deinit(); all_timer_deinit();
@@ -549,14 +570,10 @@ TEST_CASE("Timer divider", "[hw_timer]")
all_timer_pause(); all_timer_pause();
TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_set_divider(TIMER_GROUP_0, TIMER_0, 1)); TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_set_divider(TIMER_GROUP_0, TIMER_0, 1));
TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_set_divider(TIMER_GROUP_1, TIMER_0, 1)); TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_set_divider(TIMER_GROUP_1, TIMER_0, 1));
TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_set_divider(TIMER_GROUP_0, TIMER_1, 1));
TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_set_divider(TIMER_GROUP_1, TIMER_1, 1));
all_timer_pause(); all_timer_pause();
TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_set_divider(TIMER_GROUP_0, TIMER_0, 65537)); TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_set_divider(TIMER_GROUP_0, TIMER_0, 65537));
TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_set_divider(TIMER_GROUP_1, TIMER_0, 65537)); TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_set_divider(TIMER_GROUP_1, TIMER_0, 65537));
TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_set_divider(TIMER_GROUP_0, TIMER_1, 65537));
TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_set_divider(TIMER_GROUP_1, TIMER_1, 65537));
all_timer_deinit(); all_timer_deinit();
} }
@@ -580,15 +597,15 @@ TEST_CASE("Timer enable alarm", "[hw_timer]")
// enable alarm of tg0_timer1 // enable alarm of tg0_timer1
alarm_flag = false; alarm_flag = false;
TEST_ESP_OK(timer_set_alarm(TIMER_GROUP_0, TIMER_1, TIMER_ALARM_EN)); TEST_ESP_OK(timer_set_alarm(TIMER_GROUP_0, TIMER_0, TIMER_ALARM_EN));
timer_intr_enable_and_start(TIMER_GROUP_0, TIMER_1, 1.2); timer_intr_enable_and_start(TIMER_GROUP_0, TIMER_0, 1.2);
timer_isr_check(TIMER_GROUP_0, TIMER_1, TIMER_AUTORELOAD_DIS, 1.2 * TIMER_SCALE); timer_isr_check(TIMER_GROUP_0, TIMER_0, TIMER_AUTORELOAD_DIS, 1.2 * TIMER_SCALE);
TEST_ASSERT_EQUAL(true, alarm_flag); TEST_ASSERT_EQUAL(true, alarm_flag);
// disable alarm of tg0_timer1 // disable alarm of tg0_timer1
alarm_flag = false; alarm_flag = false;
TEST_ESP_OK(timer_set_alarm(TIMER_GROUP_0, TIMER_1, TIMER_ALARM_DIS)); TEST_ESP_OK(timer_set_alarm(TIMER_GROUP_0, TIMER_0, TIMER_ALARM_DIS));
timer_intr_enable_and_start(TIMER_GROUP_0, TIMER_1, 1.2); timer_intr_enable_and_start(TIMER_GROUP_0, TIMER_0, 1.2);
vTaskDelay(2000 / portTICK_PERIOD_MS); vTaskDelay(2000 / portTICK_PERIOD_MS);
TEST_ASSERT_EQUAL(false, alarm_flag); TEST_ASSERT_EQUAL(false, alarm_flag);
@@ -605,6 +622,7 @@ TEST_CASE("Timer enable alarm", "[hw_timer]")
timer_intr_enable_and_start(TIMER_GROUP_1, TIMER_0, 1.2); timer_intr_enable_and_start(TIMER_GROUP_1, TIMER_0, 1.2);
vTaskDelay(2000 / portTICK_PERIOD_MS); vTaskDelay(2000 / portTICK_PERIOD_MS);
TEST_ASSERT_EQUAL(false, alarm_flag); TEST_ASSERT_EQUAL(false, alarm_flag);
all_timer_isr_unreg();
all_timer_deinit(); all_timer_deinit();
} }
@@ -615,8 +633,7 @@ TEST_CASE("Timer enable alarm", "[hw_timer]")
*/ */
TEST_CASE("Timer set alarm value", "[hw_timer]") TEST_CASE("Timer set alarm value", "[hw_timer]")
{ {
int i; uint64_t alarm_val[SOC_TIMER_GROUP_TOTAL_TIMERS];
uint64_t alarm_val[4];
timer_config_t config = { timer_config_t config = {
.alarm_en = TIMER_ALARM_EN, .alarm_en = TIMER_ALARM_EN,
.auto_reload = TIMER_AUTORELOAD_DIS, .auto_reload = TIMER_AUTORELOAD_DIS,
@@ -630,19 +647,17 @@ TEST_CASE("Timer set alarm value", "[hw_timer]")
// set and get alarm value // set and get alarm value
all_timer_set_alarm_value(3 * TIMER_SCALE); all_timer_set_alarm_value(3 * TIMER_SCALE);
TEST_ESP_OK(timer_get_alarm_value(TIMER_GROUP_0, TIMER_0, &alarm_val[0])); all_timer_get_alarm_value(alarm_val);
TEST_ESP_OK(timer_get_alarm_value(TIMER_GROUP_0, TIMER_1, &alarm_val[1])); for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
TEST_ESP_OK(timer_get_alarm_value(TIMER_GROUP_1, TIMER_0, &alarm_val[2]));
TEST_ESP_OK(timer_get_alarm_value(TIMER_GROUP_1, TIMER_1, &alarm_val[3]));
for (i = 0; i < 4; i++) {
TEST_ASSERT_EQUAL_UINT32(3 * TIMER_SCALE, (uint32_t)alarm_val[i]); TEST_ASSERT_EQUAL_UINT32(3 * TIMER_SCALE, (uint32_t)alarm_val[i]);
} }
// set interrupt read alarm value // set interrupt read alarm value
timer_intr_enable_and_start(TIMER_GROUP_0, TIMER_1, 2.4); timer_intr_enable_and_start(TIMER_GROUP_0, TIMER_0, 2.4);
timer_isr_check(TIMER_GROUP_0, TIMER_1, TIMER_AUTORELOAD_DIS, 2.4 * TIMER_SCALE); timer_isr_check(TIMER_GROUP_0, TIMER_0, TIMER_AUTORELOAD_DIS, 2.4 * TIMER_SCALE);
timer_intr_enable_and_start(TIMER_GROUP_1, TIMER_0, 1.4); timer_intr_enable_and_start(TIMER_GROUP_1, TIMER_0, 1.4);
timer_isr_check(TIMER_GROUP_1, TIMER_0, TIMER_AUTORELOAD_DIS, 1.4 * TIMER_SCALE); timer_isr_check(TIMER_GROUP_1, TIMER_0, TIMER_AUTORELOAD_DIS, 1.4 * TIMER_SCALE);
all_timer_isr_unreg();
all_timer_deinit(); all_timer_deinit();
} }
@@ -667,16 +682,12 @@ TEST_CASE("Timer auto reload", "[hw_timer]")
// test disable auto_reload // test disable auto_reload
timer_intr_enable_and_start(TIMER_GROUP_0, TIMER_0, 1.14); timer_intr_enable_and_start(TIMER_GROUP_0, TIMER_0, 1.14);
timer_isr_check(TIMER_GROUP_0, TIMER_0, TIMER_AUTORELOAD_DIS, 1.14 * TIMER_SCALE); timer_isr_check(TIMER_GROUP_0, TIMER_0, TIMER_AUTORELOAD_DIS, 1.14 * TIMER_SCALE);
timer_intr_enable_and_start(TIMER_GROUP_1, TIMER_1, 1.14);
timer_isr_check(TIMER_GROUP_1, TIMER_1, TIMER_AUTORELOAD_DIS, 1.14 * TIMER_SCALE);
//test enable auto_reload //test enable auto_reload
TEST_ESP_OK(timer_set_auto_reload(TIMER_GROUP_0, TIMER_1, TIMER_AUTORELOAD_EN));
timer_intr_enable_and_start(TIMER_GROUP_0, TIMER_1, 1.4);
timer_isr_check(TIMER_GROUP_0, TIMER_1, TIMER_AUTORELOAD_EN, 0);
TEST_ESP_OK(timer_set_auto_reload(TIMER_GROUP_1, TIMER_0, TIMER_AUTORELOAD_EN)); TEST_ESP_OK(timer_set_auto_reload(TIMER_GROUP_1, TIMER_0, TIMER_AUTORELOAD_EN));
timer_intr_enable_and_start(TIMER_GROUP_1, TIMER_0, 1.4); timer_intr_enable_and_start(TIMER_GROUP_1, TIMER_0, 1.4);
timer_isr_check(TIMER_GROUP_1, TIMER_0, TIMER_AUTORELOAD_EN, 0); timer_isr_check(TIMER_GROUP_1, TIMER_0, TIMER_AUTORELOAD_EN, 0);
all_timer_isr_unreg();
all_timer_deinit(); all_timer_deinit();
} }
@@ -702,17 +713,18 @@ TEST_CASE("Timer enable timer interrupt", "[hw_timer]")
all_timer_set_counter_value(0); all_timer_set_counter_value(0);
all_timer_isr_reg(); all_timer_isr_reg();
timer_intr_enable_disable_test(TIMER_GROUP_0, TIMER_0, 1.2 * TIMER_SCALE); timer_intr_enable_disable_test(TIMER_GROUP_0, TIMER_0, 1.2 * TIMER_SCALE);
timer_intr_enable_disable_test(TIMER_GROUP_1, TIMER_1, 1.2 * TIMER_SCALE); timer_intr_enable_disable_test(TIMER_GROUP_1, TIMER_0, 1.2 * TIMER_SCALE);
// enable interrupt of tg1_timer1 again // enable interrupt of tg1_timer0 again
alarm_flag = false; alarm_flag = false;
TEST_ESP_OK(timer_pause(TIMER_GROUP_1, TIMER_1)); TEST_ESP_OK(timer_pause(TIMER_GROUP_1, TIMER_0));
TEST_ESP_OK(timer_set_counter_value(TIMER_GROUP_1, TIMER_1, 0)); TEST_ESP_OK(timer_set_counter_value(TIMER_GROUP_1, TIMER_0, 0));
TEST_ESP_OK(timer_set_alarm(TIMER_GROUP_1, TIMER_1, TIMER_ALARM_EN)); TEST_ESP_OK(timer_set_alarm(TIMER_GROUP_1, TIMER_0, TIMER_ALARM_EN));
TEST_ESP_OK(timer_enable_intr(TIMER_GROUP_1, TIMER_1)); TEST_ESP_OK(timer_enable_intr(TIMER_GROUP_1, TIMER_0));
TEST_ESP_OK(timer_start(TIMER_GROUP_1, TIMER_1)); TEST_ESP_OK(timer_start(TIMER_GROUP_1, TIMER_0));
timer_isr_check(TIMER_GROUP_1, TIMER_1, TIMER_AUTORELOAD_DIS, 1.2 * TIMER_SCALE); timer_isr_check(TIMER_GROUP_1, TIMER_0, TIMER_AUTORELOAD_DIS, 1.2 * TIMER_SCALE);
TEST_ASSERT_EQUAL(true, alarm_flag); TEST_ASSERT_EQUAL(true, alarm_flag);
all_timer_isr_unreg();
all_timer_deinit(); all_timer_deinit();
} }
@@ -723,6 +735,7 @@ TEST_CASE("Timer enable timer interrupt", "[hw_timer]")
*/ */
TEST_CASE("Timer enable timer group interrupt", "[hw_timer][ignore]") TEST_CASE("Timer enable timer group interrupt", "[hw_timer][ignore]")
{ {
intr_handle_t isr_handle = NULL;
alarm_flag = false; alarm_flag = false;
timer_config_t config = { timer_config_t config = {
.alarm_en = TIMER_ALARM_EN, .alarm_en = TIMER_ALARM_EN,
@@ -741,7 +754,7 @@ TEST_CASE("Timer enable timer group interrupt", "[hw_timer][ignore]")
// enable interrupt of tg0_timer0 // enable interrupt of tg0_timer0
TEST_ESP_OK(timer_group_intr_enable(TIMER_GROUP_0, TIMER_INTR_T0)); TEST_ESP_OK(timer_group_intr_enable(TIMER_GROUP_0, TIMER_INTR_T0));
TEST_ESP_OK(timer_isr_register(TIMER_GROUP_0, TIMER_0, test_timer_group_isr, TEST_ESP_OK(timer_isr_register(TIMER_GROUP_0, TIMER_0, test_timer_group_isr,
GET_TIMER_INFO(TIMER_GROUP_0, TIMER_0), ESP_INTR_FLAG_LOWMED, NULL)); GET_TIMER_INFO(TIMER_GROUP_0, TIMER_0), ESP_INTR_FLAG_LOWMED, &isr_handle));
TEST_ESP_OK(timer_start(TIMER_GROUP_0, TIMER_0)); TEST_ESP_OK(timer_start(TIMER_GROUP_0, TIMER_0));
timer_isr_check(TIMER_GROUP_0, TIMER_0, TIMER_AUTORELOAD_DIS, 1.2 * TIMER_SCALE); timer_isr_check(TIMER_GROUP_0, TIMER_0, TIMER_AUTORELOAD_DIS, 1.2 * TIMER_SCALE);
TEST_ASSERT_EQUAL(true, alarm_flag); TEST_ASSERT_EQUAL(true, alarm_flag);
@@ -753,13 +766,14 @@ TEST_CASE("Timer enable timer group interrupt", "[hw_timer][ignore]")
TEST_ESP_OK(timer_start(TIMER_GROUP_0, TIMER_0)); TEST_ESP_OK(timer_start(TIMER_GROUP_0, TIMER_0));
vTaskDelay(2000 / portTICK_PERIOD_MS); vTaskDelay(2000 / portTICK_PERIOD_MS);
TEST_ASSERT_EQUAL(false, alarm_flag); TEST_ASSERT_EQUAL(false, alarm_flag);
esp_intr_free(isr_handle);
} }
/** /**
* isr_register case: * isr_register case:
* Cycle register 15 times, compare the heap size to ensure no memory leaks * Cycle register 15 times, compare the heap size to ensure no memory leaks
*/ */
TEST_CASE("Timer interrupt register", "[hw_timer][leaks=200]") TEST_CASE("Timer interrupt register", "[hw_timer]")
{ {
timer_config_t config = { timer_config_t config = {
.alarm_en = TIMER_ALARM_DIS, .alarm_en = TIMER_ALARM_DIS,
@@ -776,18 +790,18 @@ TEST_CASE("Timer interrupt register", "[hw_timer][leaks=200]")
for (uint32_t tg_idx = 0; tg_idx < TIMER_GROUP_MAX; tg_idx++) { for (uint32_t tg_idx = 0; tg_idx < TIMER_GROUP_MAX; tg_idx++) {
for (uint32_t timer_idx = 0; timer_idx < TIMER_MAX; timer_idx++) { for (uint32_t timer_idx = 0; timer_idx < TIMER_MAX; timer_idx++) {
TEST_ESP_OK(timer_isr_register(tg_idx, timer_idx, test_timer_group_isr, TEST_ESP_OK(timer_isr_register(tg_idx, timer_idx, test_timer_group_isr,
GET_TIMER_INFO(tg_idx, timer_idx), ESP_INTR_FLAG_LOWMED, &timer_isr_handle[tg_idx * TIMER_GROUP_MAX + timer_idx])); GET_TIMER_INFO(tg_idx, timer_idx), ESP_INTR_FLAG_LOWMED, &timer_isr_handle[tg_idx * SOC_TIMER_GROUP_TIMERS_PER_GROUP + timer_idx]));
} }
} }
TEST_ESP_OK(timer_set_alarm(TIMER_GROUP_0, TIMER_0, TIMER_ALARM_EN)); TEST_ESP_OK(timer_set_alarm(TIMER_GROUP_0, TIMER_0, TIMER_ALARM_EN));
timer_intr_enable_and_start(TIMER_GROUP_0, TIMER_0, 0.54); timer_intr_enable_and_start(TIMER_GROUP_0, TIMER_0, 0.54);
TEST_ESP_OK(timer_set_alarm(TIMER_GROUP_1, TIMER_1, TIMER_ALARM_EN)); TEST_ESP_OK(timer_set_alarm(TIMER_GROUP_1, TIMER_0, TIMER_ALARM_EN));
timer_intr_enable_and_start(TIMER_GROUP_1, TIMER_1, 0.34); timer_intr_enable_and_start(TIMER_GROUP_1, TIMER_0, 0.34);
TEST_ESP_OK(timer_set_auto_reload(TIMER_GROUP_0, TIMER_1, TIMER_AUTORELOAD_EN)); TEST_ESP_OK(timer_set_auto_reload(TIMER_GROUP_0, TIMER_0, TIMER_AUTORELOAD_EN));
TEST_ESP_OK(timer_set_alarm(TIMER_GROUP_0, TIMER_1, TIMER_ALARM_EN)); TEST_ESP_OK(timer_set_alarm(TIMER_GROUP_0, TIMER_0, TIMER_ALARM_EN));
timer_intr_enable_and_start(TIMER_GROUP_0, TIMER_1, 0.4); timer_intr_enable_and_start(TIMER_GROUP_0, TIMER_0, 0.4);
TEST_ESP_OK(timer_set_auto_reload(TIMER_GROUP_1, TIMER_0, TIMER_AUTORELOAD_EN)); TEST_ESP_OK(timer_set_auto_reload(TIMER_GROUP_1, TIMER_0, TIMER_AUTORELOAD_EN));
TEST_ESP_OK(timer_set_alarm(TIMER_GROUP_1, TIMER_0, TIMER_ALARM_EN)); TEST_ESP_OK(timer_set_alarm(TIMER_GROUP_1, TIMER_0, TIMER_ALARM_EN));
timer_intr_enable_and_start(TIMER_GROUP_1, TIMER_0, 0.6); timer_intr_enable_and_start(TIMER_GROUP_1, TIMER_0, 0.6);
@@ -796,14 +810,14 @@ TEST_CASE("Timer interrupt register", "[hw_timer][leaks=200]")
// ISR hanlde function should be free before next ISR register. // ISR hanlde function should be free before next ISR register.
for (uint32_t tg_idx = 0; tg_idx < TIMER_GROUP_MAX; tg_idx++) { for (uint32_t tg_idx = 0; tg_idx < TIMER_GROUP_MAX; tg_idx++) {
for (uint32_t timer_idx = 0; timer_idx < TIMER_MAX; timer_idx++) { for (uint32_t timer_idx = 0; timer_idx < TIMER_MAX; timer_idx++) {
TEST_ESP_OK(esp_intr_free(timer_isr_handle[tg_idx * TIMER_GROUP_MAX + timer_idx])); TEST_ESP_OK(esp_intr_free(timer_isr_handle[tg_idx * SOC_TIMER_GROUP_TIMERS_PER_GROUP + timer_idx]));
} }
} }
all_timer_deinit(); all_timer_deinit();
} }
} }
#ifdef SOC_TIMER_GROUP_SUPPORT_XTAL #if SOC_TIMER_GROUP_SUPPORT_XTAL
/** /**
* Timer clock source: * Timer clock source:
* 1. configure clock source as APB clock, and enable timer interrupt * 1. configure clock source as APB clock, and enable timer interrupt
@@ -829,7 +843,7 @@ TEST_CASE("Timer clock source", "[hw_timer]")
all_timer_isr_reg(); all_timer_isr_reg();
timer_intr_enable_disable_test(TIMER_GROUP_0, TIMER_0, 1.2 * timer_scale); timer_intr_enable_disable_test(TIMER_GROUP_0, TIMER_0, 1.2 * timer_scale);
timer_intr_enable_disable_test(TIMER_GROUP_1, TIMER_1, 1.2 * timer_scale ); timer_intr_enable_disable_test(TIMER_GROUP_1, TIMER_0, 1.2 * timer_scale );
// configure clock source as XTAL clock // configure clock source as XTAL clock
all_timer_pause(); all_timer_pause();
@@ -839,8 +853,9 @@ TEST_CASE("Timer clock source", "[hw_timer]")
all_timer_set_alarm_value(1.2 * timer_scale); all_timer_set_alarm_value(1.2 * timer_scale);
timer_intr_enable_disable_test(TIMER_GROUP_0, TIMER_0, 1.2 * timer_scale); timer_intr_enable_disable_test(TIMER_GROUP_0, TIMER_0, 1.2 * timer_scale);
timer_intr_enable_disable_test(TIMER_GROUP_1, TIMER_1, 1.2 * timer_scale ); timer_intr_enable_disable_test(TIMER_GROUP_1, TIMER_0, 1.2 * timer_scale );
all_timer_isr_unreg();
all_timer_deinit(); all_timer_deinit();
} }
#endif #endif
@@ -867,20 +882,20 @@ TEST_CASE("Timer ISR callback", "[hw_timer]")
all_timer_set_alarm_value(alarm_cnt_val); all_timer_set_alarm_value(alarm_cnt_val);
all_timer_set_counter_value(set_timer_val); all_timer_set_counter_value(set_timer_val);
// add isr callback for tg0_timer1 // add isr callback for tg0_timer0
TEST_ESP_OK(timer_isr_callback_add(TIMER_GROUP_0, TIMER_1, test_timer_group_isr_cb, TEST_ESP_OK(timer_isr_callback_add(TIMER_GROUP_0, TIMER_0, test_timer_group_isr_cb,
GET_TIMER_INFO(TIMER_GROUP_0, TIMER_1), ESP_INTR_FLAG_LOWMED)); GET_TIMER_INFO(TIMER_GROUP_0, TIMER_0), ESP_INTR_FLAG_LOWMED));
TEST_ESP_OK(timer_set_counter_value(TIMER_GROUP_0, TIMER_1, set_timer_val)); TEST_ESP_OK(timer_set_counter_value(TIMER_GROUP_0, TIMER_0, set_timer_val));
TEST_ESP_OK(timer_start(TIMER_GROUP_0, TIMER_1)); TEST_ESP_OK(timer_start(TIMER_GROUP_0, TIMER_0));
timer_isr_check(TIMER_GROUP_0, TIMER_1, TIMER_AUTORELOAD_DIS, alarm_cnt_val); timer_isr_check(TIMER_GROUP_0, TIMER_0, TIMER_AUTORELOAD_DIS, alarm_cnt_val);
TEST_ASSERT_EQUAL(true, alarm_flag); TEST_ASSERT_EQUAL(true, alarm_flag);
// remove isr callback for tg0_timer1 // remove isr callback for tg0_timer0
TEST_ESP_OK(timer_pause(TIMER_GROUP_0, TIMER_1)); TEST_ESP_OK(timer_pause(TIMER_GROUP_0, TIMER_0));
TEST_ESP_OK(timer_isr_callback_remove(TIMER_GROUP_0, TIMER_1)); TEST_ESP_OK(timer_isr_callback_remove(TIMER_GROUP_0, TIMER_0));
alarm_flag = false; alarm_flag = false;
TEST_ESP_OK(timer_set_counter_value(TIMER_GROUP_0, TIMER_1, set_timer_val)); TEST_ESP_OK(timer_set_counter_value(TIMER_GROUP_0, TIMER_0, set_timer_val));
TEST_ESP_OK(timer_start(TIMER_GROUP_0, TIMER_1)); TEST_ESP_OK(timer_start(TIMER_GROUP_0, TIMER_0));
vTaskDelay(2000 / portTICK_PERIOD_MS); vTaskDelay(2000 / portTICK_PERIOD_MS);
TEST_ASSERT_EQUAL(false, alarm_flag); TEST_ASSERT_EQUAL(false, alarm_flag);
@@ -907,7 +922,7 @@ TEST_CASE("Timer ISR callback", "[hw_timer]")
/** /**
* Timer memory test * Timer memory test
*/ */
TEST_CASE("Timer memory test", "[hw_timer][leaks=100]") TEST_CASE("Timer memory test", "[hw_timer]")
{ {
timer_config_t config = { timer_config_t config = {
.alarm_en = TIMER_ALARM_EN, .alarm_en = TIMER_ALARM_EN,
@@ -975,5 +990,3 @@ TEST_CASE_MULTIPLE_STAGES("timer_group software reset test",
"[intr_status][intr_status = 0]", "[intr_status][intr_status = 0]",
timer_group_test_first_stage, timer_group_test_first_stage,
timer_group_test_second_stage); timer_group_test_second_stage);
#endif

4
components/driver/timer.c
View File

@@ -83,7 +83,7 @@ esp_err_t timer_get_counter_time_sec(timer_group_t group_num, timer_idx_t timer_
uint32_t div; uint32_t div;
timer_hal_get_divider(&(p_timer_obj[group_num][timer_num]->hal), &div); timer_hal_get_divider(&(p_timer_obj[group_num][timer_num]->hal), &div);
*time = (double)timer_val * div / rtc_clk_apb_freq_get(); *time = (double)timer_val * div / rtc_clk_apb_freq_get();
#ifdef SOC_TIMER_GROUP_SUPPORT_XTAL #if SOC_TIMER_GROUP_SUPPORT_XTAL
if (timer_hal_get_use_xtal(&(p_timer_obj[group_num][timer_num]->hal))) { if (timer_hal_get_use_xtal(&(p_timer_obj[group_num][timer_num]->hal))) {
*time = (double)timer_val * div / ((int)rtc_clk_xtal_freq_get() * 1000000); *time = (double)timer_val * div / ((int)rtc_clk_xtal_freq_get() * 1000000);
} }
@@ -302,7 +302,7 @@ esp_err_t timer_init(timer_group_t group_num, timer_idx_t timer_num, const timer
ESP_LOGW(TIMER_TAG, "only support Level Interrupt, switch to Level Interrupt instead"); ESP_LOGW(TIMER_TAG, "only support Level Interrupt, switch to Level Interrupt instead");
} }
timer_hal_set_counter_enable(&(p_timer_obj[group_num][timer_num]->hal), config->counter_en); timer_hal_set_counter_enable(&(p_timer_obj[group_num][timer_num]->hal), config->counter_en);
#ifdef SOC_TIMER_GROUP_SUPPORT_XTAL #if SOC_TIMER_GROUP_SUPPORT_XTAL
timer_hal_set_use_xtal(&(p_timer_obj[group_num][timer_num]->hal), config->clk_src); timer_hal_set_use_xtal(&(p_timer_obj[group_num][timer_num]->hal), config->clk_src);
#endif #endif
TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]); TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);