diff --git a/components/hal/esp32c5/include/hal/lp_core_ll.h b/components/hal/esp32c5/include/hal/lp_core_ll.h
index 974c5391cd..04de32308c 100644
--- a/components/hal/esp32c5/include/hal/lp_core_ll.h
+++ b/components/hal/esp32c5/include/hal/lp_core_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -55,6 +55,18 @@ static inline void lp_core_ll_reset_register(void)
 /// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
 #define lp_core_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; lp_core_ll_reset_register(__VA_ARGS__)
 
+/**
+ * @brief Enable fast access of LP memory
+ *
+ * @note When fast access is activated, LP-core cannot access LP mem during deep sleep
+ *
+ * @param enable Enable if true, disable if false
+ */
+static inline void lp_core_ll_fast_lp_mem_enable(bool enable)
+{
+    LP_AON.lpbus.fast_mem_mux_sel = enable;
+    LP_AON.lpbus.fast_mem_mux_sel_update = 1;
+}
 
 /**
  * @brief Trigger a LP_CORE_LL_WAKEUP_SOURCE_HP_CPU wake-up on the lp core
diff --git a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
index 3c30d04ff8..e43af8fa75 100644
--- a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
@@ -1443,6 +1443,10 @@ config SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH
     int
     default 12
 
+config SOC_RTC_MEM_SUPPORT_SPEED_MODE_SWITCH
+    bool
+    default y
+
 config SOC_PM_SUPPORT_WIFI_WAKEUP
     bool
     default y
diff --git a/components/soc/esp32c5/include/soc/clk_tree_defs.h b/components/soc/esp32c5/include/soc/clk_tree_defs.h
index 74cccfdbfe..61e408ae2c 100644
--- a/components/soc/esp32c5/include/soc/clk_tree_defs.h
+++ b/components/soc/esp32c5/include/soc/clk_tree_defs.h
@@ -253,9 +253,7 @@ typedef enum {
 typedef enum {
     LP_UART_SCLK_RC_FAST = SOC_MOD_CLK_RC_FAST,         /*!< LP_UART source clock is RC_FAST */
     LP_UART_SCLK_XTAL_D2 = SOC_MOD_CLK_XTAL_D2,         /*!< LP_UART source clock is XTAL_D2 */
-
-    //TODO: IDF-10034
-    LP_UART_SCLK_DEFAULT = SOC_MOD_CLK_XTAL_D2,         /*!< LP_UART source clock default choice is XTAL_D2 */
+    LP_UART_SCLK_DEFAULT = SOC_MOD_CLK_RC_FAST,         /*!< LP_UART source clock default choice is RC_FAST */
 } soc_periph_lp_uart_clk_src_t;
 
 //////////////////////////////////////////////////MCPWM/////////////////////////////////////////////////////////////////
diff --git a/components/soc/esp32c5/include/soc/soc_caps.h b/components/soc/esp32c5/include/soc/soc_caps.h
index 71c5510c7e..6ab17e3826 100644
--- a/components/soc/esp32c5/include/soc/soc_caps.h
+++ b/components/soc/esp32c5/include/soc/soc_caps.h
@@ -583,6 +583,9 @@
 /*--------------- WIFI LIGHT SLEEP CLOCK WIDTH CAPS --------------------------*/
 #define SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH  (12)
 
+/*-------------------------- RTC MEM CAPS ----------------------------*/
+#define SOC_RTC_MEM_SUPPORT_SPEED_MODE_SWITCH           1
+
 /*-------------------------- Power Management CAPS ----------------------------*/
 #define SOC_PM_SUPPORT_WIFI_WAKEUP      (1)
 #define SOC_PM_SUPPORT_BEACON_WAKEUP    (1)
diff --git a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
index 5ab77211fb..13b187d4f2 100644
--- a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
@@ -1383,6 +1383,10 @@ config SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH
     int
     default 12
 
+config SOC_RTC_MEM_SUPPORT_SPEED_MODE_SWITCH
+    bool
+    default y
+
 config SOC_PM_SUPPORT_WIFI_WAKEUP
     bool
     default y
diff --git a/components/soc/esp32c6/include/soc/soc_caps.h b/components/soc/esp32c6/include/soc/soc_caps.h
index afc4e6938b..da78545ac5 100644
--- a/components/soc/esp32c6/include/soc/soc_caps.h
+++ b/components/soc/esp32c6/include/soc/soc_caps.h
@@ -541,6 +541,9 @@
 /*--------------- WIFI LIGHT SLEEP CLOCK WIDTH CAPS --------------------------*/
 #define SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH  (12)
 
+/*-------------------------- RTC MEM CAPS ----------------------------*/
+#define SOC_RTC_MEM_SUPPORT_SPEED_MODE_SWITCH           1
+
 // TODO: IDF-5351 (Copy from esp32c3, need check)
 /*-------------------------- Power Management CAPS ----------------------------*/
 #define SOC_PM_SUPPORT_WIFI_WAKEUP      (1)
diff --git a/components/ulp/lp_core/lp_core.c b/components/ulp/lp_core/lp_core.c
index a0b1669d11..fc5c1c4100 100644
--- a/components/ulp/lp_core/lp_core.c
+++ b/components/ulp/lp_core/lp_core.c
@@ -95,10 +95,10 @@ esp_err_t ulp_lp_core_run(ulp_lp_core_cfg_t* cfg)
         lp_core_ll_enable_bus_clock(true);
     }
 
-#if CONFIG_IDF_TARGET_ESP32C6
+#if SOC_RTC_MEM_SUPPORT_SPEED_MODE_SWITCH
     /* Disable fast LP mem access to allow LP core to access LP memory during sleep */
     lp_core_ll_fast_lp_mem_enable(false);
-#endif //CONFIG_IDF_TARGET_ESP32C6
+#endif
 
     /* Enable stall at sleep request*/
     lp_core_ll_stall_at_sleep_request(true);