change(driver): reformat driver component with astyle_py

This commit is contained in:
morris
2024-02-23 17:28:52 +08:00
parent 603bc0536c
commit c65fbbdf71
43 changed files with 704 additions and 749 deletions

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@@ -12,7 +12,6 @@ extern "C" {
#include "esp_err.h" #include "esp_err.h"
/** /**
* @brief For I2S dma to claim the usage of ADC1. * @brief For I2S dma to claim the usage of ADC1.
* *

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@@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2016-2021 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2016-2024 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@@ -50,7 +50,6 @@ extern portMUX_TYPE rtc_spinlock; //TODO: Will be placed in the appropriate posi
esp_pm_lock_handle_t adc_digi_arbiter_lock = NULL; esp_pm_lock_handle_t adc_digi_arbiter_lock = NULL;
#endif //CONFIG_PM_ENABLE #endif //CONFIG_PM_ENABLE
#if CONFIG_IDF_TARGET_ESP32 #if CONFIG_IDF_TARGET_ESP32
/*--------------------------------------------------------------- /*---------------------------------------------------------------
ESP32 Depricated ADC APIs and functions ESP32 Depricated ADC APIs and functions

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@@ -39,7 +39,6 @@
#include "esp_efuse_rtc_calib.h" #include "esp_efuse_rtc_calib.h"
#endif #endif
static const char *ADC_TAG = "ADC"; static const char *ADC_TAG = "ADC";
#define ADC_GET_IO_NUM(periph, channel) (adc_channel_io_map[periph][channel]) #define ADC_GET_IO_NUM(periph, channel) (adc_channel_io_map[periph][channel])
@@ -78,7 +77,6 @@ static _lock_t adc1_dma_lock;
#define SARADC1_RELEASE() _lock_release( &adc1_dma_lock ) #define SARADC1_RELEASE() _lock_release( &adc1_dma_lock )
#endif #endif
/* /*
In ADC2, there're two locks used for different cases: In ADC2, there're two locks used for different cases:
1. lock shared with app and Wi-Fi: 1. lock shared with app and Wi-Fi:
@@ -650,7 +648,6 @@ esp_err_t adc_vref_to_gpio(adc_unit_t adc_unit, gpio_num_t gpio)
#endif //SOC_ADC_RTC_CTRL_SUPPORTED #endif //SOC_ADC_RTC_CTRL_SUPPORTED
#endif //#if (SOC_ADC_PERIPH_NUM >= 2) #endif //#if (SOC_ADC_PERIPH_NUM >= 2)
#if SOC_ADC_DIG_CTRL_SUPPORTED && !SOC_ADC_RTC_CTRL_SUPPORTED #if SOC_ADC_DIG_CTRL_SUPPORTED && !SOC_ADC_RTC_CTRL_SUPPORTED
/*--------------------------------------------------------------- /*---------------------------------------------------------------
Legacy ADC Single Read Mode Legacy ADC Single Read Mode
@@ -667,7 +664,6 @@ static adc_atten_t s_atten1_single[ADC1_CHANNEL_MAX]; //Array saving attenuat
static adc_atten_t s_atten2_single[ADC2_CHANNEL_MAX]; //Array saving attenuate of each channel of ADC2, used by single read API static adc_atten_t s_atten2_single[ADC2_CHANNEL_MAX]; //Array saving attenuate of each channel of ADC2, used by single read API
#endif #endif
static int8_t adc_digi_get_io_num(adc_unit_t adc_unit, uint8_t adc_channel) static int8_t adc_digi_get_io_num(adc_unit_t adc_unit, uint8_t adc_channel)
{ {
assert(adc_unit < SOC_ADC_PERIPH_NUM); assert(adc_unit < SOC_ADC_PERIPH_NUM);
@@ -860,7 +856,6 @@ esp_err_t adc2_get_raw(adc2_channel_t channel, adc_bits_width_t width_bit, int *
#endif //#if (SOC_ADC_PERIPH_NUM >= 2) #endif //#if (SOC_ADC_PERIPH_NUM >= 2)
#endif //#if SOC_ADC_DIG_CTRL_SUPPORTED && !SOC_ADC_RTC_CTRL_SUPPORTED #endif //#if SOC_ADC_DIG_CTRL_SUPPORTED && !SOC_ADC_RTC_CTRL_SUPPORTED
static void adc_hal_onetime_start(adc_unit_t adc_n, uint32_t clk_src_freq_hz) static void adc_hal_onetime_start(adc_unit_t adc_n, uint32_t clk_src_freq_hz)
{ {
#if SOC_ADC_DIG_CTRL_SUPPORTED && !SOC_ADC_RTC_CTRL_SUPPORTED #if SOC_ADC_DIG_CTRL_SUPPORTED && !SOC_ADC_RTC_CTRL_SUPPORTED

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@@ -4,7 +4,6 @@
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
#include <string.h> #include <string.h>
#include "esp_check.h" #include "esp_check.h"
#include "freertos/FreeRTOS.h" #include "freertos/FreeRTOS.h"

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@@ -278,7 +278,6 @@ esp_err_t adc2_get_raw(adc2_channel_t channel, adc_bits_width_t width_bit, int *
esp_err_t adc_vref_to_gpio(adc_unit_t adc_unit, gpio_num_t gpio); esp_err_t adc_vref_to_gpio(adc_unit_t adc_unit, gpio_num_t gpio);
#endif //#if (SOC_ADC_PERIPH_NUM >= 2) #endif //#if (SOC_ADC_PERIPH_NUM >= 2)
/*--------------------------------------------------------------- /*---------------------------------------------------------------
ADC DMA Read Setting ADC DMA Read Setting
---------------------------------------------------------------*/ ---------------------------------------------------------------*/

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@@ -378,7 +378,6 @@ esp_err_t i2s_adc_disable(i2s_port_t i2s_num);
esp_err_t i2s_set_dac_mode(i2s_dac_mode_t dac_mode); esp_err_t i2s_set_dac_mode(i2s_dac_mode_t dac_mode);
#endif //SOC_I2S_SUPPORTS_DAC #endif //SOC_I2S_SUPPORTS_DAC
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

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@@ -207,7 +207,6 @@ typedef struct {
} i2s_pdm_tx_upsample_cfg_t; } i2s_pdm_tx_upsample_cfg_t;
#endif #endif
/** /**
* @brief I2S driver configuration parameters * @brief I2S driver configuration parameters
* *

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@@ -15,7 +15,6 @@
extern "C" { extern "C" {
#endif #endif
#define RMT_CHANNEL_FLAGS_AWARE_DFS (1 << 0) /*!< Channel can work during APB clock scaling */ #define RMT_CHANNEL_FLAGS_AWARE_DFS (1 << 0) /*!< Channel can work during APB clock scaling */
#define RMT_CHANNEL_FLAGS_INVERT_SIG (1 << 1) /*!< Invert RMT signal */ #define RMT_CHANNEL_FLAGS_INVERT_SIG (1 << 1) /*!< Invert RMT signal */
@@ -39,7 +38,6 @@ typedef struct {
}; };
} rmt_item32_t; } rmt_item32_t;
#if SOC_RMT_SUPPORTED #if SOC_RMT_SUPPORTED
/** /**
* @brief RMT hardware memory layout * @brief RMT hardware memory layout

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@@ -23,7 +23,6 @@ typedef enum {
TSENS_DAC_DEFAULT = TSENS_DAC_L2, TSENS_DAC_DEFAULT = TSENS_DAC_L2,
} temp_sensor_dac_offset_t; } temp_sensor_dac_offset_t;
/** /**
* @brief Configuration for temperature sensor reading * @brief Configuration for temperature sensor reading
*/ */

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@@ -359,7 +359,6 @@ void timer_group_set_alarm_value_in_isr(timer_group_t group_num, timer_idx_t tim
*/ */
void timer_group_set_counter_enable_in_isr(timer_group_t group_num, timer_idx_t timer_num, timer_start_t counter_en); void timer_group_set_counter_enable_in_isr(timer_group_t group_num, timer_idx_t timer_num, timer_start_t counter_en);
/** @brief Get interrupt status, just used in ISR /** @brief Get interrupt status, just used in ISR
* *
* @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1 * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1

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@@ -4,7 +4,6 @@
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
#include "freertos/FreeRTOS.h" #include "freertos/FreeRTOS.h"
#include "hal/dac_ll.h" #include "hal/dac_ll.h"
#include "esp_err.h" #include "esp_err.h"

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@@ -4,7 +4,6 @@
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
#include <string.h> #include <string.h>
#include "sdkconfig.h" #include "sdkconfig.h"
#include "freertos/FreeRTOS.h" #include "freertos/FreeRTOS.h"

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@@ -844,7 +844,6 @@ static esp_err_t i2s_calculate_common_clock(int i2s_num, i2s_hal_clock_info_t *c
return ESP_OK; return ESP_OK;
} }
static esp_err_t i2s_calculate_clock(i2s_port_t i2s_num, i2s_hal_clock_info_t *clk_info) static esp_err_t i2s_calculate_clock(i2s_port_t i2s_num, i2s_hal_clock_info_t *clk_info)
{ {
/* Calculate clock for ADC/DAC mode */ /* Calculate clock for ADC/DAC mode */
@@ -996,7 +995,6 @@ static esp_err_t i2s_check_cfg_validity(i2s_port_t i2s_num, const i2s_config_t *
ESP_RETURN_ON_FALSE((cfg->dma_desc_num >= 2 && cfg->dma_desc_num <= 128), ESP_ERR_INVALID_ARG, TAG, "I2S buffer count less than 128 and more than 2"); ESP_RETURN_ON_FALSE((cfg->dma_desc_num >= 2 && cfg->dma_desc_num <= 128), ESP_ERR_INVALID_ARG, TAG, "I2S buffer count less than 128 and more than 2");
ESP_RETURN_ON_FALSE((cfg->dma_frame_num >= 8 && cfg->dma_frame_num <= 1024), ESP_ERR_INVALID_ARG, TAG, "I2S buffer length at most 1024 and more than 8"); ESP_RETURN_ON_FALSE((cfg->dma_frame_num >= 8 && cfg->dma_frame_num <= 1024), ESP_ERR_INVALID_ARG, TAG, "I2S buffer length at most 1024 and more than 8");
#if SOC_I2S_SUPPORTS_PDM_TX || SOC_I2S_SUPPORTS_PDM_RX #if SOC_I2S_SUPPORTS_PDM_TX || SOC_I2S_SUPPORTS_PDM_RX
/* Check PDM mode */ /* Check PDM mode */
if (cfg->mode & I2S_MODE_PDM) { if (cfg->mode & I2S_MODE_PDM) {
@@ -1637,7 +1635,6 @@ esp_err_t i2s_driver_uninstall(i2s_port_t i2s_num)
return ESP_OK; return ESP_OK;
} }
esp_err_t i2s_driver_install(i2s_port_t i2s_num, const i2s_config_t *i2s_config, int queue_size, void *i2s_queue) esp_err_t i2s_driver_install(i2s_port_t i2s_num, const i2s_config_t *i2s_config, int queue_size, void *i2s_queue)
{ {
#if CONFIG_I2S_ENABLE_DEBUG_LOG #if CONFIG_I2S_ENABLE_DEBUG_LOG

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@@ -37,7 +37,6 @@
#define PCNT_RCC_ATOMIC() #define PCNT_RCC_ATOMIC()
#endif #endif
static const char *TAG = "pcnt(legacy)"; static const char *TAG = "pcnt(legacy)";
#define PCNT_CHECK(a, str, ret_val) ESP_RETURN_ON_FALSE(a, ret_val, TAG, "%s", str) #define PCNT_CHECK(a, str, ret_val) ESP_RETURN_ON_FALSE(a, ret_val, TAG, "%s", str)

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@@ -32,7 +32,6 @@
#include "esp_private/sleep_retention.h" #include "esp_private/sleep_retention.h"
#endif #endif
#if SOC_I2C_SUPPORT_APB || SOC_I2C_SUPPORT_XTAL #if SOC_I2C_SUPPORT_APB || SOC_I2C_SUPPORT_XTAL
#include "esp_private/esp_clk.h" #include "esp_private/esp_clk.h"
#endif #endif
@@ -217,8 +216,7 @@ typedef struct {
#endif #endif
} i2c_context_t; } i2c_context_t;
typedef struct typedef struct {
{
uint8_t character; /*!< I2C source clock characteristic */ uint8_t character; /*!< I2C source clock characteristic */
} i2c_clk_alloc_t; } i2c_clk_alloc_t;
@@ -1037,7 +1035,6 @@ end:
return err; return err;
} }
esp_err_t i2c_master_read_from_device(i2c_port_t i2c_num, uint8_t device_address, esp_err_t i2c_master_read_from_device(i2c_port_t i2c_num, uint8_t device_address,
uint8_t* read_buffer, size_t read_size, uint8_t* read_buffer, size_t read_size,
TickType_t ticks_to_wait) TickType_t ticks_to_wait)
@@ -1071,7 +1068,6 @@ end:
return err; return err;
} }
esp_err_t i2c_master_write_read_device(i2c_port_t i2c_num, uint8_t device_address, esp_err_t i2c_master_write_read_device(i2c_port_t i2c_num, uint8_t device_address,
const uint8_t* write_buffer, size_t write_size, const uint8_t* write_buffer, size_t write_size,
uint8_t* read_buffer, size_t read_size, uint8_t* read_buffer, size_t read_size,
@@ -1379,7 +1375,8 @@ esp_err_t i2c_master_read(i2c_cmd_handle_t cmd_handle, uint8_t *data, size_t dat
} }
__attribute__((always_inline)) __attribute__((always_inline))
static inline bool i2c_cmd_is_single_byte(const i2c_cmd_t *cmd) { static inline bool i2c_cmd_is_single_byte(const i2c_cmd_t *cmd)
{
return cmd->total_bytes == 1; return cmd->total_bytes == 1;
} }
@@ -1496,8 +1493,7 @@ static bool is_cmd_link_buffer_internal(const i2c_cmd_link_t *link)
bool is_internal = true; bool is_internal = true;
for (const i2c_cmd_link_t *cmd_link = link; for (const i2c_cmd_link_t *cmd_link = link;
cmd_link != NULL && is_internal; cmd_link != NULL && is_internal;
cmd_link = cmd_link->next) cmd_link = cmd_link->next) {
{
/* A command node has a valid pointer if it is a read command or a write command with more than one byte. */ /* A command node has a valid pointer if it is a read command or a write command with more than one byte. */
const bool data_pointer = (cmd_link->cmd.hw_cmd.op_code == I2C_LL_CMD_WRITE && !i2c_cmd_is_single_byte(&cmd_link->cmd)) const bool data_pointer = (cmd_link->cmd.hw_cmd.op_code == I2C_LL_CMD_WRITE && !i2c_cmd_is_single_byte(&cmd_link->cmd))
|| cmd_link->cmd.hw_cmd.op_code == I2C_LL_CMD_READ; || cmd_link->cmd.hw_cmd.op_code == I2C_LL_CMD_READ;

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@@ -82,7 +82,6 @@ typedef struct{
uint32_t clk_flags; /*!< Bitwise of ``I2C_SCLK_SRC_FLAG_**FOR_DFS**`` for clk source choice*/ uint32_t clk_flags; /*!< Bitwise of ``I2C_SCLK_SRC_FLAG_**FOR_DFS**`` for clk source choice*/
} i2c_config_t; } i2c_config_t;
typedef void *i2c_cmd_handle_t; /*!< I2C command handle */ typedef void *i2c_cmd_handle_t; /*!< I2C command handle */
/** /**
@@ -243,7 +242,6 @@ esp_err_t i2c_master_write_read_device(i2c_port_t i2c_num, uint8_t device_addres
uint8_t* read_buffer, size_t read_size, uint8_t* read_buffer, size_t read_size,
TickType_t ticks_to_wait); TickType_t ticks_to_wait);
/** /**
* @brief Create and initialize an I2C commands list with a given buffer. * @brief Create and initialize an I2C commands list with a given buffer.
* All the allocations for data or signals (START, STOP, ACK, ...) will be * All the allocations for data or signals (START, STOP, ACK, ...) will be

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@@ -25,7 +25,6 @@
#define TIME_REMAIN(start, end, timeout) TIME_REMAIN_CORE(start, end, timeout, UINT32_MAX) #define TIME_REMAIN(start, end, timeout) TIME_REMAIN_CORE(start, end, timeout, UINT32_MAX)
#define ESSL_MIN(a, b) ((a) < (b) ? (a) : (b)) #define ESSL_MIN(a, b) ((a) < (b) ? (a) : (b))
__attribute__((unused)) static const char TAG[] = "esp_serial_slave_link"; __attribute__((unused)) static const char TAG[] = "esp_serial_slave_link";
@@ -43,7 +42,6 @@ __attribute__((unused)) static const char TAG[] = "esp_serial_slave_link";
#define CHECK_EXECUTE_CMD(DEV, CMD, ...) _CHECK_EXECUTE_CMD(DEV, CMD, #CMD" not supported for the current device.",##__VA_ARGS__) #define CHECK_EXECUTE_CMD(DEV, CMD, ...) _CHECK_EXECUTE_CMD(DEV, CMD, #CMD" not supported for the current device.",##__VA_ARGS__)
esp_err_t essl_init(essl_handle_t handle, uint32_t wait_ms) esp_err_t essl_init(essl_handle_t handle, uint32_t wait_ms)
{ {
CHECK_EXECUTE_CMD(handle, init, wait_ms); CHECK_EXECUTE_CMD(handle, init, wait_ms);

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@@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@@ -28,7 +28,6 @@ static const char TAG[] = "essl_sdio";
#define HOST_SLC0HOST_INT_CLR_REG (DR_REG_SLCHOST_BASE + 0xD4) #define HOST_SLC0HOST_INT_CLR_REG (DR_REG_SLCHOST_BASE + 0xD4)
#define HOST_SLC0HOST_FUNC1_INT_ENA_REG (DR_REG_SLCHOST_BASE + 0xDC) #define HOST_SLC0HOST_FUNC1_INT_ENA_REG (DR_REG_SLCHOST_BASE + 0xDC)
#define HOST_SLCHOST_CONF_W_REG(pos) (HOST_SLCHOST_CONF_W0_REG+pos+(pos>23?4:0)+(pos>31?12:0)) #define HOST_SLCHOST_CONF_W_REG(pos) (HOST_SLCHOST_CONF_W0_REG+pos+(pos>23?4:0)+(pos>31?12:0))
#define ESSL_CMD53_END_ADDR 0x1f800 #define ESSL_CMD53_END_ADDR 0x1f800
@@ -79,7 +78,6 @@ typedef struct {
///< Block size of the SDIO function 1. After the initialization this will hold the value the slave really do. Valid value is 1-2048. ///< Block size of the SDIO function 1. After the initialization this will hold the value the slave really do. Valid value is 1-2048.
} essl_sdio_context_t; } essl_sdio_context_t;
esp_err_t essl_sdio_update_tx_buffer_num(void *arg, uint32_t wait_ms); esp_err_t essl_sdio_update_tx_buffer_num(void *arg, uint32_t wait_ms);
esp_err_t essl_sdio_update_rx_data_size(void *arg, uint32_t wait_ms); esp_err_t essl_sdio_update_rx_data_size(void *arg, uint32_t wait_ms);
@@ -412,7 +410,6 @@ esp_err_t essl_sdio_update_rx_data_size(void *arg, uint32_t wait_ms)
return ESP_OK; return ESP_OK;
} }
esp_err_t essl_sdio_write_reg(void *arg, uint8_t addr, uint8_t value, uint8_t *value_o, uint32_t wait_ms) esp_err_t essl_sdio_write_reg(void *arg, uint8_t addr, uint8_t value, uint8_t *value_o, uint32_t wait_ms)
{ {
ESP_LOGV(TAG, "write_reg: 0x%02"PRIX8, value); ESP_LOGV(TAG, "write_reg: 0x%02"PRIX8, value);

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@@ -6,7 +6,6 @@
// Definitions of Espressif SDIO Slave hardware // Definitions of Espressif SDIO Slave hardware
#include "essl_sdio.h" #include "essl_sdio.h"
essl_sdio_def_t ESSL_SDIO_DEF_ESP32 = { essl_sdio_def_t ESSL_SDIO_DEF_ESP32 = {

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@@ -6,7 +6,6 @@
#pragma once #pragma once
#include "esp_err.h" #include "esp_err.h"
#ifdef __cplusplus #ifdef __cplusplus
@@ -67,7 +66,6 @@ esp_err_t essl_get_tx_buffer_num(essl_handle_t handle, uint32_t *out_tx_num, uin
*/ */
esp_err_t essl_get_rx_data_size(essl_handle_t handle, uint32_t *out_rx_size, uint32_t wait_ms); esp_err_t essl_get_rx_data_size(essl_handle_t handle, uint32_t *out_rx_size, uint32_t wait_ms);
/** Reset the counters of this component. Usually you don't need to do this unless you know the slave is reset. /** Reset the counters of this component. Usually you don't need to do this unless you know the slave is reset.
* *
* @param handle Handle of an ESSL device. * @param handle Handle of an ESSL device.

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@@ -25,7 +25,6 @@ extern essl_sdio_def_t ESSL_SDIO_DEF_ESP32;
/// Definitions of ESP32C6 SDIO Slave hardware /// Definitions of ESP32C6 SDIO Slave hardware
extern essl_sdio_def_t ESSL_SDIO_DEF_ESP32C6; extern essl_sdio_def_t ESSL_SDIO_DEF_ESP32C6;
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

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@@ -4,7 +4,6 @@
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
#pragma once #pragma once
// NOTE: From the view of master // NOTE: From the view of master

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@@ -23,7 +23,6 @@
*/ */
void test_fill_random_to_buffers_dualboard(uint32_t seed, uint8_t *dut0_buffer, uint8_t *dut1_buffer, size_t buffer_size); void test_fill_random_to_buffers_dualboard(uint32_t seed, uint8_t *dut0_buffer, uint8_t *dut1_buffer, size_t buffer_size);
/** /**
* Fill tx buffer with random numbers * Fill tx buffer with random numbers
* *
@@ -33,7 +32,6 @@ void test_fill_random_to_buffers_dualboard(uint32_t seed, uint8_t *dut0_buffer,
*/ */
void test_fill_random_to_buffer(uint32_t seed, uint8_t *buffer, size_t buffer_size); void test_fill_random_to_buffer(uint32_t seed, uint8_t *buffer, size_t buffer_size);
/** /**
* Calloc a pool, filled with random numbers * Calloc a pool, filled with random numbers
* *

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@@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@@ -29,7 +29,6 @@
#define TEST_SPI_PERIPH_NUM (SOC_SPI_PERIPH_NUM - 1) #define TEST_SPI_PERIPH_NUM (SOC_SPI_PERIPH_NUM - 1)
#if CONFIG_IDF_TARGET_ESP32C6 // cs_pin conflict with uart pin #if CONFIG_IDF_TARGET_ESP32C6 // cs_pin conflict with uart pin
#define PIN_NUM_MISO SPI2_IOMUX_PIN_NUM_MISO #define PIN_NUM_MISO SPI2_IOMUX_PIN_NUM_MISO
#define PIN_NUM_MOSI SPI2_IOMUX_PIN_NUM_MOSI #define PIN_NUM_MOSI SPI2_IOMUX_PIN_NUM_MOSI
@@ -46,7 +45,6 @@
#define PIN_NUM_HD SPI2_IOMUX_PIN_NUM_HD #define PIN_NUM_HD SPI2_IOMUX_PIN_NUM_HD
#endif #endif
#if (TEST_SPI_PERIPH_NUM >= 2) // esp32, s2, s3 #if (TEST_SPI_PERIPH_NUM >= 2) // esp32, s2, s3
#define TEST_SPI_HOST SPI2_HOST #define TEST_SPI_HOST SPI2_HOST
#define TEST_SLAVE_HOST SPI3_HOST #define TEST_SLAVE_HOST SPI3_HOST
@@ -62,7 +60,6 @@
#define TEST_SLAVE_HOST SPI2_HOST #define TEST_SLAVE_HOST SPI2_HOST
#endif #endif
#if CONFIG_IDF_TARGET_ESP32 // spi3 have iomux pin only on esp32 #if CONFIG_IDF_TARGET_ESP32 // spi3 have iomux pin only on esp32
#define SLAVE_IOMUX_PIN_MISO SPI3_IOMUX_PIN_NUM_MISO #define SLAVE_IOMUX_PIN_MISO SPI3_IOMUX_PIN_NUM_MISO
#define SLAVE_IOMUX_PIN_MOSI SPI3_IOMUX_PIN_NUM_MOSI #define SLAVE_IOMUX_PIN_MOSI SPI3_IOMUX_PIN_NUM_MOSI
@@ -97,13 +94,11 @@
#define WIRE_DELAY 12.5 #define WIRE_DELAY 12.5
#endif //CONFIG_IDF_TARGET_ESP32 #endif //CONFIG_IDF_TARGET_ESP32
#define GET_DMA_CHAN(HOST) (HOST) #define GET_DMA_CHAN(HOST) (HOST)
#define TEST_DMA_CHAN_MASTER GET_DMA_CHAN(TEST_SPI_HOST) #define TEST_DMA_CHAN_MASTER GET_DMA_CHAN(TEST_SPI_HOST)
#define TEST_DMA_CHAN_SLAVE GET_DMA_CHAN(TEST_SLAVE_HOST) #define TEST_DMA_CHAN_SLAVE GET_DMA_CHAN(TEST_SLAVE_HOST)
#define FUNC_SPI 1 #define FUNC_SPI 1
#define FUNC_GPIO PIN_FUNC_GPIO #define FUNC_GPIO PIN_FUNC_GPIO

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@@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@@ -17,7 +17,9 @@ void test_serializer(const param_group_t *param_group, const ptest_func_t* test_
void *pset = param_group->param_group; void *pset = param_group->param_group;
for (int i = param_group->pset_num; i > 0; i--) { for (int i = param_group->pset_num; i > 0; i--) {
if (test_func->def_param) test_func->def_param(pset); if (test_func->def_param) {
test_func->def_param(pset);
}
test_func->loop(pset, context); test_func->loop(pset, context);
pset += param_group->pset_size; pset += param_group->pset_size;
} }

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@@ -29,7 +29,6 @@ void test_fill_random_to_buffer(uint32_t seed, uint8_t *buffer, size_t buffer_si
} }
} }
/*--------------------------------------------------------------- /*---------------------------------------------------------------
Create a pool with random numbers, get buffer from pool Create a pool with random numbers, get buffer from pool
---------------------------------------------------------------*/ ---------------------------------------------------------------*/

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@@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@@ -10,7 +10,6 @@
#include "hal/gpio_hal.h" #include "hal/gpio_hal.h"
#include "esp_rom_gpio.h" #include "esp_rom_gpio.h"
int test_freq_default[] = TEST_FREQ_DEFAULT(); int test_freq_default[] = TEST_FREQ_DEFAULT();
const char MASTER_TAG[] = "test_master"; const char MASTER_TAG[] = "test_master";
@@ -37,7 +36,9 @@ void spitest_def_param(void* arg)
{ {
spitest_param_set_t *param_set = (spitest_param_set_t*)arg; spitest_param_set_t *param_set = (spitest_param_set_t*)arg;
param_set->test_size = 8; param_set->test_size = 8;
if (param_set->freq_list==NULL) param_set->freq_list = test_freq_default; if (param_set->freq_list == NULL) {
param_set->freq_list = test_freq_default;
}
} }
/********************************************************************************** /**********************************************************************************
@@ -122,7 +123,9 @@ void spitest_init_transactions(const spitest_param_set_t *cfg, spitest_context_t
for (int i = 0; i < cfg->test_size; i++) { for (int i = 0; i < cfg->test_size; i++) {
const void* tx_buffer = spitest_master_send + i % 8; const void* tx_buffer = spitest_master_send + i % 8;
int length = 8 * test_len[i]; int length = 8 * test_len[i];
if (cfg->length_aligned) length = (length+31)&(~31); if (cfg->length_aligned) {
length = (length + 31) & (~31);
}
if (dup == HALF_DUPLEX_MISO) { if (dup == HALF_DUPLEX_MISO) {
trans[i] = (spi_transaction_t) { trans[i] = (spi_transaction_t) {
@@ -149,14 +152,20 @@ void spitest_init_transactions(const spitest_param_set_t *cfg, spitest_context_t
.start = slave_tx, .start = slave_tx,
.len = 512, .len = 512,
}; };
if (cfg->slave_dma_chan != 0) context->slave_trans[i].len = 1024; if (cfg->slave_dma_chan != 0) {
context->slave_trans[i].len = 1024;
}
} }
} }
void spitest_master_print_data(spi_transaction_t *t, int rxlength) void spitest_master_print_data(spi_transaction_t *t, int rxlength)
{ {
if (t->tx_buffer) ESP_LOG_BUFFER_HEX( "master tx", t->tx_buffer, t->length/8 ); if (t->tx_buffer) {
if (t->rx_buffer) ESP_LOG_BUFFER_HEX( "master rx", t->rx_buffer, rxlength/8 ); ESP_LOG_BUFFER_HEX("master tx", t->tx_buffer, t->length / 8);
}
if (t->rx_buffer) {
ESP_LOG_BUFFER_HEX("master rx", t->rx_buffer, rxlength / 8);
}
} }
void spitest_slave_print_data(slave_rxdata_t *t, bool print_rxdata) void spitest_slave_print_data(slave_rxdata_t *t, bool print_rxdata)
@@ -164,7 +173,9 @@ void spitest_slave_print_data(slave_rxdata_t *t, bool print_rxdata)
int rcv_len = (t->len + 7) / 8; int rcv_len = (t->len + 7) / 8;
ESP_LOGI(SLAVE_TAG, "trans_len: %" PRIu32, t->len); ESP_LOGI(SLAVE_TAG, "trans_len: %" PRIu32, t->len);
ESP_LOG_BUFFER_HEX("slave tx", t->tx_start, rcv_len); ESP_LOG_BUFFER_HEX("slave tx", t->tx_start, rcv_len);
if (print_rxdata) ESP_LOG_BUFFER_HEX("slave rx", t->data, rcv_len); if (print_rxdata) {
ESP_LOG_BUFFER_HEX("slave rx", t->data, rcv_len);
}
} }
esp_err_t spitest_check_data(int len, spi_transaction_t *master_t, slave_rxdata_t *slave_t, bool check_master_data, bool check_slave_len, bool check_slave_data) esp_err_t spitest_check_data(int len, spi_transaction_t *master_t, slave_rxdata_t *slave_t, bool check_master_data, bool check_slave_len, bool check_slave_data)
@@ -201,7 +212,6 @@ esp_err_t spitest_check_data(int len, spi_transaction_t *master_t, slave_rxdata_
return ESP_OK; return ESP_OK;
} }
void master_free_device_bus(spi_device_handle_t spi) void master_free_device_bus(spi_device_handle_t spi)
{ {
TEST_ESP_OK(spi_bus_remove_device(spi)); TEST_ESP_OK(spi_bus_remove_device(spi));

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@@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */

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@@ -85,7 +85,6 @@
const __attribute__((unused)) static char *TAG = "TEST_ADC_LEGACY"; const __attribute__((unused)) static char *TAG = "TEST_ADC_LEGACY";
void test_adc_set_io_level(adc_unit_t unit, adc_channel_t channel, bool level) void test_adc_set_io_level(adc_unit_t unit, adc_channel_t channel, bool level)
{ {
TEST_ASSERT(channel < SOC_ADC_CHANNEL_NUM(unit) && "invalid channel"); TEST_ASSERT(channel < SOC_ADC_CHANNEL_NUM(unit) && "invalid channel");

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@@ -55,7 +55,6 @@ static DRAM_ATTR i2c_dev_t *const I2C[SOC_I2C_NUM] = { &I2C0,
#define ACK_VAL 0 #define ACK_VAL 0
#define NACK_VAL 1 #define NACK_VAL 1
static esp_err_t i2c_master_write_slave(i2c_port_t i2c_num, uint8_t *data_wr, size_t size) static esp_err_t i2c_master_write_slave(i2c_port_t i2c_num, uint8_t *data_wr, size_t size)
{ {
i2c_cmd_handle_t cmd = i2c_cmd_link_create(); i2c_cmd_handle_t cmd = i2c_cmd_link_create();
@@ -82,7 +81,6 @@ static i2c_config_t i2c_master_init(void)
return conf_master; return conf_master;
} }
#if SOC_I2C_SUPPORT_SLAVE // i2c test can't work without slave #if SOC_I2C_SUPPORT_SLAVE // i2c test can't work without slave
static i2c_config_t i2c_slave_init(void) static i2c_config_t i2c_slave_init(void)
@@ -169,7 +167,6 @@ TEST_CASE("I2C set and get period test", "[i2c]")
TEST_ESP_OK(i2c_driver_delete(I2C_MASTER_NUM)); TEST_ESP_OK(i2c_driver_delete(I2C_MASTER_NUM));
} }
#if SOC_I2C_SUPPORT_SLAVE // i2c test can't work without slave #if SOC_I2C_SUPPORT_SLAVE // i2c test can't work without slave
TEST_CASE("I2C config FIFO test", "[i2c]") TEST_CASE("I2C config FIFO test", "[i2c]")
@@ -364,10 +361,8 @@ static void slave_write_buffer_test(void)
i2c_driver_delete(I2C_SLAVE_NUM); i2c_driver_delete(I2C_SLAVE_NUM);
} }
TEST_CASE_MULTIPLE_DEVICES("I2C master read slave test", "[i2c][test_env=generic_multi_device][timeout=150]", master_read_slave_test, slave_write_buffer_test); TEST_CASE_MULTIPLE_DEVICES("I2C master read slave test", "[i2c][test_env=generic_multi_device][timeout=150]", master_read_slave_test, slave_write_buffer_test);
static void i2c_master_write_read_test(void) static void i2c_master_write_read_test(void)
{ {
uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH); uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
@@ -446,7 +441,6 @@ static void i2c_slave_read_write_test(void)
TEST_CASE_MULTIPLE_DEVICES("I2C read and write test", "[i2c][test_env=generic_multi_device][timeout=150]", i2c_master_write_read_test, i2c_slave_read_write_test); TEST_CASE_MULTIPLE_DEVICES("I2C read and write test", "[i2c][test_env=generic_multi_device][timeout=150]", i2c_master_write_read_test, i2c_slave_read_write_test);
static void i2c_master_repeat_write(void) static void i2c_master_repeat_write(void)
{ {
uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH); uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);

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@@ -40,7 +40,6 @@
#define WRITE_BIT I2C_MASTER_WRITE /*!< I2C master write */ #define WRITE_BIT I2C_MASTER_WRITE /*!< I2C master write */
#define ACK_CHECK_EN 0x1 /*!< I2C master will check ack from slave*/ #define ACK_CHECK_EN 0x1 /*!< I2C master will check ack from slave*/
static esp_err_t i2c_master_write_slave(i2c_port_t i2c_num, uint8_t *data_wr, size_t size) static esp_err_t i2c_master_write_slave(i2c_port_t i2c_num, uint8_t *data_wr, size_t size)
{ {
i2c_cmd_handle_t cmd = i2c_cmd_link_create(); i2c_cmd_handle_t cmd = i2c_cmd_link_create();

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@@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */

View File

@@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@@ -140,7 +140,6 @@ static void printf_touch_smooth_read(const char *str)
printf("\r\n"); printf("\r\n");
} }
static void test_timeout_trigger_fake(touch_pad_t pad_num) static void test_timeout_trigger_fake(touch_pad_t pad_num)
{ {
touch_pad_set_cnt_mode(pad_num, TOUCH_PAD_SLOPE_0, TOUCH_PAD_TIE_OPT_DEFAULT); touch_pad_set_cnt_mode(pad_num, TOUCH_PAD_SLOPE_0, TOUCH_PAD_TIE_OPT_DEFAULT);
@@ -1683,7 +1682,6 @@ esp_err_t test_touch_sleep_reading_stable(touch_pad_t sleep_pad)
return ret_val; return ret_val;
} }
TEST_CASE("Touch Sensor sleep pad reading stable test", "[touch]") TEST_CASE("Touch Sensor sleep pad reading stable test", "[touch]")
{ {
ESP_LOGI(TAG, "*********** touch sleep pad low power (wakeup) test ********************"); ESP_LOGI(TAG, "*********** touch sleep pad low power (wakeup) test ********************");

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@@ -130,7 +130,6 @@ esp_err_t touch_pad_set_fsm_mode(touch_fsm_mode_t mode);
*/ */
esp_err_t touch_pad_get_fsm_mode(touch_fsm_mode_t *mode); esp_err_t touch_pad_get_fsm_mode(touch_fsm_mode_t *mode);
/** /**
* @brief To clear the touch sensor channel active status. * @brief To clear the touch sensor channel active status.
* *

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@@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2016-2021 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2016-2024 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */

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@@ -51,7 +51,6 @@ components_not_formatted_temporary:
- "/components/cmock/" - "/components/cmock/"
- "/components/console/" - "/components/console/"
- "/components/cxx/" - "/components/cxx/"
- "/components/driver/"
- "/components/efuse/" - "/components/efuse/"
- "/components/esp_coex/" - "/components/esp_coex/"
- "/components/esp_eth/" - "/components/esp_eth/"