forked from espressif/esp-idf
change(driver): reformat driver component with astyle_py
This commit is contained in:
@@ -12,7 +12,6 @@ extern "C" {
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#include "esp_err.h"
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/**
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* @brief For I2S dma to claim the usage of ADC1.
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*
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2016-2021 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2016-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -50,7 +50,6 @@ extern portMUX_TYPE rtc_spinlock; //TODO: Will be placed in the appropriate posi
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esp_pm_lock_handle_t adc_digi_arbiter_lock = NULL;
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#endif //CONFIG_PM_ENABLE
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#if CONFIG_IDF_TARGET_ESP32
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/*---------------------------------------------------------------
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ESP32 Depricated ADC APIs and functions
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@@ -39,7 +39,6 @@
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#include "esp_efuse_rtc_calib.h"
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#endif
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static const char *ADC_TAG = "ADC";
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#define ADC_GET_IO_NUM(periph, channel) (adc_channel_io_map[periph][channel])
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@@ -78,7 +77,6 @@ static _lock_t adc1_dma_lock;
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#define SARADC1_RELEASE() _lock_release( &adc1_dma_lock )
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#endif
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/*
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In ADC2, there're two locks used for different cases:
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1. lock shared with app and Wi-Fi:
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@@ -650,7 +648,6 @@ esp_err_t adc_vref_to_gpio(adc_unit_t adc_unit, gpio_num_t gpio)
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#endif //SOC_ADC_RTC_CTRL_SUPPORTED
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#endif //#if (SOC_ADC_PERIPH_NUM >= 2)
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#if SOC_ADC_DIG_CTRL_SUPPORTED && !SOC_ADC_RTC_CTRL_SUPPORTED
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/*---------------------------------------------------------------
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Legacy ADC Single Read Mode
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@@ -667,7 +664,6 @@ static adc_atten_t s_atten1_single[ADC1_CHANNEL_MAX]; //Array saving attenuat
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static adc_atten_t s_atten2_single[ADC2_CHANNEL_MAX]; //Array saving attenuate of each channel of ADC2, used by single read API
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#endif
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static int8_t adc_digi_get_io_num(adc_unit_t adc_unit, uint8_t adc_channel)
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{
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assert(adc_unit < SOC_ADC_PERIPH_NUM);
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@@ -860,7 +856,6 @@ esp_err_t adc2_get_raw(adc2_channel_t channel, adc_bits_width_t width_bit, int *
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#endif //#if (SOC_ADC_PERIPH_NUM >= 2)
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#endif //#if SOC_ADC_DIG_CTRL_SUPPORTED && !SOC_ADC_RTC_CTRL_SUPPORTED
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static void adc_hal_onetime_start(adc_unit_t adc_n, uint32_t clk_src_freq_hz)
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{
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#if SOC_ADC_DIG_CTRL_SUPPORTED && !SOC_ADC_RTC_CTRL_SUPPORTED
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@@ -4,7 +4,6 @@
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <string.h>
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#include "esp_check.h"
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#include "freertos/FreeRTOS.h"
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@@ -278,7 +278,6 @@ esp_err_t adc2_get_raw(adc2_channel_t channel, adc_bits_width_t width_bit, int *
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esp_err_t adc_vref_to_gpio(adc_unit_t adc_unit, gpio_num_t gpio);
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#endif //#if (SOC_ADC_PERIPH_NUM >= 2)
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/*---------------------------------------------------------------
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ADC DMA Read Setting
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---------------------------------------------------------------*/
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@@ -378,7 +378,6 @@ esp_err_t i2s_adc_disable(i2s_port_t i2s_num);
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esp_err_t i2s_set_dac_mode(i2s_dac_mode_t dac_mode);
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#endif //SOC_I2S_SUPPORTS_DAC
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#ifdef __cplusplus
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}
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#endif
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@@ -207,7 +207,6 @@ typedef struct {
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} i2s_pdm_tx_upsample_cfg_t;
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#endif
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/**
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* @brief I2S driver configuration parameters
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*
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@@ -15,7 +15,6 @@
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extern "C" {
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#endif
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#define RMT_CHANNEL_FLAGS_AWARE_DFS (1 << 0) /*!< Channel can work during APB clock scaling */
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#define RMT_CHANNEL_FLAGS_INVERT_SIG (1 << 1) /*!< Invert RMT signal */
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@@ -39,7 +38,6 @@ typedef struct {
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};
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} rmt_item32_t;
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#if SOC_RMT_SUPPORTED
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/**
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* @brief RMT hardware memory layout
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@@ -23,7 +23,6 @@ typedef enum {
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TSENS_DAC_DEFAULT = TSENS_DAC_L2,
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} temp_sensor_dac_offset_t;
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/**
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* @brief Configuration for temperature sensor reading
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*/
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@@ -359,7 +359,6 @@ void timer_group_set_alarm_value_in_isr(timer_group_t group_num, timer_idx_t tim
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*/
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void timer_group_set_counter_enable_in_isr(timer_group_t group_num, timer_idx_t timer_num, timer_start_t counter_en);
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/** @brief Get interrupt status, just used in ISR
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*
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* @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
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@@ -4,7 +4,6 @@
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "freertos/FreeRTOS.h"
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#include "hal/dac_ll.h"
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#include "esp_err.h"
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@@ -4,7 +4,6 @@
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <string.h>
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#include "sdkconfig.h"
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#include "freertos/FreeRTOS.h"
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@@ -844,7 +844,6 @@ static esp_err_t i2s_calculate_common_clock(int i2s_num, i2s_hal_clock_info_t *c
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return ESP_OK;
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}
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static esp_err_t i2s_calculate_clock(i2s_port_t i2s_num, i2s_hal_clock_info_t *clk_info)
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{
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/* Calculate clock for ADC/DAC mode */
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@@ -996,7 +995,6 @@ static esp_err_t i2s_check_cfg_validity(i2s_port_t i2s_num, const i2s_config_t *
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ESP_RETURN_ON_FALSE((cfg->dma_desc_num >= 2 && cfg->dma_desc_num <= 128), ESP_ERR_INVALID_ARG, TAG, "I2S buffer count less than 128 and more than 2");
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ESP_RETURN_ON_FALSE((cfg->dma_frame_num >= 8 && cfg->dma_frame_num <= 1024), ESP_ERR_INVALID_ARG, TAG, "I2S buffer length at most 1024 and more than 8");
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#if SOC_I2S_SUPPORTS_PDM_TX || SOC_I2S_SUPPORTS_PDM_RX
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/* Check PDM mode */
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if (cfg->mode & I2S_MODE_PDM) {
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@@ -1637,7 +1635,6 @@ esp_err_t i2s_driver_uninstall(i2s_port_t i2s_num)
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return ESP_OK;
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}
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esp_err_t i2s_driver_install(i2s_port_t i2s_num, const i2s_config_t *i2s_config, int queue_size, void *i2s_queue)
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{
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#if CONFIG_I2S_ENABLE_DEBUG_LOG
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@@ -37,7 +37,6 @@
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#define PCNT_RCC_ATOMIC()
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#endif
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static const char *TAG = "pcnt(legacy)";
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#define PCNT_CHECK(a, str, ret_val) ESP_RETURN_ON_FALSE(a, ret_val, TAG, "%s", str)
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@@ -32,7 +32,6 @@
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#include "esp_private/sleep_retention.h"
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#endif
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#if SOC_I2C_SUPPORT_APB || SOC_I2C_SUPPORT_XTAL
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#include "esp_private/esp_clk.h"
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#endif
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@@ -217,8 +216,7 @@ typedef struct {
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#endif
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} i2c_context_t;
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typedef struct
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{
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typedef struct {
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uint8_t character; /*!< I2C source clock characteristic */
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} i2c_clk_alloc_t;
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@@ -1037,7 +1035,6 @@ end:
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return err;
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}
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esp_err_t i2c_master_read_from_device(i2c_port_t i2c_num, uint8_t device_address,
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uint8_t* read_buffer, size_t read_size,
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TickType_t ticks_to_wait)
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@@ -1071,7 +1068,6 @@ end:
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return err;
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}
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esp_err_t i2c_master_write_read_device(i2c_port_t i2c_num, uint8_t device_address,
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const uint8_t* write_buffer, size_t write_size,
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uint8_t* read_buffer, size_t read_size,
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@@ -1379,7 +1375,8 @@ esp_err_t i2c_master_read(i2c_cmd_handle_t cmd_handle, uint8_t *data, size_t dat
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}
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__attribute__((always_inline))
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static inline bool i2c_cmd_is_single_byte(const i2c_cmd_t *cmd) {
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static inline bool i2c_cmd_is_single_byte(const i2c_cmd_t *cmd)
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{
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return cmd->total_bytes == 1;
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}
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@@ -1496,8 +1493,7 @@ static bool is_cmd_link_buffer_internal(const i2c_cmd_link_t *link)
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bool is_internal = true;
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for (const i2c_cmd_link_t *cmd_link = link;
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cmd_link != NULL && is_internal;
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cmd_link = cmd_link->next)
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{
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cmd_link = cmd_link->next) {
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/* A command node has a valid pointer if it is a read command or a write command with more than one byte. */
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const bool data_pointer = (cmd_link->cmd.hw_cmd.op_code == I2C_LL_CMD_WRITE && !i2c_cmd_is_single_byte(&cmd_link->cmd))
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|| cmd_link->cmd.hw_cmd.op_code == I2C_LL_CMD_READ;
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@@ -82,7 +82,6 @@ typedef struct{
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uint32_t clk_flags; /*!< Bitwise of ``I2C_SCLK_SRC_FLAG_**FOR_DFS**`` for clk source choice*/
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} i2c_config_t;
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typedef void *i2c_cmd_handle_t; /*!< I2C command handle */
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/**
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@@ -243,7 +242,6 @@ esp_err_t i2c_master_write_read_device(i2c_port_t i2c_num, uint8_t device_addres
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uint8_t* read_buffer, size_t read_size,
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TickType_t ticks_to_wait);
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/**
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* @brief Create and initialize an I2C commands list with a given buffer.
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* All the allocations for data or signals (START, STOP, ACK, ...) will be
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@@ -25,7 +25,6 @@
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#define TIME_REMAIN(start, end, timeout) TIME_REMAIN_CORE(start, end, timeout, UINT32_MAX)
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#define ESSL_MIN(a, b) ((a) < (b) ? (a) : (b))
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__attribute__((unused)) static const char TAG[] = "esp_serial_slave_link";
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@@ -43,7 +42,6 @@ __attribute__((unused)) static const char TAG[] = "esp_serial_slave_link";
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#define CHECK_EXECUTE_CMD(DEV, CMD, ...) _CHECK_EXECUTE_CMD(DEV, CMD, #CMD" not supported for the current device.",##__VA_ARGS__)
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esp_err_t essl_init(essl_handle_t handle, uint32_t wait_ms)
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{
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CHECK_EXECUTE_CMD(handle, init, wait_ms);
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -28,7 +28,6 @@ static const char TAG[] = "essl_sdio";
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#define HOST_SLC0HOST_INT_CLR_REG (DR_REG_SLCHOST_BASE + 0xD4)
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#define HOST_SLC0HOST_FUNC1_INT_ENA_REG (DR_REG_SLCHOST_BASE + 0xDC)
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#define HOST_SLCHOST_CONF_W_REG(pos) (HOST_SLCHOST_CONF_W0_REG+pos+(pos>23?4:0)+(pos>31?12:0))
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#define ESSL_CMD53_END_ADDR 0x1f800
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@@ -79,7 +78,6 @@ typedef struct {
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///< Block size of the SDIO function 1. After the initialization this will hold the value the slave really do. Valid value is 1-2048.
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} essl_sdio_context_t;
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esp_err_t essl_sdio_update_tx_buffer_num(void *arg, uint32_t wait_ms);
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esp_err_t essl_sdio_update_rx_data_size(void *arg, uint32_t wait_ms);
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@@ -412,7 +410,6 @@ esp_err_t essl_sdio_update_rx_data_size(void *arg, uint32_t wait_ms)
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return ESP_OK;
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}
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esp_err_t essl_sdio_write_reg(void *arg, uint8_t addr, uint8_t value, uint8_t *value_o, uint32_t wait_ms)
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{
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ESP_LOGV(TAG, "write_reg: 0x%02"PRIX8, value);
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@@ -6,7 +6,6 @@
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// Definitions of Espressif SDIO Slave hardware
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#include "essl_sdio.h"
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essl_sdio_def_t ESSL_SDIO_DEF_ESP32 = {
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@@ -6,7 +6,6 @@
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#pragma once
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#include "esp_err.h"
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#ifdef __cplusplus
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@@ -67,7 +66,6 @@ esp_err_t essl_get_tx_buffer_num(essl_handle_t handle, uint32_t *out_tx_num, uin
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*/
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esp_err_t essl_get_rx_data_size(essl_handle_t handle, uint32_t *out_rx_size, uint32_t wait_ms);
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/** Reset the counters of this component. Usually you don't need to do this unless you know the slave is reset.
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*
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* @param handle Handle of an ESSL device.
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@@ -25,7 +25,6 @@ extern essl_sdio_def_t ESSL_SDIO_DEF_ESP32;
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/// Definitions of ESP32C6 SDIO Slave hardware
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extern essl_sdio_def_t ESSL_SDIO_DEF_ESP32C6;
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#ifdef __cplusplus
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}
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#endif
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@@ -4,7 +4,6 @@
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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// NOTE: From the view of master
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@@ -23,7 +23,6 @@
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*/
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void test_fill_random_to_buffers_dualboard(uint32_t seed, uint8_t *dut0_buffer, uint8_t *dut1_buffer, size_t buffer_size);
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/**
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* Fill tx buffer with random numbers
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*
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@@ -33,7 +32,6 @@ void test_fill_random_to_buffers_dualboard(uint32_t seed, uint8_t *dut0_buffer,
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*/
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void test_fill_random_to_buffer(uint32_t seed, uint8_t *buffer, size_t buffer_size);
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/**
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* Calloc a pool, filled with random numbers
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*
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -29,7 +29,6 @@
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#define TEST_SPI_PERIPH_NUM (SOC_SPI_PERIPH_NUM - 1)
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#if CONFIG_IDF_TARGET_ESP32C6 // cs_pin conflict with uart pin
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#define PIN_NUM_MISO SPI2_IOMUX_PIN_NUM_MISO
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#define PIN_NUM_MOSI SPI2_IOMUX_PIN_NUM_MOSI
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@@ -46,7 +45,6 @@
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#define PIN_NUM_HD SPI2_IOMUX_PIN_NUM_HD
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#endif
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#if (TEST_SPI_PERIPH_NUM >= 2) // esp32, s2, s3
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#define TEST_SPI_HOST SPI2_HOST
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#define TEST_SLAVE_HOST SPI3_HOST
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@@ -62,7 +60,6 @@
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#define TEST_SLAVE_HOST SPI2_HOST
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#endif
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#if CONFIG_IDF_TARGET_ESP32 // spi3 have iomux pin only on esp32
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#define SLAVE_IOMUX_PIN_MISO SPI3_IOMUX_PIN_NUM_MISO
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#define SLAVE_IOMUX_PIN_MOSI SPI3_IOMUX_PIN_NUM_MOSI
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@@ -97,13 +94,11 @@
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#define WIRE_DELAY 12.5
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#endif //CONFIG_IDF_TARGET_ESP32
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#define GET_DMA_CHAN(HOST) (HOST)
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#define TEST_DMA_CHAN_MASTER GET_DMA_CHAN(TEST_SPI_HOST)
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#define TEST_DMA_CHAN_SLAVE GET_DMA_CHAN(TEST_SLAVE_HOST)
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#define FUNC_SPI 1
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#define FUNC_GPIO PIN_FUNC_GPIO
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -17,7 +17,9 @@ void test_serializer(const param_group_t *param_group, const ptest_func_t* test_
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void *pset = param_group->param_group;
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for (int i = param_group->pset_num; i > 0; i--) {
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if (test_func->def_param) test_func->def_param(pset);
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if (test_func->def_param) {
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test_func->def_param(pset);
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}
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test_func->loop(pset, context);
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pset += param_group->pset_size;
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}
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||||
|
@@ -29,7 +29,6 @@ void test_fill_random_to_buffer(uint32_t seed, uint8_t *buffer, size_t buffer_si
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
Create a pool with random numbers, get buffer from pool
|
||||
---------------------------------------------------------------*/
|
||||
|
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
|
||||
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
@@ -10,7 +10,6 @@
|
||||
#include "hal/gpio_hal.h"
|
||||
#include "esp_rom_gpio.h"
|
||||
|
||||
|
||||
int test_freq_default[] = TEST_FREQ_DEFAULT();
|
||||
|
||||
const char MASTER_TAG[] = "test_master";
|
||||
@@ -37,7 +36,9 @@ void spitest_def_param(void* arg)
|
||||
{
|
||||
spitest_param_set_t *param_set = (spitest_param_set_t*)arg;
|
||||
param_set->test_size = 8;
|
||||
if (param_set->freq_list==NULL) param_set->freq_list = test_freq_default;
|
||||
if (param_set->freq_list == NULL) {
|
||||
param_set->freq_list = test_freq_default;
|
||||
}
|
||||
}
|
||||
|
||||
/**********************************************************************************
|
||||
@@ -122,7 +123,9 @@ void spitest_init_transactions(const spitest_param_set_t *cfg, spitest_context_t
|
||||
for (int i = 0; i < cfg->test_size; i++) {
|
||||
const void* tx_buffer = spitest_master_send + i % 8;
|
||||
int length = 8 * test_len[i];
|
||||
if (cfg->length_aligned) length = (length+31)&(~31);
|
||||
if (cfg->length_aligned) {
|
||||
length = (length + 31) & (~31);
|
||||
}
|
||||
|
||||
if (dup == HALF_DUPLEX_MISO) {
|
||||
trans[i] = (spi_transaction_t) {
|
||||
@@ -149,14 +152,20 @@ void spitest_init_transactions(const spitest_param_set_t *cfg, spitest_context_t
|
||||
.start = slave_tx,
|
||||
.len = 512,
|
||||
};
|
||||
if (cfg->slave_dma_chan != 0) context->slave_trans[i].len = 1024;
|
||||
if (cfg->slave_dma_chan != 0) {
|
||||
context->slave_trans[i].len = 1024;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void spitest_master_print_data(spi_transaction_t *t, int rxlength)
|
||||
{
|
||||
if (t->tx_buffer) ESP_LOG_BUFFER_HEX( "master tx", t->tx_buffer, t->length/8 );
|
||||
if (t->rx_buffer) ESP_LOG_BUFFER_HEX( "master rx", t->rx_buffer, rxlength/8 );
|
||||
if (t->tx_buffer) {
|
||||
ESP_LOG_BUFFER_HEX("master tx", t->tx_buffer, t->length / 8);
|
||||
}
|
||||
if (t->rx_buffer) {
|
||||
ESP_LOG_BUFFER_HEX("master rx", t->rx_buffer, rxlength / 8);
|
||||
}
|
||||
}
|
||||
|
||||
void spitest_slave_print_data(slave_rxdata_t *t, bool print_rxdata)
|
||||
@@ -164,7 +173,9 @@ void spitest_slave_print_data(slave_rxdata_t *t, bool print_rxdata)
|
||||
int rcv_len = (t->len + 7) / 8;
|
||||
ESP_LOGI(SLAVE_TAG, "trans_len: %" PRIu32, t->len);
|
||||
ESP_LOG_BUFFER_HEX("slave tx", t->tx_start, rcv_len);
|
||||
if (print_rxdata) ESP_LOG_BUFFER_HEX("slave rx", t->data, rcv_len);
|
||||
if (print_rxdata) {
|
||||
ESP_LOG_BUFFER_HEX("slave rx", t->data, rcv_len);
|
||||
}
|
||||
}
|
||||
|
||||
esp_err_t spitest_check_data(int len, spi_transaction_t *master_t, slave_rxdata_t *slave_t, bool check_master_data, bool check_slave_len, bool check_slave_data)
|
||||
@@ -201,7 +212,6 @@ esp_err_t spitest_check_data(int len, spi_transaction_t *master_t, slave_rxdata_
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
|
||||
void master_free_device_bus(spi_device_handle_t spi)
|
||||
{
|
||||
TEST_ESP_OK(spi_bus_remove_device(spi));
|
||||
|
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
|
||||
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
@@ -85,7 +85,6 @@
|
||||
|
||||
const __attribute__((unused)) static char *TAG = "TEST_ADC_LEGACY";
|
||||
|
||||
|
||||
void test_adc_set_io_level(adc_unit_t unit, adc_channel_t channel, bool level)
|
||||
{
|
||||
TEST_ASSERT(channel < SOC_ADC_CHANNEL_NUM(unit) && "invalid channel");
|
||||
|
@@ -55,7 +55,6 @@ static DRAM_ATTR i2c_dev_t *const I2C[SOC_I2C_NUM] = { &I2C0,
|
||||
#define ACK_VAL 0
|
||||
#define NACK_VAL 1
|
||||
|
||||
|
||||
static esp_err_t i2c_master_write_slave(i2c_port_t i2c_num, uint8_t *data_wr, size_t size)
|
||||
{
|
||||
i2c_cmd_handle_t cmd = i2c_cmd_link_create();
|
||||
@@ -82,7 +81,6 @@ static i2c_config_t i2c_master_init(void)
|
||||
return conf_master;
|
||||
}
|
||||
|
||||
|
||||
#if SOC_I2C_SUPPORT_SLAVE // i2c test can't work without slave
|
||||
|
||||
static i2c_config_t i2c_slave_init(void)
|
||||
@@ -169,7 +167,6 @@ TEST_CASE("I2C set and get period test", "[i2c]")
|
||||
TEST_ESP_OK(i2c_driver_delete(I2C_MASTER_NUM));
|
||||
}
|
||||
|
||||
|
||||
#if SOC_I2C_SUPPORT_SLAVE // i2c test can't work without slave
|
||||
|
||||
TEST_CASE("I2C config FIFO test", "[i2c]")
|
||||
@@ -364,10 +361,8 @@ static void slave_write_buffer_test(void)
|
||||
i2c_driver_delete(I2C_SLAVE_NUM);
|
||||
}
|
||||
|
||||
|
||||
TEST_CASE_MULTIPLE_DEVICES("I2C master read slave test", "[i2c][test_env=generic_multi_device][timeout=150]", master_read_slave_test, slave_write_buffer_test);
|
||||
|
||||
|
||||
static void i2c_master_write_read_test(void)
|
||||
{
|
||||
uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
|
||||
@@ -446,7 +441,6 @@ static void i2c_slave_read_write_test(void)
|
||||
|
||||
TEST_CASE_MULTIPLE_DEVICES("I2C read and write test", "[i2c][test_env=generic_multi_device][timeout=150]", i2c_master_write_read_test, i2c_slave_read_write_test);
|
||||
|
||||
|
||||
static void i2c_master_repeat_write(void)
|
||||
{
|
||||
uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
|
||||
|
@@ -40,7 +40,6 @@
|
||||
#define WRITE_BIT I2C_MASTER_WRITE /*!< I2C master write */
|
||||
#define ACK_CHECK_EN 0x1 /*!< I2C master will check ack from slave*/
|
||||
|
||||
|
||||
static esp_err_t i2c_master_write_slave(i2c_port_t i2c_num, uint8_t *data_wr, size_t size)
|
||||
{
|
||||
i2c_cmd_handle_t cmd = i2c_cmd_link_create();
|
||||
|
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
|
||||
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
|
||||
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
@@ -140,7 +140,6 @@ static void printf_touch_smooth_read(const char *str)
|
||||
printf("\r\n");
|
||||
}
|
||||
|
||||
|
||||
static void test_timeout_trigger_fake(touch_pad_t pad_num)
|
||||
{
|
||||
touch_pad_set_cnt_mode(pad_num, TOUCH_PAD_SLOPE_0, TOUCH_PAD_TIE_OPT_DEFAULT);
|
||||
@@ -1683,7 +1682,6 @@ esp_err_t test_touch_sleep_reading_stable(touch_pad_t sleep_pad)
|
||||
return ret_val;
|
||||
}
|
||||
|
||||
|
||||
TEST_CASE("Touch Sensor sleep pad reading stable test", "[touch]")
|
||||
{
|
||||
ESP_LOGI(TAG, "*********** touch sleep pad low power (wakeup) test ********************");
|
||||
|
@@ -130,7 +130,6 @@ esp_err_t touch_pad_set_fsm_mode(touch_fsm_mode_t mode);
|
||||
*/
|
||||
esp_err_t touch_pad_get_fsm_mode(touch_fsm_mode_t *mode);
|
||||
|
||||
|
||||
/**
|
||||
* @brief To clear the touch sensor channel active status.
|
||||
*
|
||||
|
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2016-2021 Espressif Systems (Shanghai) CO LTD
|
||||
* SPDX-FileCopyrightText: 2016-2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
@@ -51,7 +51,6 @@ components_not_formatted_temporary:
|
||||
- "/components/cmock/"
|
||||
- "/components/console/"
|
||||
- "/components/cxx/"
|
||||
- "/components/driver/"
|
||||
- "/components/efuse/"
|
||||
- "/components/esp_coex/"
|
||||
- "/components/esp_eth/"
|
||||
|
Reference in New Issue
Block a user