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esp_system: revert reset of systimer clk at startup

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Renz Bagaporo
2021-03-08 23:00:07 +08:00
parent aff0235e47
commit cb5a8342d4
1 changed files with 0 additions and 1 deletions
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components/esp_system/port/soc/esp32s2/clk.c
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@@ -316,7 +316,6 @@ __attribute__((weak)) void esp_perip_clk_init(void)
DPORT_CLEAR_PERI_REG_MASK(DPORT_BT_LPCK_DIV_FRAC_REG, DPORT_LPCLK_SEL_8M); DPORT_CLEAR_PERI_REG_MASK(DPORT_BT_LPCK_DIV_FRAC_REG, DPORT_LPCLK_SEL_8M);
DPORT_SET_PERI_REG_MASK(DPORT_BT_LPCK_DIV_FRAC_REG, DPORT_LPCLK_SEL_RTC_SLOW); DPORT_SET_PERI_REG_MASK(DPORT_BT_LPCK_DIV_FRAC_REG, DPORT_LPCLK_SEL_RTC_SLOW);
periph_ll_reset(PERIPH_SYSTIMER_MODULE);
/* Enable RNG clock. */ /* Enable RNG clock. */
periph_module_enable(PERIPH_RNG_MODULE); periph_module_enable(PERIPH_RNG_MODULE);