From cb90ed263d4df90d5cb168a9df25ea93d34909ca Mon Sep 17 00:00:00 2001 From: Armando Date: Fri, 13 Oct 2023 15:43:54 +0800 Subject: [PATCH] fix(spi): fixed spi master polling mode not mem sync issue on esp32p4 --- components/driver/spi/gpspi/spi_master.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/components/driver/spi/gpspi/spi_master.c b/components/driver/spi/gpspi/spi_master.c index 0a47c4bddc..592af9d236 100644 --- a/components/driver/spi/gpspi/spi_master.c +++ b/components/driver/spi/gpspi/spi_master.c @@ -1144,6 +1144,19 @@ esp_err_t SPI_MASTER_ISR_ATTR spi_device_polling_end(spi_device_handle_t handle, } } +#if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE //invalidate here to let user access rx data in post_cb if possible + const spi_bus_attr_t* bus_attr = host->bus_attr; + if (host->cur_trans_buf.buffer_to_rcv) { + uint16_t alignment = bus_attr->internal_mem_align_size; + uint32_t buffer_byte_len = (host->cur_trans_buf.trans->rxlength + 7) / 8; + buffer_byte_len = (buffer_byte_len + alignment - 1) & (~(alignment - 1)); + esp_err_t ret = esp_cache_msync((void *)host->cur_trans_buf.buffer_to_rcv, buffer_byte_len, ESP_CACHE_MSYNC_FLAG_DIR_M2C); + if (ret != ESP_OK) { + return ret; + } + } +#endif + ESP_LOGV(SPI_TAG, "polling trans done"); //deal with the in-flight transaction spi_post_trans(host);