From 7d0d95b7d850ab51c7376509a8f19e6fddfca56c Mon Sep 17 00:00:00 2001 From: wuzhenghui Date: Thu, 12 Dec 2024 11:02:52 +0800 Subject: [PATCH] fix(esp_hw_support): fix mspi clock freq changed after lightsleep --- components/esp_hw_support/sleep_modes.c | 12 ++++++-- components/esp_pm/pm_impl.c | 28 ++++++++++--------- .../include/hal/mspi_timing_tuning_ll.h | 2 ++ 3 files changed, 26 insertions(+), 16 deletions(-) diff --git a/components/esp_hw_support/sleep_modes.c b/components/esp_hw_support/sleep_modes.c index c91df5b2ad..9b3c64f067 100644 --- a/components/esp_hw_support/sleep_modes.c +++ b/components/esp_hw_support/sleep_modes.c @@ -58,12 +58,14 @@ #include "hal/cache_hal.h" #include "hal/cache_ll.h" +#include "hal/clk_tree_ll.h" #include "hal/wdt_hal.h" #include "hal/uart_hal.h" #if SOC_TOUCH_SENSOR_SUPPORTED #include "hal/touch_sensor_hal.h" #include "hal/touch_sens_hal.h" #endif +#include "hal/mspi_timing_tuning_ll.h" #include "sdkconfig.h" #include "esp_rom_uart.h" @@ -75,7 +77,9 @@ #include "esp_private/esp_clk.h" #include "esp_private/esp_task_wdt.h" #include "esp_private/sar_periph_ctrl.h" +#if MSPI_TIMING_LL_FLASH_CPU_CLK_SRC_BINDED #include "esp_private/mspi_timing_tuning.h" +#endif #ifdef CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/cache.h" @@ -159,7 +163,7 @@ #define DEFAULT_SLEEP_OUT_OVERHEAD_US (318) #define DEFAULT_HARDWARE_OUT_OVERHEAD_US (56) #elif CONFIG_IDF_TARGET_ESP32C61 -#define DEFAULT_SLEEP_OUT_OVERHEAD_US (1148) //TODO: PM-231 +#define DEFAULT_SLEEP_OUT_OVERHEAD_US (318) #define DEFAULT_HARDWARE_OUT_OVERHEAD_US (107) #elif CONFIG_IDF_TARGET_ESP32H2 #define DEFAULT_SLEEP_OUT_OVERHEAD_US (118) @@ -795,8 +799,10 @@ static esp_err_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags, esp_sleep_mode_t m } #endif +#if MSPI_TIMING_LL_FLASH_CPU_CLK_SRC_BINDED // Will switch to XTAL turn down MSPI speed mspi_timing_change_speed_mode_cache_safe(true); +#endif #if SOC_PM_RETENTION_SW_TRIGGER_REGDMA if (!deep_sleep && (pd_flags & PMU_SLEEP_PD_TOP)) { @@ -1132,8 +1138,8 @@ static esp_err_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags, esp_sleep_mode_t m misc_modules_wake_prepare(pd_flags); } -#if SOC_SPI_MEM_SUPPORT_TIMING_TUNING - if (cpu_freq_config.source == SOC_CPU_CLK_SRC_PLL) { +#if MSPI_TIMING_LL_FLASH_CPU_CLK_SRC_BINDED + if (cpu_freq_config.source_freq_mhz > clk_ll_xtal_load_freq_mhz()) { // Turn up MSPI speed if switch to PLL mspi_timing_change_speed_mode_cache_safe(false); } diff --git a/components/esp_pm/pm_impl.c b/components/esp_pm/pm_impl.c index 11b562786d..790a9c832d 100644 --- a/components/esp_pm/pm_impl.c +++ b/components/esp_pm/pm_impl.c @@ -24,8 +24,11 @@ #include "esp_private/periph_ctrl.h" #include "soc/rtc.h" +#include "hal/clk_tree_ll.h" #include "hal/uart_ll.h" #include "hal/uart_types.h" +#include "hal/mspi_timing_tuning_ll.h" + #include "driver/gpio.h" #include "freertos/FreeRTOS.h" @@ -35,10 +38,6 @@ #include "xtensa/core-macros.h" #endif -#if SOC_SPI_MEM_SUPPORT_TIMING_TUNING -#include "esp_private/mspi_timing_tuning.h" -#endif - #include "esp_private/pm_impl.h" #include "esp_private/pm_trace.h" #include "esp_private/esp_timer_private.h" @@ -48,6 +47,9 @@ #include "esp_private/sleep_gpio.h" #include "esp_private/sleep_modem.h" #include "esp_private/uart_share_hw_ctrl.h" +#if MSPI_TIMING_LL_FLASH_CPU_CLK_SRC_BINDED +#include "esp_private/mspi_timing_tuning.h" +#endif #include "esp_sleep.h" #include "esp_memory_utils.h" @@ -665,16 +667,16 @@ static void IRAM_ATTR do_switch(pm_mode_t new_mode) if (switch_down) { on_freq_update(old_ticks_per_us, new_ticks_per_us); } -#if SOC_SPI_MEM_SUPPORT_TIMING_TUNING - if (new_config.source == SOC_CPU_CLK_SRC_PLL) { - rtc_clk_cpu_freq_set_config_fast(&new_config); - mspi_timing_change_speed_mode_cache_safe(false); - } else { - mspi_timing_change_speed_mode_cache_safe(true); - rtc_clk_cpu_freq_set_config_fast(&new_config); - } +#if MSPI_TIMING_LL_FLASH_CPU_CLK_SRC_BINDED + if (new_config.source_freq_mhz > clk_ll_xtal_load_freq_mhz()) { + rtc_clk_cpu_freq_set_config_fast(&new_config); + mspi_timing_change_speed_mode_cache_safe(false); + } else { + mspi_timing_change_speed_mode_cache_safe(true); + rtc_clk_cpu_freq_set_config_fast(&new_config); + } #else - rtc_clk_cpu_freq_set_config_fast(&new_config); + rtc_clk_cpu_freq_set_config_fast(&new_config); #endif if (!switch_down) { on_freq_update(old_ticks_per_us, new_ticks_per_us); diff --git a/components/hal/esp32s3/include/hal/mspi_timing_tuning_ll.h b/components/hal/esp32s3/include/hal/mspi_timing_tuning_ll.h index a47e4ffae4..6b3f18bcf6 100644 --- a/components/hal/esp32s3/include/hal/mspi_timing_tuning_ll.h +++ b/components/hal/esp32s3/include/hal/mspi_timing_tuning_ll.h @@ -37,6 +37,8 @@ extern "C" { #define MSPI_TIMING_LL_CORE_CLOCK_MHZ_DEFAULT 80 +#define MSPI_TIMING_LL_FLASH_CPU_CLK_SRC_BINDED 1 + typedef enum { MSPI_TIMING_LL_FLASH_OPI_MODE = BIT(0), MSPI_TIMING_LL_FLASH_QIO_MODE = BIT(1),