From cfa487b4e0ef896791fcdf272cfecff33e299cc0 Mon Sep 17 00:00:00 2001 From: gaoxu Date: Mon, 28 Oct 2024 09:46:51 +0800 Subject: [PATCH] ci(adc): enable P4 ADC test and correct ADC performance thresh --- .../legacy_adc_driver/main/test_legacy_adc.c | 5 +++-- .../esp_adc/test_apps/.build-test-rules.yml | 3 --- .../esp_adc/test_apps/adc/main/test_adc.c | 20 +++++++++---------- .../test_apps/adc/main/test_adc_performance.c | 1 + .../test_apps/adc/main/test_common_adc.c | 2 +- .../test_apps/adc/main/test_common_adc.h | 2 +- .../esp_adc/test_apps/adc/pytest_adc.py | 2 ++ components/hal/include/hal/adc_types.h | 1 + .../main/test_lp_core_adc.c | 4 ++-- 9 files changed, 21 insertions(+), 19 deletions(-) diff --git a/components/driver/test_apps/legacy_adc_driver/main/test_legacy_adc.c b/components/driver/test_apps/legacy_adc_driver/main/test_legacy_adc.c index 9d261c6ff1..15f88e99b0 100644 --- a/components/driver/test_apps/legacy_adc_driver/main/test_legacy_adc.c +++ b/components/driver/test_apps/legacy_adc_driver/main/test_legacy_adc.c @@ -11,6 +11,7 @@ #include "driver/gpio.h" #include "driver/rtc_io.h" #include "soc/adc_periph.h" +#include "hal/adc_ll.h" #define ADC_GET_IO_NUM(unit, channel) (adc_channel_io_map[unit][channel]) @@ -68,7 +69,7 @@ #define ADC_TEST_HIGH_THRESH 200 #elif CONFIG_IDF_TARGET_ESP32P4 -#define ADC_TEST_LOW_VAL 3100 +#define ADC_TEST_LOW_VAL 2152 #define ADC_TEST_LOW_THRESH 200 #define ADC_TEST_HIGH_VAL 4095 @@ -110,7 +111,7 @@ void test_adc_set_io_level(adc_unit_t unit, adc_channel_t channel, bool level) { TEST_ASSERT(channel < SOC_ADC_CHANNEL_NUM(unit) && "invalid channel"); -#if SOC_ADC_DIG_CTRL_SUPPORTED && !SOC_ADC_RTC_CTRL_SUPPORTED +#if !ADC_LL_RTC_GPIO_SUPPORTED uint32_t io_num = ADC_GET_IO_NUM(unit, channel); TEST_ESP_OK(gpio_set_pull_mode(io_num, (level ? GPIO_PULLUP_ONLY : GPIO_PULLDOWN_ONLY))); #else diff --git a/components/esp_adc/test_apps/.build-test-rules.yml b/components/esp_adc/test_apps/.build-test-rules.yml index 83598edd3a..9416fa8438 100644 --- a/components/esp_adc/test_apps/.build-test-rules.yml +++ b/components/esp_adc/test_apps/.build-test-rules.yml @@ -5,9 +5,6 @@ components/esp_adc/test_apps/adc: - if: SOC_ADC_SUPPORTED != 1 - if: CONFIG_NAME == "gdma_iram_safe" and IDF_TARGET in ["esp32", "esp32s2", "esp32c2"] disable_test: - - if: IDF_TARGET == "esp32p4" - temporary: true - reason: not runners for ESP32P4 ADC # TODO: IDF-9573 - if: IDF_TARGET == "esp32c61" temporary: true reason: not runners for ESP32C61 ADC diff --git a/components/esp_adc/test_apps/adc/main/test_adc.c b/components/esp_adc/test_apps/adc/main/test_adc.c index 32e20659c2..ff0a38b0b4 100644 --- a/components/esp_adc/test_apps/adc/main/test_adc.c +++ b/components/esp_adc/test_apps/adc/main/test_adc.c @@ -80,35 +80,35 @@ TEST_CASE("ADC oneshot high/low test", "[adc_oneshot]") test_adc_set_io_level(ADC_UNIT_1, ADC1_TEST_CHAN0, 0); TEST_ESP_OK(adc_oneshot_read(adc1_handle, ADC1_TEST_CHAN0, &adc_raw[0][0])); - ESP_LOGI(TAG_CH[0][0], "raw data: %d", adc_raw[0][0]); + ESP_LOGI(TAG_CH[0][0], "low raw data: %d", adc_raw[0][0]); TEST_ASSERT_INT_WITHIN(ADC_TEST_LOW_THRESH, ADC_TEST_LOW_VAL, adc_raw[0][0]); - test_adc_set_io_level(ADC_UNIT_1, ADC1_TEST_CHAN1, 1); + test_adc_set_io_level(ADC_UNIT_1, ADC1_TEST_CHAN1, 0); TEST_ESP_OK(adc_oneshot_read(adc1_handle, ADC1_TEST_CHAN1, &adc_raw[0][1])); - ESP_LOGI(TAG_CH[0][1], "raw data: %d", adc_raw[0][1]); - TEST_ASSERT_INT_WITHIN(ADC_TEST_HIGH_THRESH, ADC_TEST_HIGH_VAL, adc_raw[0][1]); + ESP_LOGI(TAG_CH[0][1], "low raw data: %d", adc_raw[0][1]); + TEST_ASSERT_INT_WITHIN(ADC_TEST_LOW_THRESH, ADC_TEST_LOW_VAL, adc_raw[0][1]); #if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2 test_adc_set_io_level(ADC_UNIT_2, ADC2_TEST_CHAN0, 0); TEST_ESP_OK(adc_oneshot_read(adc2_handle, ADC2_TEST_CHAN0, &adc_raw[1][0])); - ESP_LOGI(TAG_CH[1][0], "raw data: %d", adc_raw[1][0]); + ESP_LOGI(TAG_CH[1][0], "low raw data: %d", adc_raw[1][0]); TEST_ASSERT_INT_WITHIN(ADC_TEST_LOW_THRESH, ADC_TEST_LOW_VAL, adc_raw[1][0]); #endif //#if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2 test_adc_set_io_level(ADC_UNIT_1, ADC1_TEST_CHAN0, 1); TEST_ESP_OK(adc_oneshot_read(adc1_handle, ADC1_TEST_CHAN0, &adc_raw[0][0])); - ESP_LOGI(TAG_CH[0][0], "raw data: %d", adc_raw[0][0]); + ESP_LOGI(TAG_CH[0][0], "high raw data: %d", adc_raw[0][0]); TEST_ASSERT_INT_WITHIN(ADC_TEST_HIGH_THRESH, ADC_TEST_HIGH_VAL, adc_raw[0][0]); - test_adc_set_io_level(ADC_UNIT_1, ADC1_TEST_CHAN1, 0); + test_adc_set_io_level(ADC_UNIT_1, ADC1_TEST_CHAN1, 1); TEST_ESP_OK(adc_oneshot_read(adc1_handle, ADC1_TEST_CHAN1, &adc_raw[0][1])); - ESP_LOGI(TAG_CH[0][1], "raw data: %d", adc_raw[0][1]); - TEST_ASSERT_INT_WITHIN(ADC_TEST_LOW_THRESH, ADC_TEST_LOW_VAL, adc_raw[0][1]); + ESP_LOGI(TAG_CH[0][1], "high raw data: %d", adc_raw[0][1]); + TEST_ASSERT_INT_WITHIN(ADC_TEST_HIGH_THRESH, ADC_TEST_HIGH_VAL, adc_raw[0][1]); #if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2 test_adc_set_io_level(ADC_UNIT_2, ADC2_TEST_CHAN0, 1); TEST_ESP_OK(adc_oneshot_read(adc2_handle, ADC2_TEST_CHAN0, &adc_raw[1][0])); - ESP_LOGI(TAG_CH[1][0], "raw data: %d", adc_raw[1][0]); + ESP_LOGI(TAG_CH[1][0], "high raw data: %d", adc_raw[1][0]); TEST_ASSERT_INT_WITHIN(ADC_TEST_HIGH_THRESH, ADC_TEST_HIGH_VAL, adc_raw[1][0]); #endif //#if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2 diff --git a/components/esp_adc/test_apps/adc/main/test_adc_performance.c b/components/esp_adc/test_apps/adc/main/test_adc_performance.c index 82ef8dde07..04d04f7e85 100644 --- a/components/esp_adc/test_apps/adc/main/test_adc_performance.c +++ b/components/esp_adc/test_apps/adc/main/test_adc_performance.c @@ -219,6 +219,7 @@ static float test_adc_continuous_std(adc_atten_t atten, bool filter_en, int filt s_reset_array((1 << SOC_ADC_DIGI_MAX_BITWIDTH)); TEST_ESP_OK(adc_continuous_start(handle)); + ulTaskNotifyTake(pdTRUE, portMAX_DELAY); int remain_count = ADC_TEST_CNT; while (remain_count) { ulTaskNotifyTake(pdTRUE, portMAX_DELAY); diff --git a/components/esp_adc/test_apps/adc/main/test_common_adc.c b/components/esp_adc/test_apps/adc/main/test_common_adc.c index 2636803588..417d1d5b9e 100644 --- a/components/esp_adc/test_apps/adc/main/test_common_adc.c +++ b/components/esp_adc/test_apps/adc/main/test_common_adc.c @@ -121,7 +121,7 @@ void test_adc_set_io_middle(adc_unit_t unit, adc_channel_t channel) uint32_t io_num = ADC_GET_IO_NUM(unit, channel); -#if SOC_ADC_DIG_CTRL_SUPPORTED && !SOC_ADC_RTC_CTRL_SUPPORTED +#if !ADC_LL_RTC_GPIO_SUPPORTED TEST_ESP_OK(gpio_set_pull_mode(io_num, GPIO_PULLUP_PULLDOWN)); #else TEST_ESP_OK(rtc_gpio_init(io_num)); diff --git a/components/esp_adc/test_apps/adc/main/test_common_adc.h b/components/esp_adc/test_apps/adc/main/test_common_adc.h index 43929533b0..ac6d07ca87 100644 --- a/components/esp_adc/test_apps/adc/main/test_common_adc.h +++ b/components/esp_adc/test_apps/adc/main/test_common_adc.h @@ -88,7 +88,7 @@ extern "C" { #define ADC_TEST_HIGH_THRESH 200 #elif CONFIG_IDF_TARGET_ESP32P4 -#define ADC_TEST_LOW_VAL 3100 +#define ADC_TEST_LOW_VAL 2152 #define ADC_TEST_LOW_THRESH 200 #define ADC_TEST_HIGH_VAL 4095 diff --git a/components/esp_adc/test_apps/adc/pytest_adc.py b/components/esp_adc/test_apps/adc/pytest_adc.py index 780e910d30..94133182ae 100644 --- a/components/esp_adc/test_apps/adc/pytest_adc.py +++ b/components/esp_adc/test_apps/adc/pytest_adc.py @@ -11,6 +11,7 @@ from pytest_embedded import Dut @pytest.mark.esp32c6 @pytest.mark.esp32h2 @pytest.mark.esp32c5 +@pytest.mark.esp32p4 @pytest.mark.adc @pytest.mark.parametrize('config', [ 'iram_safe', @@ -42,6 +43,7 @@ def test_adc_esp32c2_xtal_26mhz(dut: Dut) -> None: @pytest.mark.esp32c6 @pytest.mark.esp32h2 @pytest.mark.esp32c5 +@pytest.mark.esp32p4 @pytest.mark.adc @pytest.mark.parametrize('config', [ 'gdma_iram_safe', diff --git a/components/hal/include/hal/adc_types.h b/components/hal/include/hal/adc_types.h index a96fe36f85..e9934a663e 100644 --- a/components/hal/include/hal/adc_types.h +++ b/components/hal/include/hal/adc_types.h @@ -124,6 +124,7 @@ typedef enum { ADC_DIGI_IIR_FILTER_COEFF_4, ///< The filter coefficient is 4 ADC_DIGI_IIR_FILTER_COEFF_8, ///< The filter coefficient is 8 ADC_DIGI_IIR_FILTER_COEFF_16, ///< The filter coefficient is 16 + ADC_DIGI_IIR_FILTER_COEFF_32, ///< The filter coefficient is 32 ADC_DIGI_IIR_FILTER_COEFF_64, ///< The filter coefficient is 64 } adc_digi_iir_filter_coeff_t; diff --git a/components/ulp/test_apps/lp_core/lp_core_basic_tests/main/test_lp_core_adc.c b/components/ulp/test_apps/lp_core/lp_core_basic_tests/main/test_lp_core_adc.c index 537d93b44b..a44570a5ac 100644 --- a/components/ulp/test_apps/lp_core/lp_core_basic_tests/main/test_lp_core_adc.c +++ b/components/ulp/test_apps/lp_core/lp_core_basic_tests/main/test_lp_core_adc.c @@ -21,8 +21,8 @@ extern const uint8_t lp_core_main_adc_bin_end[] asm("_binary_lp_core_test_app_ #if CONFIG_IDF_TARGET_ESP32P4 // Threshold values picked up empirically after manual testing -#define ADC_TEST_LOW_VAL 1500 -#define ADC_TEST_HIGH_VAL 2000 +#define ADC_TEST_LOW_VAL 2160 +#define ADC_TEST_HIGH_VAL 4090 #else #error "ADC threshold values not defined" #endif