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ethernet: task yield at the end of isr handler

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This commit is contained in:
suda-morris
2019-07-11 11:01:51 +08:00
parent af78311975
commit cfbf8c5d07
2 changed files with 18 additions and 5 deletions
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1
components/esp_eth/linker.lf
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@@ -7,5 +7,6 @@ entries:
esp_eth_mac_esp32:emac_hal_rx_complete_cb (noflash_text) esp_eth_mac_esp32:emac_hal_rx_complete_cb (noflash_text)
esp_eth_mac_esp32:emac_hal_rx_early_cb (noflash_text) esp_eth_mac_esp32:emac_hal_rx_early_cb (noflash_text)
esp_eth_mac_esp32:emac_hal_rx_unavail_cb (noflash_text) esp_eth_mac_esp32:emac_hal_rx_unavail_cb (noflash_text)
esp_eth_mac_esp32:emac_esp32_isr_handler (noflash_text)
if ETH_SPI_ETHERNET_DM9051 = y: if ETH_SPI_ETHERNET_DM9051 = y:
esp_eth_mac_dm9051:dm9051_isr_handler (noflash_text) esp_eth_mac_dm9051:dm9051_isr_handler (noflash_text)

22
components/esp_eth/src/esp_eth_mac_esp32.c
View File

@@ -55,6 +55,7 @@ typedef struct {
uint8_t addr[6]; uint8_t addr[6];
uint8_t *rx_buf[CONFIG_ETH_DMA_RX_BUFFER_NUM]; uint8_t *rx_buf[CONFIG_ETH_DMA_RX_BUFFER_NUM];
uint8_t *tx_buf[CONFIG_ETH_DMA_TX_BUFFER_NUM]; uint8_t *tx_buf[CONFIG_ETH_DMA_TX_BUFFER_NUM];
bool isr_need_yield;
} emac_esp32_t; } emac_esp32_t;
static esp_err_t emac_esp32_set_mediator(esp_eth_mac_t *mac, esp_eth_mediator_t *eth) static esp_err_t emac_esp32_set_mediator(esp_eth_mac_t *mac, esp_eth_mediator_t *eth)
@@ -343,6 +344,17 @@ static esp_err_t emac_esp32_del(esp_eth_mac_t *mac)
return ESP_OK; return ESP_OK;
} }
void emac_esp32_isr_handler(void *args)
{
emac_hal_context_t *hal = (emac_hal_context_t *)args;
emac_esp32_t *emac = __containerof(hal, emac_esp32_t, hal);
emac_hal_isr(args);
if (emac->isr_need_yield) {
emac->isr_need_yield = false;
portYIELD_FROM_ISR();
}
}
esp_eth_mac_t *esp_eth_mac_new_esp32(const eth_mac_config_t *config) esp_eth_mac_t *esp_eth_mac_new_esp32(const eth_mac_config_t *config)
{ {
esp_eth_mac_t *ret = NULL; esp_eth_mac_t *ret = NULL;
@@ -401,7 +413,7 @@ esp_eth_mac_t *esp_eth_mac_new_esp32(const eth_mac_config_t *config)
emac->parent.transmit = emac_esp32_transmit; emac->parent.transmit = emac_esp32_transmit;
emac->parent.receive = emac_esp32_receive; emac->parent.receive = emac_esp32_receive;
/* Interrupt configuration */ /* Interrupt configuration */
MAC_CHECK(esp_intr_alloc(ETS_ETH_MAC_INTR_SOURCE, ESP_INTR_FLAG_IRAM, emac_hal_isr, MAC_CHECK(esp_intr_alloc(ETS_ETH_MAC_INTR_SOURCE, ESP_INTR_FLAG_IRAM, emac_esp32_isr_handler,
&emac->hal, &(emac->intr_hdl)) == ESP_OK, &emac->hal, &(emac->intr_hdl)) == ESP_OK,
"alloc emac interrupt failed", err_intr, NULL); "alloc emac interrupt failed", err_intr, NULL);
/* create counting semaphore */ /* create counting semaphore */
@@ -438,8 +450,8 @@ void emac_hal_rx_complete_cb(void *arg)
BaseType_t high_task_wakeup; BaseType_t high_task_wakeup;
/* send message to rx thread */ /* send message to rx thread */
xSemaphoreGiveFromISR(emac->rx_counting_sem, &high_task_wakeup); xSemaphoreGiveFromISR(emac->rx_counting_sem, &high_task_wakeup);
if (high_task_wakeup != pdFALSE) { if (high_task_wakeup == pdTRUE) {
portYIELD_FROM_ISR(); emac->isr_need_yield = true;
} }
} }
@@ -450,7 +462,7 @@ void emac_hal_rx_unavail_cb(void *arg)
BaseType_t high_task_wakeup; BaseType_t high_task_wakeup;
/* send message to rx thread */ /* send message to rx thread */
xSemaphoreGiveFromISR(emac->rx_counting_sem, &high_task_wakeup); xSemaphoreGiveFromISR(emac->rx_counting_sem, &high_task_wakeup);
if (high_task_wakeup != pdFALSE) { if (high_task_wakeup == pdTRUE) {
portYIELD_FROM_ISR(); emac->isr_need_yield = true;
} }
} }