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Merge branch 'bugfix/check_c3_efuse_error_on_ram_app_condition_v5.1' into 'release/v5.1'

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bugfix(cpu_start): check c3 efuse error log on ram app condition (v5.1)

See merge request espressif/esp-idf!31046
This commit is contained in:
morris
2024-05-27 15:43:21 +08:00
parent 2daa497ba0 bb51330aa6
commit d7c75b92d1
1 changed files with 5 additions and 5 deletions
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10
components/esp_system/port/cpu_start.c
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@@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@@ -414,10 +414,6 @@ void IRAM_ATTR call_start_cpu0(void)
Cache_Resume_DCache(0); Cache_Resume_DCache(0);
#endif // CONFIG_IDF_TARGET_ESP32S3 #endif // CONFIG_IDF_TARGET_ESP32S3
if (esp_efuse_check_errors() != ESP_OK) {
esp_restart();
}
#if CONFIG_ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE #if CONFIG_ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE
#if CONFIG_APP_BUILD_TYPE_ELF_RAM #if CONFIG_APP_BUILD_TYPE_ELF_RAM
// For RAM loadable ELF case, we don't need to reserve IROM/DROM as instructions and data // For RAM loadable ELF case, we don't need to reserve IROM/DROM as instructions and data
@@ -486,6 +482,10 @@ void IRAM_ATTR call_start_cpu0(void)
#endif #endif
#endif // !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP #endif // !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
if (esp_efuse_check_errors() != ESP_OK) {
esp_restart();
}
bootloader_init_mem(); bootloader_init_mem();
#if !CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE #if !CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE