diff --git a/components/esp_hw_support/sleep_modes.c b/components/esp_hw_support/sleep_modes.c
index bd1b7d4f61..eb057a959a 100644
--- a/components/esp_hw_support/sleep_modes.c
+++ b/components/esp_hw_support/sleep_modes.c
@@ -256,6 +256,7 @@ void esp_sleep_periph_use_8m(bool use_or_not)
 static uint32_t get_power_down_flags(void);
 #if SOC_PM_SUPPORT_EXT0_WAKEUP
 static void ext0_wakeup_prepare(void);
+static void IRAM_ATTR ext0_wakeup_clear(void);
 #endif
 #if SOC_PM_SUPPORT_EXT1_WAKEUP
 static void ext1_wakeup_prepare(void);
@@ -634,6 +635,8 @@ static esp_err_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags, esp_sleep_mode_t m
     // Configure pins for external wakeup
     if (s_config.wakeup_triggers & RTC_EXT0_TRIG_EN) {
         ext0_wakeup_prepare();
+    } else {
+        ext0_wakeup_clear();
     }
 #endif
 #if SOC_PM_SUPPORT_EXT1_WAKEUP
@@ -1474,6 +1477,12 @@ static void ext0_wakeup_prepare(void)
     rtcio_hal_function_select(rtc_gpio_num, RTCIO_LL_FUNC_RTC);
     rtcio_hal_input_enable(rtc_gpio_num);
 }
+
+static void ext0_wakeup_clear(void)
+{
+    rtcio_hal_ext0_clear_wakeup_pins();
+}
+
 #endif // SOC_PM_SUPPORT_EXT0_WAKEUP
 
 #if SOC_PM_SUPPORT_EXT1_WAKEUP
diff --git a/components/hal/esp32/include/hal/rtc_io_ll.h b/components/hal/esp32/include/hal/rtc_io_ll.h
index d92ab124fd..86b340fb77 100644
--- a/components/hal/esp32/include/hal/rtc_io_ll.h
+++ b/components/hal/esp32/include/hal/rtc_io_ll.h
@@ -360,7 +360,7 @@ static inline void rtcio_ll_disable_sleep_setting(int rtcio_num)
 }
 
 /**
- * Set specific logic level on an RTC IO pin as a wakeup trigger.
+ * Set specific logic level on an RTC IO pin as a ext0 wakeup trigger.
  *
  * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
  * @param level Logic level (0)
@@ -373,6 +373,16 @@ static inline void rtcio_ll_ext0_set_wakeup_pin(int rtcio_num, int level)
             level , RTC_CNTL_EXT_WAKEUP0_LV_S);
 }
 
+/**
+ * Clear ext0 wakeup trigger.
+ */
+static inline void  rtcio_ll_ext0_clear_wakeup_pins(void)
+{
+    REG_SET_FIELD(RTC_IO_EXT_WAKEUP0_REG, RTC_IO_EXT_WAKEUP0_SEL, 0);
+    // Clear level which will trigger wakeup
+    SET_PERI_REG_BITS(RTC_CNTL_EXT_WAKEUP_CONF_REG, 0x1,
+            0 , RTC_CNTL_EXT_WAKEUP0_LV_S);
+}
 #ifdef __cplusplus
 }
 #endif
diff --git a/components/hal/esp32s2/include/hal/rtc_io_ll.h b/components/hal/esp32s2/include/hal/rtc_io_ll.h
index ad05ea95dd..d7033fb636 100644
--- a/components/hal/esp32s2/include/hal/rtc_io_ll.h
+++ b/components/hal/esp32s2/include/hal/rtc_io_ll.h
@@ -376,6 +376,17 @@ static inline void rtcio_ll_ext0_set_wakeup_pin(int rtcio_num, int level)
             level , RTC_CNTL_EXT_WAKEUP0_LV_S);
 }
 
+/**
+ * Clear ext0 wakeup trigger.
+ */
+static inline void  rtcio_ll_ext0_clear_wakeup_pins(void)
+{
+    REG_SET_FIELD(RTC_IO_EXT_WAKEUP0_REG, RTC_IO_EXT_WAKEUP0_SEL, 0);
+    // Clear level which will trigger wakeup
+    SET_PERI_REG_BITS(RTC_CNTL_EXT_WAKEUP_CONF_REG, 0x1,
+            0 , RTC_CNTL_EXT_WAKEUP0_LV_S);
+}
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/components/hal/esp32s3/include/hal/rtc_io_ll.h b/components/hal/esp32s3/include/hal/rtc_io_ll.h
index 323e126c11..64088b0cd2 100644
--- a/components/hal/esp32s3/include/hal/rtc_io_ll.h
+++ b/components/hal/esp32s3/include/hal/rtc_io_ll.h
@@ -391,6 +391,17 @@ static inline void rtcio_ll_ext0_set_wakeup_pin(int rtcio_num, int level)
             level , RTC_CNTL_EXT_WAKEUP0_LV_S);
 }
 
+/**
+ * Clear ext0 wakeup trigger.
+ */
+static inline void  rtcio_ll_ext0_clear_wakeup_pins(void)
+{
+    REG_SET_FIELD(RTC_IO_EXT_WAKEUP0_REG, RTC_IO_EXT_WAKEUP0_SEL, 0);
+    // Clear level which will trigger wakeup
+    SET_PERI_REG_BITS(RTC_CNTL_EXT_WAKEUP_CONF_REG, 0x1,
+            0 , RTC_CNTL_EXT_WAKEUP0_LV_S);
+}
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/components/hal/include/hal/rtc_io_hal.h b/components/hal/include/hal/rtc_io_hal.h
index 2e6d50ca81..35732be4fd 100644
--- a/components/hal/include/hal/rtc_io_hal.h
+++ b/components/hal/include/hal/rtc_io_hal.h
@@ -259,13 +259,18 @@ void rtcio_hal_set_direction_in_sleep(int rtcio_num, rtc_gpio_mode_t mode);
 #define rtcio_hal_wakeup_disable(rtcio_num) rtcio_ll_wakeup_disable(rtcio_num)
 
 /**
- * Set specific logic level on an RTC IO pin as a wakeup trigger.
+ * Set specific logic level on an RTC IO pin as a ext0 wakeup trigger.
  *
  * @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
  * @param level Logic level (0)
  */
 #define rtcio_hal_ext0_set_wakeup_pin(rtcio_num, level)     rtcio_ll_ext0_set_wakeup_pin(rtcio_num, level)
 
+/**
+ * Clear ext0 wakeup trigger.
+ */
+#define rtcio_hal_ext0_clear_wakeup_pins()     rtcio_ll_ext0_clear_wakeup_pins()
+
 #endif
 
 #if SOC_RTCIO_HOLD_SUPPORTED && SOC_RTCIO_INPUT_OUTPUT_SUPPORTED