diff --git a/components/hal/esp32c3/include/hal/aes_ll.h b/components/hal/esp32c3/include/hal/aes_ll.h index 58cd75c422..18c2e1df18 100644 --- a/components/hal/esp32c3/include/hal/aes_ll.h +++ b/components/hal/esp32c3/include/hal/aes_ll.h @@ -151,7 +151,7 @@ static inline esp_aes_state_t aes_ll_get_state(void) * * @note Only used for DMA transforms * - * @param mode + * @param mode Mode of operation to set (e.g., ECB, CBC, CTR, etc.) */ static inline void aes_ll_set_block_mode(esp_aes_mode_t mode) { diff --git a/components/hal/esp32c3/include/hal/ds_ll.h b/components/hal/esp32c3/include/hal/ds_ll.h index 809d7b46de..d53e5f494f 100644 --- a/components/hal/esp32c3/include/hal/ds_ll.h +++ b/components/hal/esp32c3/include/hal/ds_ll.h @@ -104,6 +104,7 @@ static inline void ds_ll_configure_iv(const uint32_t *iv) static inline void ds_ll_write_message(const uint8_t *msg, size_t size) { memcpy((uint8_t*) DS_X_BASE, msg, size); + // Fence ensures all memory operations are completed before proceeding further asm volatile ("fence"); } @@ -131,6 +132,7 @@ static inline void ds_ll_write_private_key_params(const uint8_t *encrypted_key_p for (int i = 0; i < NUM_FRAGS; i++) { memcpy((uint8_t *)frags[i].addr, from, frags[i].len); asm volatile ("fence"); + // Fence ensures all memory operations are completed before proceeding further from += frags[i].len; } } @@ -177,6 +179,7 @@ static inline ds_signature_check_t ds_ll_check_signature(void) static inline void ds_ll_read_result(uint8_t *result, size_t size) { memcpy(result, (uint8_t*) DS_Z_BASE, size); + // Fence ensures all memory operations are completed before proceeding further asm volatile ("fence"); } diff --git a/components/hal/esp32c5/include/hal/aes_ll.h b/components/hal/esp32c5/include/hal/aes_ll.h index 0b6b169803..1a34c54c2e 100644 --- a/components/hal/esp32c5/include/hal/aes_ll.h +++ b/components/hal/esp32c5/include/hal/aes_ll.h @@ -143,7 +143,7 @@ static inline esp_aes_state_t aes_ll_get_state(void) * * @note Only used for DMA transforms * - * @param mode + * @param mode Mode of operation to set (e.g., ECB, CBC, CTR, etc.) */ static inline void aes_ll_set_block_mode(esp_aes_mode_t mode) { diff --git a/components/hal/esp32c5/include/hal/ds_ll.h b/components/hal/esp32c5/include/hal/ds_ll.h index d694b6d25b..02b4e41c35 100644 --- a/components/hal/esp32c5/include/hal/ds_ll.h +++ b/components/hal/esp32c5/include/hal/ds_ll.h @@ -97,6 +97,7 @@ static inline void ds_ll_configure_iv(const uint32_t *iv) static inline void ds_ll_write_message(const uint8_t *msg, size_t size) { memcpy((uint8_t*) DS_X_MEM, msg, size); + // Fence ensures all memory operations are completed before proceeding further asm volatile ("fence"); } @@ -123,6 +124,7 @@ static inline void ds_ll_write_private_key_params(const uint8_t *encrypted_key_p for (int i = 0; i < NUM_FRAGS; i++) { memcpy((uint8_t *)frags[i].addr, from, frags[i].len); + // Fence ensures all memory operations are completed before proceeding further asm volatile ("fence"); from += frags[i].len; } @@ -170,6 +172,7 @@ static inline ds_signature_check_t ds_ll_check_signature(void) static inline void ds_ll_read_result(uint8_t *result, size_t size) { memcpy(result, (uint8_t*) DS_Z_MEM, size); + // Fence ensures all memory operations are completed before proceeding further asm volatile ("fence"); } diff --git a/components/hal/esp32c6/include/hal/aes_ll.h b/components/hal/esp32c6/include/hal/aes_ll.h index f13d417eb5..76fd96c93b 100644 --- a/components/hal/esp32c6/include/hal/aes_ll.h +++ b/components/hal/esp32c6/include/hal/aes_ll.h @@ -143,7 +143,7 @@ static inline esp_aes_state_t aes_ll_get_state(void) * * @note Only used for DMA transforms * - * @param mode + * @param mode Mode of operation to set (e.g., ECB, CBC, CTR, etc.) */ static inline void aes_ll_set_block_mode(esp_aes_mode_t mode) { diff --git a/components/hal/esp32c6/include/hal/ds_ll.h b/components/hal/esp32c6/include/hal/ds_ll.h index 85d4d3ef90..2985f4004b 100644 --- a/components/hal/esp32c6/include/hal/ds_ll.h +++ b/components/hal/esp32c6/include/hal/ds_ll.h @@ -97,6 +97,7 @@ static inline void ds_ll_configure_iv(const uint32_t *iv) static inline void ds_ll_write_message(const uint8_t *msg, size_t size) { memcpy((uint8_t*) DS_X_MEM, msg, size); + // Fence ensures all memory operations are completed before proceeding further asm volatile ("fence"); } @@ -123,6 +124,7 @@ static inline void ds_ll_write_private_key_params(const uint8_t *encrypted_key_p for (int i = 0; i < NUM_FRAGS; i++) { memcpy((uint8_t *)frags[i].addr, from, frags[i].len); + // Fence ensures all memory operations are completed before proceeding further asm volatile ("fence"); from += frags[i].len; } @@ -170,6 +172,7 @@ static inline ds_signature_check_t ds_ll_check_signature(void) static inline void ds_ll_read_result(uint8_t *result, size_t size) { memcpy(result, (uint8_t*) DS_Z_MEM, size); + // Fence ensures all memory operations are completed before proceeding further asm volatile ("fence"); } diff --git a/components/hal/esp32h2/include/hal/aes_ll.h b/components/hal/esp32h2/include/hal/aes_ll.h index 7c505e71fe..f7a54450e6 100644 --- a/components/hal/esp32h2/include/hal/aes_ll.h +++ b/components/hal/esp32h2/include/hal/aes_ll.h @@ -146,7 +146,7 @@ static inline esp_aes_state_t aes_ll_get_state(void) * * @note Only used for DMA transforms * - * @param mode + * @param mode Mode of operation to set (e.g., ECB, CBC, CTR, etc.) */ static inline void aes_ll_set_block_mode(esp_aes_mode_t mode) { diff --git a/components/hal/esp32h2/include/hal/ds_ll.h b/components/hal/esp32h2/include/hal/ds_ll.h index 2c4ccf2009..c679fcef2c 100644 --- a/components/hal/esp32h2/include/hal/ds_ll.h +++ b/components/hal/esp32h2/include/hal/ds_ll.h @@ -96,6 +96,7 @@ static inline void ds_ll_configure_iv(const uint32_t *iv) static inline void ds_ll_write_message(const uint8_t *msg, size_t size) { memcpy((uint8_t*) DS_X_MEM, msg, size); + // Fence ensures all memory operations are completed before proceeding further asm volatile ("fence"); } @@ -122,6 +123,7 @@ static inline void ds_ll_write_private_key_params(const uint8_t *encrypted_key_p for (int i = 0; i < NUM_FRAGS; i++) { memcpy((uint8_t *)frags[i].addr, from, frags[i].len); + // Fence ensures all memory operations are completed before proceeding further asm volatile ("fence"); from += frags[i].len; } @@ -169,6 +171,7 @@ static inline ds_signature_check_t ds_ll_check_signature(void) static inline void ds_ll_read_result(uint8_t *result, size_t size) { memcpy(result, (uint8_t*) DS_Z_MEM, size); + // Fence ensures all memory operations are completed before proceeding further asm volatile ("fence"); } diff --git a/components/hal/esp32h21/include/hal/aes_ll.h b/components/hal/esp32h21/include/hal/aes_ll.h index 40f159977f..3e8e3e0105 100644 --- a/components/hal/esp32h21/include/hal/aes_ll.h +++ b/components/hal/esp32h21/include/hal/aes_ll.h @@ -143,7 +143,7 @@ static inline esp_aes_state_t aes_ll_get_state(void) * * @note Only used for DMA transforms * - * @param mode + * @param mode Mode of operation to set (e.g., ECB, CBC, CTR, etc.) */ static inline void aes_ll_set_block_mode(esp_aes_mode_t mode) { diff --git a/components/hal/esp32h21/include/hal/ds_ll.h b/components/hal/esp32h21/include/hal/ds_ll.h index 2b536d7d84..d755ac1c36 100644 --- a/components/hal/esp32h21/include/hal/ds_ll.h +++ b/components/hal/esp32h21/include/hal/ds_ll.h @@ -96,6 +96,7 @@ static inline void ds_ll_configure_iv(const uint32_t *iv) static inline void ds_ll_write_message(const uint8_t *msg, size_t size) { memcpy((uint8_t*) DS_X_MEM, msg, size); + // Fence ensures all memory operations are completed before proceeding further asm volatile ("fence"); } @@ -122,6 +123,7 @@ static inline void ds_ll_write_private_key_params(const uint8_t *encrypted_key_p for (int i = 0; i < NUM_FRAGS; i++) { memcpy((uint8_t *)frags[i].addr, from, frags[i].len); + // Fence ensures all memory operations are completed before proceeding further asm volatile ("fence"); from += frags[i].len; } @@ -169,6 +171,7 @@ static inline ds_signature_check_t ds_ll_check_signature(void) static inline void ds_ll_read_result(uint8_t *result, size_t size) { memcpy(result, (uint8_t*) DS_Z_MEM, size); + // Fence ensures all memory operations are completed before proceeding further asm volatile ("fence"); } diff --git a/components/hal/esp32p4/include/hal/aes_ll.h b/components/hal/esp32p4/include/hal/aes_ll.h index c98ac4651b..8d73c7eec2 100644 --- a/components/hal/esp32p4/include/hal/aes_ll.h +++ b/components/hal/esp32p4/include/hal/aes_ll.h @@ -152,7 +152,7 @@ static inline esp_aes_state_t aes_ll_get_state(void) * * @note Only used for DMA transforms * - * @param mode + * @param mode Mode of operation to set (e.g., ECB, CBC, CTR, etc.) */ static inline void aes_ll_set_block_mode(esp_aes_mode_t mode) { diff --git a/components/hal/esp32p4/include/hal/ds_ll.h b/components/hal/esp32p4/include/hal/ds_ll.h index 1ec56ea45f..aa4afbbae3 100644 --- a/components/hal/esp32p4/include/hal/ds_ll.h +++ b/components/hal/esp32p4/include/hal/ds_ll.h @@ -108,6 +108,7 @@ static inline void ds_ll_configure_iv(const uint32_t *iv) static inline void ds_ll_write_message(const uint8_t *msg, size_t size) { memcpy((uint8_t*) DS_X_MEM, msg, size); + // Fence ensures all memory operations are completed before proceeding further asm volatile ("fence"); } @@ -134,6 +135,7 @@ static inline void ds_ll_write_private_key_params(const uint8_t *encrypted_key_p for (int i = 0; i < NUM_FRAGS; i++) { memcpy((uint8_t *)frags[i].addr, from, frags[i].len); + // Fence ensures all memory operations are completed before proceeding further asm volatile ("fence"); from += frags[i].len; } @@ -181,6 +183,7 @@ static inline ds_signature_check_t ds_ll_check_signature(void) static inline void ds_ll_read_result(uint8_t *result, size_t size) { memcpy(result, (uint8_t*) DS_Z_MEM, size); + // Fence ensures all memory operations are completed before proceeding further asm volatile ("fence"); } diff --git a/components/hal/esp32s2/include/hal/aes_ll.h b/components/hal/esp32s2/include/hal/aes_ll.h index 5fce0db425..9e00ca787a 100644 --- a/components/hal/esp32s2/include/hal/aes_ll.h +++ b/components/hal/esp32s2/include/hal/aes_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -166,7 +166,7 @@ static inline esp_aes_state_t aes_ll_get_state(void) * * @note Only used for DMA transforms * - * @param mode + * @param mode Mode of operation to set (e.g., ECB, CBC, CTR, etc.) */ static inline void aes_ll_set_block_mode(esp_aes_mode_t mode) { @@ -313,11 +313,11 @@ static inline void aes_ll_gcm_set_j0(const uint8_t *j0) } /** - * @brief Sets the number of effective bits of incomplete blocks in plaintext/cipertext. + * @brief Sets the number of effective bits of incomplete blocks in plaintext/ciphertext. * * @note Only affects AES-GCM * - * @param num_valid_bits the number of effective bits of incomplete blocks in plaintext/cipertext. + * @param num_valid_bits the number of effective bits of incomplete blocks in plaintext/ciphertext. */ static inline void aes_ll_gcm_set_num_valid_bit(size_t num_valid_bits) { diff --git a/components/hal/esp32s3/include/hal/aes_ll.h b/components/hal/esp32s3/include/hal/aes_ll.h index 31b3da92ca..2dc9be0db8 100644 --- a/components/hal/esp32s3/include/hal/aes_ll.h +++ b/components/hal/esp32s3/include/hal/aes_ll.h @@ -151,7 +151,7 @@ static inline esp_aes_state_t aes_ll_get_state(void) * * @note Only used for DMA transforms * - * @param mode + * @param mode Mode of operation to set (e.g., ECB, CBC, CTR, etc.) */ static inline void aes_ll_set_block_mode(esp_aes_mode_t mode) { diff --git a/components/mbedtls/port/esp_ds/esp_rsa_sign_alt.c b/components/mbedtls/port/esp_ds/esp_rsa_sign_alt.c index e51d7d6f3e..8ed50abb14 100644 --- a/components/mbedtls/port/esp_ds/esp_rsa_sign_alt.c +++ b/components/mbedtls/port/esp_ds/esp_rsa_sign_alt.c @@ -11,22 +11,8 @@ #include "rsa_sign_alt.h" #include "esp_memory_utils.h" -#ifdef CONFIG_IDF_TARGET_ESP32S2 -#include "esp32s2/rom/digital_signature.h" -#elif CONFIG_IDF_TARGET_ESP32C3 -#include "esp32c3/rom/digital_signature.h" -#elif CONFIG_IDF_TARGET_ESP32S3 -#include "esp32s3/rom/digital_signature.h" -#elif CONFIG_IDF_TARGET_ESP32C6 -#include "esp32c6/rom/digital_signature.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/digital_signature.h" -#elif CONFIG_IDF_TARGET_ESP32P4 -#include "esp32p4/rom/digital_signature.h" -#elif CONFIG_IDF_TARGET_ESP32C5 -#include "esp32c5/rom/digital_signature.h" -#elif CONFIG_IDF_TARGET_ESP32H21 -#include "esp32h21/rom/digital_signature.h" +#ifdef SOC_DIG_SIGN_SUPPORTED +#include "rom/digital_signature.h" #else #error "Selected target does not support esp_rsa_sign_alt (for DS)" #endif