From da4c55fdbbc6b6415cadb1ab1aab20ce6c86face Mon Sep 17 00:00:00 2001 From: wuzhenghui Date: Tue, 18 Jun 2024 20:39:34 +0800 Subject: [PATCH] feat(esp_hw_support): support esp32p4 gpio wakeup deepsleep --- components/esp_hw_support/include/esp_private/esp_pmu.h | 6 +++++- components/esp_hw_support/sleep_modes.c | 4 ++-- components/soc/esp32c2/include/soc/Kconfig.soc_caps.in | 4 ++++ components/soc/esp32c2/include/soc/soc_caps.h | 1 + components/soc/esp32c3/include/soc/Kconfig.soc_caps.in | 4 ++++ components/soc/esp32c3/include/soc/soc_caps.h | 1 + components/soc/esp32c5/include/soc/Kconfig.soc_caps.in | 4 ++++ components/soc/esp32c5/include/soc/soc_caps.h | 1 + components/soc/esp32c6/include/soc/Kconfig.soc_caps.in | 4 ++++ components/soc/esp32c6/include/soc/soc_caps.h | 1 + components/soc/esp32c61/include/soc/Kconfig.soc_caps.in | 4 ++++ components/soc/esp32c61/include/soc/soc_caps.h | 1 + components/soc/esp32p4/include/soc/Kconfig.soc_caps.in | 8 ++++++++ components/soc/esp32p4/include/soc/soc_caps.h | 2 ++ 14 files changed, 42 insertions(+), 3 deletions(-) diff --git a/components/esp_hw_support/include/esp_private/esp_pmu.h b/components/esp_hw_support/include/esp_private/esp_pmu.h index 02a2c5762f..47db5ab066 100644 --- a/components/esp_hw_support/include/esp_private/esp_pmu.h +++ b/components/esp_hw_support/include/esp_private/esp_pmu.h @@ -62,7 +62,11 @@ typedef enum { #define RTC_EXT1_TRIG_EN 0 #endif -#define RTC_GPIO_TRIG_EN PMU_GPIO_WAKEUP_EN //!< GPIO wakeup +#if SOC_LP_IO_HAS_INDEPENDENT_WAKEUP_SOURCE +#define RTC_GPIO_TRIG_EN (PMU_GPIO_WAKEUP_EN | PMU_LP_GPIO_WAKEUP_EN) //!< GPIO & LP_GPIO wakeup +#else +#define RTC_GPIO_TRIG_EN (PMU_GPIO_WAKEUP_EN) +#endif #if SOC_LP_TIMER_SUPPORTED #define RTC_TIMER_TRIG_EN PMU_LP_TIMER_WAKEUP_EN //!< Timer wakeup diff --git a/components/esp_hw_support/sleep_modes.c b/components/esp_hw_support/sleep_modes.c index 63fcec1f3d..0c84bf9f4c 100644 --- a/components/esp_hw_support/sleep_modes.c +++ b/components/esp_hw_support/sleep_modes.c @@ -217,8 +217,8 @@ typedef struct { uint32_t ext0_rtc_gpio_num : 5; #endif #if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP - uint32_t gpio_wakeup_mask : 8; // 8 is the maximum RTCIO number in all chips that support GPIO wakeup - uint32_t gpio_trigger_mode : 8; + uint32_t gpio_wakeup_mask : SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT; // Only RTC_GPIO supports wakeup deepsleep + uint32_t gpio_trigger_mode : SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT; #endif uint32_t sleep_time_adjustment; uint32_t ccount_ticks_record; diff --git a/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in index c8fd88516d..2e71155117 100644 --- a/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in @@ -311,6 +311,10 @@ config SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK int default 0 +config SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT + int + default 6 + config SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK hex default 0x00000000001FFFC0 diff --git a/components/soc/esp32c2/include/soc/soc_caps.h b/components/soc/esp32c2/include/soc/soc_caps.h index 545f4e5cdb..9ee2f14fed 100644 --- a/components/soc/esp32c2/include/soc/soc_caps.h +++ b/components/soc/esp32c2/include/soc/soc_caps.h @@ -135,6 +135,7 @@ #define SOC_GPIO_OUT_RANGE_MAX 20 #define SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK (0ULL | BIT0 | BIT1 | BIT2 | BIT3 | BIT4 | BIT5) +#define SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT (6) // digital I/O pad powered by VDD3P3_CPU or VDD_SPI(GPIO_NUM_6~GPIO_NUM_20) #define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0x00000000001FFFC0ULL diff --git a/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in index d16372d972..95dff02b45 100644 --- a/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in @@ -403,6 +403,10 @@ config SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK int default 0 +config SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT + int + default 6 + config SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK hex default 0x00000000003FFFC0 diff --git a/components/soc/esp32c3/include/soc/soc_caps.h b/components/soc/esp32c3/include/soc/soc_caps.h index 1b18dda18a..e51177a051 100644 --- a/components/soc/esp32c3/include/soc/soc_caps.h +++ b/components/soc/esp32c3/include/soc/soc_caps.h @@ -173,6 +173,7 @@ #define SOC_GPIO_OUT_RANGE_MAX 21 #define SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK (0ULL | BIT0 | BIT1 | BIT2 | BIT3 | BIT4 | BIT5) +#define SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT (6) // digital I/O pad powered by VDD3P3_CPU or VDD_SPI(GPIO_NUM_6~GPIO_NUM_21) #define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0x00000000003FFFC0ULL diff --git a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in index 9563ff9a9b..7237c4d01f 100644 --- a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in @@ -351,6 +351,10 @@ config SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK int default 0 +config SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT + int + default 8 + config SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK hex default 0x0000000001FFFF00 diff --git a/components/soc/esp32c5/include/soc/soc_caps.h b/components/soc/esp32c5/include/soc/soc_caps.h index d64a2d6613..f52f09d9e3 100644 --- a/components/soc/esp32c5/include/soc/soc_caps.h +++ b/components/soc/esp32c5/include/soc/soc_caps.h @@ -210,6 +210,7 @@ #define SOC_GPIO_OUT_RANGE_MAX 28 #define SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK (0ULL | BIT0 | BIT1 | BIT2 | BIT3 | BIT4 | BIT5 | BIT6 | BIT7) +#define SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT (8) // digital I/O pad powered by VDD3P3_CPU or VDD_SPI(GPIO_NUM_8~GPIO_NUM_28) #define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0x0000000001FFFF00ULL diff --git a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in index 8c3894401b..5f0e1d9ee4 100644 --- a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in @@ -503,6 +503,10 @@ config SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK int default 0 +config SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT + int + default 8 + config SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK hex default 0x000000007FFFFF00 diff --git a/components/soc/esp32c6/include/soc/soc_caps.h b/components/soc/esp32c6/include/soc/soc_caps.h index f062dcd9c7..9a75285a3b 100644 --- a/components/soc/esp32c6/include/soc/soc_caps.h +++ b/components/soc/esp32c6/include/soc/soc_caps.h @@ -204,6 +204,7 @@ #define SOC_GPIO_OUT_RANGE_MAX 30 #define SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK (0ULL | BIT0 | BIT1 | BIT2 | BIT3 | BIT4 | BIT5 | BIT6 | BIT7) +#define SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT (8) // digital I/O pad powered by VDD3P3_CPU or VDD_SPI(GPIO_NUM_8~GPIO_NUM_30) #define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0x000000007FFFFF00ULL diff --git a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in index 43920c5811..5fefbfe6fb 100644 --- a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in @@ -191,6 +191,10 @@ config SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK int default 0 +config SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT + int + default 7 + config SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK hex default 0x00000000003FFF80 diff --git a/components/soc/esp32c61/include/soc/soc_caps.h b/components/soc/esp32c61/include/soc/soc_caps.h index 1a38385826..c0bbd26d91 100644 --- a/components/soc/esp32c61/include/soc/soc_caps.h +++ b/components/soc/esp32c61/include/soc/soc_caps.h @@ -201,6 +201,7 @@ #define SOC_GPIO_OUT_RANGE_MAX 21 #define SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK (0ULL | BIT0 | BIT1 | BIT2 | BIT3 | BIT4 | BIT5 | BIT6) +#define SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT (7) // digital I/O pad powered by VDD3P3_CPU or VDD_SPI(GPIO_NUM_7~GPIO_NUM_21) #define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0x00000000003FFF80ULL diff --git a/components/soc/esp32p4/include/soc/Kconfig.soc_caps.in b/components/soc/esp32p4/include/soc/Kconfig.soc_caps.in index 7b0f8b7842..df3a8813b7 100644 --- a/components/soc/esp32p4/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32p4/include/soc/Kconfig.soc_caps.in @@ -599,6 +599,10 @@ config SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP bool default y +config SOC_LP_IO_HAS_INDEPENDENT_WAKEUP_SOURCE + bool + default y + config SOC_GPIO_VALID_GPIO_MASK hex default 0x007FFFFFFFFFFFFF @@ -615,6 +619,10 @@ config SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK int default 0 +config SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT + int + default 16 + config SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK hex default 0x007FFFFFFFFF0000 diff --git a/components/soc/esp32p4/include/soc/soc_caps.h b/components/soc/esp32p4/include/soc/soc_caps.h index d82591c07f..9b39b54807 100644 --- a/components/soc/esp32p4/include/soc/soc_caps.h +++ b/components/soc/esp32p4/include/soc/soc_caps.h @@ -233,6 +233,7 @@ #define SOC_GPIO_SUPPORT_RTC_INDEPENDENT (1) // GPIO0~15 on ESP32P4 can support chip deep sleep wakeup #define SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP (1) +#define SOC_LP_IO_HAS_INDEPENDENT_WAKEUP_SOURCE (1) #define SOC_GPIO_VALID_GPIO_MASK (0x007FFFFFFFFFFFFF) #define SOC_GPIO_VALID_OUTPUT_GPIO_MASK SOC_GPIO_VALID_GPIO_MASK @@ -241,6 +242,7 @@ #define SOC_GPIO_OUT_RANGE_MAX 54 #define SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK (0ULL | 0xFFFF) +#define SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT (16) // digital I/O pad powered by VDD3P3_CPU or VDD_SPI(GPIO_NUM_16~GPIO_NUM_54) #define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0x007FFFFFFFFF0000ULL