refactor(esp32c61): bus_monitor backward compatible refactor

components/bootloader/subproject/main/ld/esp32c2/bootloader.ld

@@ -94,6 +94,7 @@ SECTIONS
     *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)
     *libefuse.a:*.*(.literal .text .literal.* .text.*)
+    *libriscv.a:rv_utils.*(.literal .text .literal.* .text.*)
     *(.fini.literal)
     *(.fini)
     *(.gnu.version)

components/bootloader/subproject/main/ld/esp32c3/bootloader.ld

@@ -94,6 +94,7 @@ SECTIONS
     *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)
     *libefuse.a:*.*(.literal .text .literal.* .text.*)
+    *libriscv.a:rv_utils.*(.literal .text .literal.* .text.*)
     *(.fini.literal)
     *(.fini)
     *(.gnu.version)

components/bootloader/subproject/main/ld/esp32c5/bootloader.ld

@@ -92,6 +92,7 @@ SECTIONS
     *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)
     *libefuse.a:*.*(.literal .text .literal.* .text.*)
+    *libriscv.a:rv_utils.*(.literal .text .literal.* .text.*)
     *(.fini.literal)
     *(.fini)
     *(.gnu.version)

components/bootloader/subproject/main/ld/esp32c6/bootloader.ld

@@ -93,6 +93,7 @@ SECTIONS
     *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)
     *libefuse.a:*.*(.literal .text .literal.* .text.*)
+    *libriscv.a:rv_utils.*(.literal .text .literal.* .text.*)
     *(.fini.literal)
     *(.fini)
     *(.gnu.version)

components/bootloader/subproject/main/ld/esp32c61/bootloader.ld

@@ -92,6 +92,7 @@ SECTIONS
     *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)
     *libefuse.a:*.*(.literal .text .literal.* .text.*)
+    *libriscv.a:rv_utils.*(.literal .text .literal.* .text.*)
     *(.fini.literal)
     *(.fini)
     *(.gnu.version)

components/bootloader/subproject/main/ld/esp32h2/bootloader.ld

@@ -92,6 +92,7 @@ SECTIONS
     *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)
     *libefuse.a:*.*(.literal .text .literal.* .text.*)
+    *libriscv.a:rv_utils.*(.literal .text .literal.* .text.*)
     *(.fini.literal)
     *(.fini)
     *(.gnu.version)

components/bootloader/subproject/main/ld/esp32h21/bootloader.ld

@@ -92,6 +92,7 @@ SECTIONS
     *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)
     *libefuse.a:*.*(.literal .text .literal.* .text.*)
+    *libriscv.a:rv_utils.*(.literal .text .literal.* .text.*)
     *(.fini.literal)
     *(.fini)
     *(.gnu.version)

components/bootloader/subproject/main/ld/esp32h4/bootloader.ld

@@ -92,6 +92,7 @@ SECTIONS
     *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)
     *libefuse.a:*.*(.literal .text .literal.* .text.*)
+    *libriscv.a:rv_utils.*(.literal .text .literal.* .text.*)
     *(.fini.literal)
     *(.fini)
     *(.gnu.version)

components/bootloader/subproject/main/ld/esp32p4/bootloader.ld

@@ -93,6 +93,7 @@ SECTIONS
     *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)
     *libefuse.a:*.*(.literal .text .literal.* .text.*)
+    *libriscv.a:rv_utils.*(.literal .text .literal.* .text.*)
     *(.fini.literal)
     *(.fini)
     *(.gnu.version)

components/hal/esp32c2/include/hal/assist_debug_ll.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -125,6 +125,11 @@ FORCE_INLINE_ATTR void assist_debug_ll_reset_register(void)
     SYSTEM.cpu_peri_rst_en.rst_en_assist_debug = false;
 }
 
+FORCE_INLINE_ATTR bool assist_debug_ll_is_debugger_active(void)
+{
+   return REG_GET_BIT(ASSIST_DEBUG_CORE_0_DEBUG_MODE_REG, ASSIST_DEBUG_CORE_0_DEBUG_MODULE_ACTIVE);
+}
+
 #ifdef __cplusplus
 }
 #endif

components/hal/esp32c3/include/hal/assist_debug_ll.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -125,6 +125,11 @@ FORCE_INLINE_ATTR void assist_debug_ll_reset_register(void)
     SYSTEM.cpu_peri_rst_en.reg_rst_en_assist_debug = false;
 }
 
+FORCE_INLINE_ATTR bool assist_debug_ll_is_debugger_active(void)
+{
+   return REG_GET_BIT(ASSIST_DEBUG_CORE_0_DEBUG_MODE_REG, ASSIST_DEBUG_CORE_0_DEBUG_MODULE_ACTIVE);
+}
+
 #ifdef __cplusplus
 }
 #endif

components/hal/esp32c5/include/hal/assist_debug_ll.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -124,6 +124,11 @@ FORCE_INLINE_ATTR void assist_debug_ll_reset_register(void)
     PCR.assist_conf.assist_rst_en = false;
 }
 
+FORCE_INLINE_ATTR bool assist_debug_ll_is_debugger_active(void)
+{
+   return REG_GET_BIT(ASSIST_DEBUG_CORE_0_DEBUG_MODE_REG, ASSIST_DEBUG_CORE_0_DEBUG_MODULE_ACTIVE);
+}
+
 #ifdef __cplusplus
 }
 #endif

components/hal/esp32c6/include/hal/assist_debug_ll.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -125,6 +125,11 @@ FORCE_INLINE_ATTR void assist_debug_ll_reset_register(void)
     PCR.assist_conf.assist_rst_en = false;
 }
 
+FORCE_INLINE_ATTR bool assist_debug_ll_is_debugger_active(void)
+{
+   return REG_GET_BIT(ASSIST_DEBUG_CORE_0_DEBUG_MODE_REG, ASSIST_DEBUG_CORE_0_DEBUG_MODULE_ACTIVE);
+}
+
 #ifdef __cplusplus
 }
 #endif

components/hal/esp32c61/include/hal/assist_debug_ll.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -9,8 +9,11 @@
 #pragma once
 
 #include "soc/assist_debug_reg.h"
-#define ASSIST_DEBUG_SP_SPILL_BITS      (ASSIST_DEBUG_CORE_0_SP_SPILL_MIN_ENA | ASSIST_DEBUG_CORE_0_SP_SPILL_MAX_ENA)
+#define BUS_MONITOR_SP_SPILL_BITS      (BUS_MONITOR_CORE_0_SP_SPILL_MIN_ENA | BUS_MONITOR_CORE_0_SP_SPILL_MAX_ENA)
-#define ASSIST_DEBUG_CORE_0_MONITOR_REG  ASSIST_DEBUG_CORE_0_MONTR_ENA_REG
+#define BUS_MONITOR_CORE_0_MONITOR_REG  BUS_MONITOR_CORE_0_MONTR_ENA_REG
+// Compatible alias
+#define ASSIST_DEBUG_SP_SPILL_BITS       BUS_MONITOR_SP_SPILL_BITS
+#define ASSIST_DEBUG_CORE_0_MONITOR_REG  BUS_MONITOR_CORE_0_MONITOR_REG
 
 #ifndef __ASSEMBLER__
 
@@ -60,57 +63,57 @@ extern "C" {
 
 FORCE_INLINE_ATTR void assist_debug_ll_sp_spill_monitor_enable(__attribute__((unused)) uint32_t core_id)
 {
-    REG_SET_BIT(ASSIST_DEBUG_CORE_0_MONTR_ENA_REG, ASSIST_DEBUG_SP_SPILL_BITS);
+    REG_SET_BIT(BUS_MONITOR_CORE_0_MONTR_ENA_REG, BUS_MONITOR_SP_SPILL_BITS);
 }
 
 FORCE_INLINE_ATTR void assist_debug_ll_sp_spill_monitor_disable(__attribute__((unused)) uint32_t core_id)
 {
-    REG_CLR_BIT(ASSIST_DEBUG_CORE_0_MONTR_ENA_REG, ASSIST_DEBUG_SP_SPILL_BITS);
+    REG_CLR_BIT(BUS_MONITOR_CORE_0_MONTR_ENA_REG, BUS_MONITOR_SP_SPILL_BITS);
 }
 
 FORCE_INLINE_ATTR void assist_debug_ll_sp_spill_interrupt_enable(__attribute__((unused)) uint32_t core_id)
 {
-    REG_SET_BIT(ASSIST_DEBUG_CORE_0_INTR_ENA_REG, ASSIST_DEBUG_SP_SPILL_BITS);
+    REG_SET_BIT(BUS_MONITOR_CORE_0_INTR_ENA_REG, BUS_MONITOR_SP_SPILL_BITS);
 }
 
 FORCE_INLINE_ATTR void assist_debug_ll_sp_spill_interrupt_disable(__attribute__((unused)) uint32_t core_id)
 {
-    REG_CLR_BIT(ASSIST_DEBUG_CORE_0_INTR_ENA_REG, ASSIST_DEBUG_SP_SPILL_BITS);
+    REG_CLR_BIT(BUS_MONITOR_CORE_0_INTR_ENA_REG, BUS_MONITOR_SP_SPILL_BITS);
 }
 
 FORCE_INLINE_ATTR bool assist_debug_ll_sp_spill_is_fired(__attribute__((unused)) uint32_t core_id)
 {
-    return REG_READ(ASSIST_DEBUG_CORE_0_INTR_RAW_REG) & ASSIST_DEBUG_SP_SPILL_BITS;
+    return REG_READ(BUS_MONITOR_CORE_0_INTR_RAW_REG) & BUS_MONITOR_SP_SPILL_BITS;
 }
 
 FORCE_INLINE_ATTR void assist_debug_ll_sp_spill_interrupt_clear(__attribute__((unused)) uint32_t core_id)
 {
-    REG_WRITE(ASSIST_DEBUG_CORE_0_INTR_CLR_REG, ASSIST_DEBUG_SP_SPILL_BITS);
+    REG_WRITE(BUS_MONITOR_CORE_0_INTR_CLR_REG, BUS_MONITOR_SP_SPILL_BITS);
 }
 
 FORCE_INLINE_ATTR void assist_debug_ll_sp_spill_set_min(__attribute__((unused)) uint32_t core_id, uint32_t min)
 {
-    REG_WRITE(ASSIST_DEBUG_CORE_0_SP_MIN_REG, min);
+    REG_WRITE(BUS_MONITOR_CORE_0_SP_MIN_REG, min);
 }
 
 FORCE_INLINE_ATTR uint32_t assist_debug_ll_sp_spill_get_min(__attribute__((unused)) uint32_t core_id)
 {
-    return REG_READ(ASSIST_DEBUG_CORE_0_SP_MIN_REG);
+    return REG_READ(BUS_MONITOR_CORE_0_SP_MIN_REG);
 }
 
 FORCE_INLINE_ATTR void assist_debug_ll_sp_spill_set_max(__attribute__((unused)) uint32_t core_id, uint32_t max)
 {
-    REG_WRITE(ASSIST_DEBUG_CORE_0_SP_MAX_REG, max);
+    REG_WRITE(BUS_MONITOR_CORE_0_SP_MAX_REG, max);
 }
 
 FORCE_INLINE_ATTR uint32_t assist_debug_ll_sp_spill_get_max(__attribute__((unused)) uint32_t core_id)
 {
-    return REG_READ(ASSIST_DEBUG_CORE_0_SP_MAX_REG);
+    return REG_READ(BUS_MONITOR_CORE_0_SP_MAX_REG);
 }
 
 FORCE_INLINE_ATTR uint32_t assist_debug_ll_sp_spill_get_pc(__attribute__((unused)) uint32_t core_id)
 {
-    return REG_READ(ASSIST_DEBUG_CORE_0_SP_PC_REG);
+    return REG_READ(BUS_MONITOR_CORE_0_SP_PC_REG);
 }
 
 FORCE_INLINE_ATTR void assist_debug_ll_enable_bus_clock(bool enable)
@@ -124,6 +127,11 @@ FORCE_INLINE_ATTR void assist_debug_ll_reset_register(void)
     PCR.assist_conf.assist_rst_en = false;
 }
 
+FORCE_INLINE_ATTR bool assist_debug_ll_is_debugger_active(void)
+{
+   return REG_GET_BIT(BUS_MONITOR_CORE_0_DEBUG_MODE_REG, BUS_MONITOR_CORE_0_DEBUG_MODULE_ACTIVE);
+}
+
 #ifdef __cplusplus
 }
 #endif

components/hal/esp32h2/include/hal/assist_debug_ll.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -125,6 +125,11 @@ FORCE_INLINE_ATTR void assist_debug_ll_reset_register(void)
     PCR.assist_conf.assist_rst_en = false;
 }
 
+FORCE_INLINE_ATTR bool assist_debug_ll_is_debugger_active(void)
+{
+   return REG_GET_BIT(ASSIST_DEBUG_CORE_0_DEBUG_MODE_REG, ASSIST_DEBUG_CORE_0_DEBUG_MODULE_ACTIVE);
+}
+
 #ifdef __cplusplus
 }
 #endif

components/hal/esp32p4/include/hal/assist_debug_ll.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -139,6 +139,11 @@ FORCE_INLINE_ATTR void _assist_debug_ll_reset_register(void)
 #define assist_debug_ll_reset_register(...) \
     (void)__DECLARE_RCC_ATOMIC_ENV; _assist_debug_ll_reset_register(__VA_ARGS__)
 
+FORCE_INLINE_ATTR bool assist_debug_ll_is_debugger_active(void)
+{
+    return REG_GET_BIT(ASSIST_DEBUG_CORE_0_DEBUG_MODE_REG, ASSIST_DEBUG_CORE_0_DEBUG_MODULE_ACTIVE);
+}
+
 #ifdef __cplusplus
 }
 #endif

components/riscv/CMakeLists.txt

@@ -8,17 +8,20 @@ endif()
 
 
 if(BOOTLOADER_BUILD)
-    set(priv_requires soc)
+    set(priv_requires soc hal)
+    set(srcs "rv_utils.c")
 elseif(esp_tee_build)
-    set(priv_requires soc)
+    set(priv_requires soc hal)
+    set(srcs "rv_utils.c")
     if(CONFIG_SOC_INT_PLIC_SUPPORTED)
-        set(srcs "interrupt_plic.c")
+        list(APPEND srcs "interrupt_plic.c")
     endif()
 else()
-    set(priv_requires soc)
+    set(priv_requires soc hal)
     set(srcs
         "instruction_decode.c"
         "interrupt.c"
+        "rv_utils.c"
         "vectors.S")
 
     if(CONFIG_SOC_INT_CLIC_SUPPORTED)

components/riscv/include/riscv/rv_utils.h

@@ -9,9 +9,6 @@
 #include <stdint.h>
 
 #include "soc/soc_caps.h"
-#if SOC_ASSIST_DEBUG_SUPPORTED
-#include "soc/assist_debug_reg.h"
-#endif
 #include "soc/interrupt_reg.h"
 #include "esp_attr.h"
 #include "riscv/csr.h"
@@ -405,14 +402,10 @@ FORCE_INLINE_ATTR bool rv_utils_is_trigger_fired(int id)
 
 // ---------------------- Debugger -------------------------
 
-FORCE_INLINE_ATTR bool rv_utils_dbgr_is_attached(void)
+/** To use hal function for compatibility meanwhile keep hal dependency private,
-{
+ *  this function is implemented in rv_utils.c
-#if SOC_ASSIST_DEBUG_SUPPORTED
+ */
-    return REG_GET_BIT(ASSIST_DEBUG_CORE_0_DEBUG_MODE_REG, ASSIST_DEBUG_CORE_0_DEBUG_MODULE_ACTIVE);
+bool rv_utils_dbgr_is_attached(void);
-#else
-    return false;
-#endif
-}
 
 FORCE_INLINE_ATTR void rv_utils_dbgr_break(void)
 {

components/riscv/linker.lf

@@ -5,3 +5,4 @@ entries:
     interrupt:intr_handler_get (default)
     interrupt:intr_handler_set (default)
     vectors (noflash_text)
+    rv_utils (noflash_text)

components/riscv/rv_utils.c

@@ -0,0 +1,21 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+ #include <stdbool.h>
+ #include "soc/soc_caps.h"
+ #if SOC_ASSIST_DEBUG_SUPPORTED
+ #include "hal/assist_debug_ll.h"
+ #endif
+ #include "esp_attr.h"
+
+bool rv_utils_dbgr_is_attached(void)
+{
+#if SOC_ASSIST_DEBUG_SUPPORTED
+    return assist_debug_ll_is_debugger_active();
+#else
+    return false;
+#endif
+}

components/soc/esp32c61/include/soc/assist_debug_reg.h

@@ -0,0 +1,21 @@
+/**
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ *  SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include "soc/bus_monitor_reg.h"
+
+// Compatible alias
+#define DR_REG_ASSIST_DEBUG_BASE                    DR_REG_BUS_MONITOR_BASE
+
+#define ASSIST_DEBUG_CORE_0_DEBUG_MODE_REG          BUS_MONITOR_CORE_0_DEBUG_MODE_REG
+#define ASSIST_DEBUG_CORE_0_DEBUG_MODULE_ACTIVE     BUS_MONITOR_CORE_0_DEBUG_MODULE_ACTIVE
+
+#define ASSIST_DEBUG_CORE_0_SP_MIN_REG              BUS_MONITOR_CORE_0_SP_MIN_REG
+#define ASSIST_DEBUG_CORE_0_SP_MAX_REG              BUS_MONITOR_CORE_0_SP_MAX_REG
+
+#define ASSIST_DEBUG_CORE_0_RCD_EN_REG              BUS_MONITOR_CORE_0_RCD_EN_REG
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGEN            BUS_MONITOR_CORE_0_RCD_PDEBUGEN
+#define ASSIST_DEBUG_CORE_0_RCD_RECORDEN            BUS_MONITOR_CORE_0_RCD_RECORDEN

components/soc/esp32c61/ld/esp32c61.peripherals.ld

@@ -58,6 +58,6 @@ PROVIDE ( LP_GPIO             = 0x600B4400 );
 PROVIDE ( EFUSE0              = 0x600B4800 );
 PROVIDE ( EFUSE1              = 0x600B4C00 );
 PROVIDE ( TRACE               = 0x600C0000 );
-PROVIDE ( ASSIST_DEBUG        = 0x600C2000 );
+PROVIDE ( BUS_MONITOR         = 0x600C2000 );
 PROVIDE ( INTPRI              = 0x600C5000 );
 PROVIDE ( CACHE               = 0x600C8000 );

components/soc/esp32c61/register/soc/bus_monitor_reg.h

@@ -5,7 +5,6 @@
  */
 #pragma once
 
-#include <stdint.h>
 #include "soc/soc.h"
 #ifdef __cplusplus
 extern "C" {

components/soc/esp32c61/register/soc/bus_monitor_struct.h

@@ -559,7 +559,7 @@ typedef struct {
     volatile bus_monitor_date_reg_t date;
 } bus_monitor_dev_t;
 
-extern bus_monitor_dev_t ASSIST_DEBUG;
+extern bus_monitor_dev_t BUS_MONITOR;
 
 #ifndef __cplusplus
 _Static_assert(sizeof(bus_monitor_dev_t) == 0x400, "Invalid size of bus_monitor_dev_t structure");

components/soc/esp32c61/register/soc/reg_base.h

@@ -57,7 +57,7 @@
 #define DR_REG_EFUSE0_BASE                      0x600B4800
 #define DR_REG_EFUSE1_BASE                      0x600B4C00
 #define DR_REG_TRACE_BASE                       0x600C0000
-#define DR_REG_ASSIST_DEBUG_BASE                0x600C2000
+#define DR_REG_BUS_MONITOR_BASE                 0x600C2000
 #define DR_REG_INTPRI_BASE                      0x600C5000
 #define DR_REG_CACHE_BASE                       0x600C8000
 #define DR_REG_CLINT_M_BASE                     0x20000000